3.3 V/5 V ECL Dual
Differential Data and Clock
D Flip-Flop With Set and
Reset
MC10EP29, MC100EP29
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Description
The MC10/100EP29 is a dual master−slave flip−flop. The device
features fully differential Data and Clock inputs as well as outputs.
The MC10/100EP29 is functionally equivalent to the
MC10/100EL29. Data enters the master latch when the clock is LOW
and transfers to the slave upon a positive transition on the clock input.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the D input will pull down to VEE and the D input will
bias around VCC/2. The outputs will go to a defined state, however the
state will be random based on how the flip flop powers up.
Both flip flops feature asynchronous, overriding Set and Reset
inputs. Note that the Set and Reset inputs cannot both be HIGH
simultaneously.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Features
• Maximum Frequency > 3 GHz Typical
• 500 ps Typical Propagation Delays
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
•
•
•
•
MARKING
DIAGRAM*
XXXX
EP29
ALYWG
G
TSSOP−20
DT SUFFIX
CASE 948E
20
1
QFN−20
MN SUFFIX
CASE 485E
XXXX
A
L
Y
W
G
XXXX
EP29
ALYWG
G
= MC10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
These are Pb−Free Devices
ORDERING INFORMATION
Package
Shipping†
MC10EP29DTG
TSSOP−20
(Pb−Free)
75 Units / Tube
MC100EP29DTG
TSSOP−20
(Pb−Free)
75 Units / Tube
MC100EP29DTR2G TSSOP−20
(Pb−Free)
2500 / Tape &
Reel
Device
MC100EP29MNG
QFN−20
(Pb−Free)
92 Units / Tube
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
April, 2021 − Rev. 10
1
Publication Order Number:
MC10EP29/D
MC10EP29, MC100EP29
VCC
R0
S0
Q0
Q0
Q1
Q1
S1
R1
VEE
20
19
18
17
16
15
14
13
12
11
Q
S
R
Q
S
Q
D
R
Q
CLK
CLK
1
2
3
4
5
D0
D0
VBB
CLK0
CLK0
7
8
9
CLK1
D1
D1
6
CLK1
D
10
VCC
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. 20−Lead Pinout (Top View) and Logic Diagram
Exposed Pad
D0
D0
VCC
R0
S0
20
19
18
17
16
VBB
1
15
Q0
CLK0
2
14
Q0
CLK0
3
13
Q1
CLK1
4
12
Q1
CLK1
5
11
S1
MC10/100EP29
6
NOTE:
7
8
9
10
D1 D1 VCC VEE R1
The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to VEE.
Figure 1. QFN−20 Pinout (Top View)
Table 1. PIN DESCRIPTION
Pin
Function
D0*, D0*; D1*, D1*
ECL Differential Data Inputs
R0*, R1*
ECL Reset Inputs
CLK0*, CLK0*
ECL Differential Clock Inputs
CLK1*, CLK1*
ECL Differential Clock Inputs
S0* S1*
ECL Set Inputs
Q0, Q0; Q1, Q1
ECL Differential Data Outputs
VBB
Reference Voltage Output
VCC
Positive Supply
VEE
Negative Supply
EP
Exposed Pad
Table 2. TRUTH TABLE
R
S
D
CLK
Q
Q
L
L
L
Z
L
H
L
L
H
Z
H
L
H
L
X
X
L
H
L
H
X
X
H
L
H
H
X
X
Undef
Undef
Z = LOW to HIGH Transition
X = Don’t Care
*Pins will default LOW when left open.
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2
MC10EP29, MC100EP29
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb−Free Pkg
TSSOP−20
QFN−20
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
383 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
±0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
20 TSSOP
20 TSSOP
140
100
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
20 TSSOP
23 to 41
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
QFN−20
QFN−20
47
33
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
QFN−20
18
°C/W
Tsol
Wave Solder (Pb−Free)
265
°C
VI v VCC
VI w VEE
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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3
MC10EP29, MC100EP29
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1555
1680
1490
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
1365
1690
1460
1755
1490
1815
mV
VBB
Output Voltage Reference
1790
1990
1855
2055
1915
2115
mV
3.3
2.0
3.3
2.0
3.3
V
150
mA
IEE
Power Supply Current
VOH
VOL
VIHCMR
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 4)
IIH
Input HIGH Current
IIL
Input LOW Current
1890
2.0
1955
150
0.5
2015
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
35
46
55
37
48
57
40
49
60
mA
VOH
Output HIGH Voltage (Note 6)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage (Note 6)
3065
3190
3315
3130
3255
3380
3190
3315
3440
mV
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
3515
mV
VBB
Output Voltage Reference
3490
3690
3555
3755
3615
3815
mV
5.0
2.0
5.0
2.0
5.0
V
150
mA
VIHCMR
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 7)
IIH
Input HIGH Current
IIL
Input LOW Current
3590
2.0
150
0.5
3655
150
0.5
0.5
3715
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. All loading with 50 W to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP29, MC100EP29
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 8)
−40°C
Symbol
IEE
Characteristic
Typ
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
VOH
Output HIGH Voltage (Note 9)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
VOL
Output LOW Voltage (Note 9)
−1935
−1810
−1685
−1870
−1745
−1620
−1810
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
VBB
Output Voltage Reference
−1510
−1310
−1445
−1245
−1385
−1185
mV
0.0
V
150
mA
VIHCMR
Power Supply Current
Min
25°C
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
IIH
Input HIGH Current
IIL
Input LOW Current
−1410
VEE + 2.0
0.0
−1345
VEE + 2.0
150
0.5
0.0
−1285
VEE + 2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
8. Input and output parameters vary 1:1 with VCC.
9. All loading with 50 W to VCC − 2.0 V.
10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 12)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 12)
1305
1480
1605
1305
1480
1605
1305
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1305
1675
1305
1675
1305
1675
mV
VBB
Output Voltage Reference
1775
1975
1775
1975
1775
1975
mV
3.3
2.0
3.3
2.0
3.3
V
150
mA
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
IIH
Input HIGH Current
IIL
Input LOW Current
1875
2.0
150
0.5
1875
150
0.5
0.5
1875
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
12. All loading with 50 W to VCC − 2.0 V.
13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP29, MC100EP29
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
−40°C
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
Output HIGH Voltage (Note 15)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
Output LOW Voltage (Note 15)
3005
3180
3305
3005
3180
3305
3005
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3005
3375
3005
3375
3005
3375
mV
VBB
Output Voltage Reference
3475
3675
3475
3675
3475
3675
mV
5.0
2.0
5.0
2.0
5.0
V
150
mA
Symbol
Characteristic
IEE
Power Supply Current
VOH
VOL
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
IIH
Input HIGH Current
IIL
Input LOW Current
3575
2.0
3575
150
0.5
3575
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
15. All loading with 50 W to VCC − 2.0 V.
16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 17)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
35
46
55
37
48
57
40
49
60
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 18)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 18)
−1995
−1820
−1695
−1995
−1820
−1695
−1995
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1995
−1625
−1995
−1625
−1995
−1625
mV
VBB
Output Voltage Reference
−1525
−1325
−1525
−1325
−1525
−1325
mV
0.0
V
150
mA
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
IIH
Input HIGH Current
IIL
Input LOW Current
−1425
VEE + 2.0
0.0
150
0.5
−1425
VEE + 2.0
0.0
150
0.5
−1425
VEE + 2.0
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
17. Input and output parameters vary 1:1 with VCC.
18. All loading with 50 W to VCC − 2.0 V.
19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC10EP29, MC100EP29
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C
Characteristic
Symbol
fmax
Maximum Frequency
(See Figure 2 Fmax/JITTER)
tPLH,
tPHL
Propagation Delay to
Output Differential S
R
tS
tH
tRR/tRR2
tPW
tJITTER
VPP
tr
tf
Min
Typ
Min
> 3.0
300
275
300
380
380
400
Setup Time
Hold Time
100
100
Set/Reset Recovery
Minimum Pulse Width
Set, Reset
CLK
Input Voltage Swing (Note 21)
Q, Q
Typ
85°C
Max
Min
> 3.0
350
300
325
420
400
420
20
20
100
100
150
80
500
300
Cycle−to−Cycle Jitter
(See Figure 2 Fmax/JITTER)
Output Rise/Fall Times
(20% − 80%)
25°C
Max
450
475
500
0.2
3.0
500
500
525
Unit
GHz
400
350
375
470
450
470
20
20
100
100
20
20
ps
150
80
150
80
ps
500
300
500
300
0.2