MC12026ADR2G

MC12026A 1.1GHz Dual Modulus Prescaler Description The MC12026A is a high frequency, low voltage dual modulus prescaler used in phase-locked loop (PLL) applications. The MC12026A can be used with CMOS synthesizers requiring positive edges to trigger internal counters in a PLL to provide tuning signals up to 1.1 GHz in programmable frequency steps. A Divide Ratio Control (SW) permits selection of an 8/9 or 16/17 divide ratio as desired. The Modulus Control (MC) selects the proper divide number after SW has been biased to select the desired divide ratio. www.onsemi.com 8 1 SOIC−8 NB D SUFFIX CASE 751−07 Features • • • • • • • • 1.1 GHz Toggle Frequency Supply Voltage 4.5 to 5.5 V Low Power 4.0 mA Typical Operating Temperature Range of −40 to 85°C The MC12026 is Pin Compatible with the MC12022 Short Setup Time (tset ) 6.0 ns Typical @ 1.1 GHz Modulus Control Input Level is Compatible with Standard CMOS and TTL These Devices are Pb-Free, Halogen Free and are RoHS Compliant Table 1. FUNCTIONAL TABLE SW MC Divide Ratio H H 8 H L 9 L H 16 L L 17 MARKING DIAGRAM* 8 1 A L Y W G *For additional marking information, refer to Application Note AND8002/D. PIN CONNECTIONS IN VCC SW OUT Table 2. MAXIMUM RATINGS Symbol Value Unit VCC −0.5 to 7.0 Vdc Operating Temperature Range TA −40 to 85 °C Storage Temperature Range Tstg −65 to 150 °C Modulus Control Input, Pin 6 MC −0.5 to 6.5 Vdc IO 10.0 mA Power Supply Voltage, Pin 2 Maximum Output Current, Pin 4 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. NOTE: ESD data available upon request. © Semiconductor Components Industries, LLC, 2016 August, 2016 − Rev. 9 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin, but this is not recommended due to increased power consumption. 2. MC: H = 2.0 V to VCC, L = GND to 0.8 V. Characteristics 026A ALYW G 1 1 8 2 7 3 6 4 5 IN NC MC GND (Top View) ORDERING INFORMATION Device Package Shipping† MC12026ADG SOIC−8 NB (Pb-Free) 98 Units/Tube MC12026ADR2G SOIC−8 NB (Pb-Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: MC12026A/D MC12026A Table 3. ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5; TA = −40 to 85°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit ft 0.1 1.4 1.1 GHz Supply Current Output Unloaded (Pin 2) ICC − 4.0 5.3 mA Modulus Control Input High (MC) VIH1 2.0 − VCC V Modulus Control Input Low (MC) VIL1 GND − 0.8 V Divide Ratio Control Input High (SW) VIH2 VCC − 0.5 V VCC VCC + 0.5 V V Divide Ratio Control Input Low (SW) VIL2 OPEN OPEN OPEN − Output Voltage Swing (RL = 560 W; IO = 5.5 mA) (Note 1) (RL = 1.1 kW; IO = 2.9 mA) (Note 2) Vout 1.0 1.6 − Vpp Modulus Setup Time MC to Out (Note 3) tSET − 6.0 9.0 ns Input Voltage Sensitivity 100−250 MHz 250−1100 MHz Vin 400 100 − − 1000 1000 Toggle Frequency (Sin Wave) 1. Divide Ratio of ÷8/9 at 1.1 GHz, CL = 8.0 pF. 2. Divide Ratio of ÷16/17 at 1.1 GHz, CL = 8.0 pF. 3. Assuming RL = 560 W at 1.1 GHz. In In D Q D Q C QB C QB D Q QB C M MC 1 D QB C Q D QB 0 C Q SW Out Figure 1. Logic Diagram (MC12026A) Prop. Delay In Out MC Setup MC Release Modulus setup time MC to out is the MC setup or MC release plus the prop delay. Figure 2. Modulus Setup Time www.onsemi.com 2 MC mVpp MC12026A VCC = 4.5 to 5.5V C3 SINE WAVE GENERATOR C1 VCC SW IN 50 W OUT C2 RL IN MC CL GND EXTERNAL COMPONENTS C1 = C2 = 1000 pF C3 = 0.1mF CL = 8pF (Including Scope and Jig Capacitance) RL = 560W (for ÷8/9 at 1.1GHz) MC INPUT Figure 3. AC Test Circuit +15.0 +1257.40 +10.0 +707.11 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 +223.61 OPERATING WINDOW -5.0 -10.0 -15.0 -20.0 +125.74 +70.71 +39.76 +22.36 -25.0 +12.57 -30.0 +7.07 -35.0 +3.98 -40.0 +2.24 -45.0 +1.26 -50.0 0 200 400 600 800 1000 1200 1400 1600 +0.71 1800 FREQUENCY (MHz) Divide Ratio = 8; VCC = 5.0 V; TA = 25°C Figure 4. Input Signal Amplitude Versus Input Frequency 2000 1600 1200 800 400 0 200 400 600 800 1000 1200 1400 FREQUENCY (MHz) Figure 5. Output Amplitude Versus Input Frequency www.onsemi.com 3 1600 0 1800 mVpp AMPLITUDE (dBm) +397.64 mVrms +5.0 MC12026A 5.88V 880mV 36.6ns 86.6ns (÷8, 1.1GHz Input Frequency, VCC = 5.0, TA = 25°C, Output Loaded With 8.0pF) Figure 6. Typical Output Waveform www.onsemi.com 4 MC12026A 200 150 R 100 MHz 50 0 −50 OHMS −100 −150 −200 −250 −300 −350 −400 −450 jX −500 −550 −600 −650 100 200 300 400 500 600 700 800 900 1000 1100 1200 Figure 7. Typical Input Impedance Versus Input Frequency ECLinPS is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK 8 1 SCALE 1:1 −X− DATE 16 FEB 2011 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S 8 8 1 1 IC 4.0 0.155 XXXXX A L Y W G IC (Pb−Free) = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package XXXXXX AYWW 1 1 Discrete XXXXXX AYWW G Discrete (Pb−Free) XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 1.270 0.050 SCALE 6:1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 8 8 XXXXX ALYWX G XXXXX ALYWX 1.52 0.060 0.6 0.024 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 7.0 0.275 DIM A B C D G H J K M N S mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SOIC−8 NB CASE 751−07 ISSUE AK DATE 16 FEB 2011 STYLE 1: PIN 1. EMITTER 2. COLLECTOR 3. COLLECTOR 4. EMITTER 5. EMITTER 6. BASE 7. BASE 8. EMITTER STYLE 2: PIN 1. COLLECTOR, DIE, #1 2. COLLECTOR, #1 3. COLLECTOR, #2 4. COLLECTOR, #2 5. BASE, #2 6. EMITTER, #2 7. BASE, #1 8. EMITTER, #1 STYLE 3: PIN 1. DRAIN, DIE #1 2. DRAIN, #1 3. DRAIN, #2 4. DRAIN, #2 5. GATE, #2 6. SOURCE, #2 7. GATE, #1 8. SOURCE, #1 STYLE 4: PIN 1. ANODE 2. ANODE 3. ANODE 4. ANODE 5. ANODE 6. ANODE 7. ANODE 8. COMMON CATHODE STYLE 5: PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. DRAIN 5. GATE 6. GATE 7. SOURCE 8. SOURCE STYLE 6: PIN 1. SOURCE 2. DRAIN 3. DRAIN 4. SOURCE 5. SOURCE 6. GATE 7. GATE 8. SOURCE STYLE 7: PIN 1. INPUT 2. EXTERNAL BYPASS 3. THIRD STAGE SOURCE 4. GROUND 5. DRAIN 6. GATE 3 7. SECOND STAGE Vd 8. FIRST STAGE Vd STYLE 8: PIN 1. COLLECTOR, DIE #1 2. BASE, #1 3. BASE, #2 4. COLLECTOR, #2 5. COLLECTOR, #2 6. EMITTER, #2 7. EMITTER, #1 8. COLLECTOR, #1 STYLE 9: PIN 1. EMITTER, COMMON 2. COLLECTOR, DIE #1 3. COLLECTOR, DIE #2 4. EMITTER, COMMON 5. EMITTER, COMMON 6. BASE, DIE #2 7. BASE, DIE #1 8. EMITTER, COMMON STYLE 10: PIN 1. GROUND 2. BIAS 1 3. OUTPUT 4. GROUND 5. GROUND 6. BIAS 2 7. INPUT 8. GROUND STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 13: PIN 1. N.C. 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 14: PIN 1. N−SOURCE 2. N−GATE 3. P−SOURCE 4. P−GATE 5. P−DRAIN 6. P−DRAIN 7. N−DRAIN 8. N−DRAIN STYLE 15: PIN 1. ANODE 1 2. ANODE 1 3. ANODE 1 4. ANODE 1 5. CATHODE, COMMON 6. CATHODE, COMMON 7. CATHODE, COMMON 8. CATHODE, COMMON STYLE 16: PIN 1. EMITTER, DIE #1 2. BASE, DIE #1 3. EMITTER, DIE #2 4. BASE, DIE #2 5. COLLECTOR, DIE #2 6. COLLECTOR, DIE #2 7. COLLECTOR, DIE #1 8. COLLECTOR, DIE #1 STYLE 17: PIN 1. VCC 2. V2OUT 3. V1OUT 4. TXE 5. RXE 6. VEE 7. GND 8. ACC STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE STYLE 19: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. MIRROR 2 7. DRAIN 1 8. MIRROR 1 STYLE 20: PIN 1. SOURCE (N) 2. GATE (N) 3. SOURCE (P) 4. GATE (P) 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 21: PIN 1. CATHODE 1 2. CATHODE 2 3. CATHODE 3 4. CATHODE 4 5. CATHODE 5 6. COMMON ANODE 7. COMMON ANODE 8. CATHODE 6 STYLE 22: PIN 1. I/O LINE 1 2. COMMON CATHODE/VCC 3. COMMON CATHODE/VCC 4. I/O LINE 3 5. COMMON ANODE/GND 6. I/O LINE 4 7. I/O LINE 5 8. COMMON ANODE/GND STYLE 23: PIN 1. LINE 1 IN 2. COMMON ANODE/GND 3. COMMON ANODE/GND 4. LINE 2 IN 5. LINE 2 OUT 6. COMMON ANODE/GND 7. COMMON ANODE/GND 8. LINE 1 OUT STYLE 24: PIN 1. BASE 2. EMITTER 3. COLLECTOR/ANODE 4. COLLECTOR/ANODE 5. CATHODE 6. CATHODE 7. COLLECTOR/ANODE 8. COLLECTOR/ANODE STYLE 25: PIN 1. VIN 2. N/C 3. REXT 4. GND 5. IOUT 6. IOUT 7. IOUT 8. IOUT STYLE 26: PIN 1. GND 2. dv/dt 3. ENABLE 4. ILIMIT 5. SOURCE 6. SOURCE 7. SOURCE 8. VCC STYLE 29: PIN 1. BASE, DIE #1 2. EMITTER, #1 3. BASE, #2 4. EMITTER, #2 5. COLLECTOR, #2 6. COLLECTOR, #2 7. COLLECTOR, #1 8. COLLECTOR, #1 STYLE 30: PIN 1. DRAIN 1 2. DRAIN 1 3. GATE 2 4. SOURCE 2 5. SOURCE 1/DRAIN 2 6. SOURCE 1/DRAIN 2 7. SOURCE 1/DRAIN 2 8. GATE 1 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB STYLE 27: PIN 1. ILIMIT 2. OVLO 3. UVLO 4. INPUT+ 5. SOURCE 6. SOURCE 7. SOURCE 8. DRAIN STYLE 28: PIN 1. SW_TO_GND 2. DASIC_OFF 3. DASIC_SW_DET 4. GND 5. V_MON 6. VBULK 7. VBULK 8. VIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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