MC12093D

MC12093 ÷2, ÷4, ÷8 1.1 GHz Low Power Prescaler with Stand-By Mode Description http://onsemi.com MARKING DIAGRAM 8 SO−8 D SUFFIX CASE 751 8 1 1 DFN8 MN SUFFIX CASE 506AA 1 Features • • • • • • • 1.1 GHz Toggle Frequency Supply Voltage 2.7 V to 5.5 Vdc Low Power 3.0 mA Typical Operating Temperature −40°C to 85°C Divide by 2, 4 or 8 Selected by SW1 and SW2 Pins On−Chip Termination Pb−Free Packages are Available A L Y W G SW2 Divide Ratio L L 8 H L 4 L H 4 H H 2 4 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS Table 1. FUNCTIONAL TABLE SW 12093 ALYW G 6B DG G The MC12093 is a single modulus prescaler for low power frequency division of a 1.1 GHz high frequency input signal. MOSAIC V™ technology is utilized to achieve low power dissipation of 6.75 mW at a minimum supply voltage of 2.7 V. On−chip output termination provides output current to drive a 2.0 pF (typical) high impedance load. If additional drive is required for the prescaler output, an external resistor can be added parallel from the OUT pin to GND to increase the output power. Care must be taken not to exceed the maximum allowable current through the output. Divide ratio control inputs SW1 and SW2 select the required divide ratio of ÷2, ÷4, or ÷8. Stand−By mode is featured to reduce current drain to 50 mA typical when the standby pin SB is switched LOW disabling the prescaler. IN VCC SW2 OUT 1 8 2 7 3 6 4 5 IN SB SW1 Gnd (Top View) A LOW on the Stand−By Pin 7 disables the device. 1. SW1 & SW2: H = (VCC − 0.5 V) to VCC; L = Open. 2. SB: H = 2.0 V to VCC, L = GND to 0.8 V. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. IN ÷2 ÷4 ÷8 Figure 1. Function Chart © Semiconductor Components Industries, LLC, 2008 August, 2008 − Rev. 7 1 Publication Order Number: MC12093/D MC12093 VCC = 2.7 to 5.5 V C3 C1 VCC IN SB SW1 50W SW2 IN OUT GND C2 C4 EXTERNAL COMPONENTS C1 = C2 = 1000 pF C3 = 0.1 mF C4 = 2.0 pF Load Figure 2. AC Test Circuit Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 DFN8 Flammability Rating Oxygen Index: 28 to 34 Transistor Count > 4 kV > 200 V > 2 kV Pb Pkg Pb−Free Pkg Level 1 Level 1 Level 1 Level 1 UL 94 V−0 @ 0.125 in 125 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Rating Value Unit VCC Power Supply Voltage, Pin 2 −0.5 to 6.0 Vdc TA Operating Temperature Range −40 to 85 °C Tstg Storage Temperature Range −65 to 150 °C IO Maximum Output Current, Pin 4 4.0 mA qJC Thermal Resistance (Junction−to−Case) (Note 2) DFN8 35 to 40 °C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. NOTE: ESD data available upon request. 2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power). For DFN8 only, thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. http://onsemi.com 2 MC12093 Table 4. ELECTRICAL CHARACTERISTICS (VCC = 2.7 to 5.5 V; TA = −40 to 85°C) Characteristic Symbol Min Typ Max Unit 0.1 1.4 1.1 GHz − 3.0 4.5 mA ft Toggle Frequency (Sine Wave) ICC Supply Current ISB Stand−By Current − 120 200 mA VIH1 Stand−By Input HIGH (SB) 2.0 − VCC V VIL1 Stand−By Input LOW (SB) Gnd − 0.8 V VIH2 Divide Ratio Control Input HIGH (SW1 & SW2) VCC − 0.5 VCC VCC + 0.5 V VIL2 Divide Ratio Control Input LOW (SW1 & SW2) OPEN OPEN OPEN VOUT Output Voltage Swing (2.0 pF Load) Output Frequency 12.5−350 MHz (Note 1) Output Frequency 350−400 MHz (Note 2) Output Frequency 400−450 MHz (Note 3) Output Frequency 450−550 MHz (Note 4) 0.6 0.5 0.4 0.3 0.80 0.70 0.55 0.45 − − − − VIN Input Voltage Sensitivity 100 400 − − 1000 1000 1. 2. 3. 4. 250−1100 MHz 100−250 MHz Vpp mVpp Input frequency 1.1 GHz, ÷8, minimum output frequency of 12.5 MHz. Input frequency 700−800 MHz, ÷2. Input frequency 800−900 MHz, ÷2. Input frequency 900−1100 MHz, ÷2. ORDERING INFORMATION Package Shipping† SOIC−8 98 Units / Rail MC12093DG SOIC−8 (Pb−Free) 98 Units / Rail MC12093DR2 SOIC−8 2500 / Tape & Reel SOIC−8 (Pb−Free) 2500 / Tape & Reel MC120932MNR4 DFN8 1000 / Tape & Reel MC12093MNR4G DFN8 (Pb−Free) 1000 / Tape & Reel Device MC12093D MC12093DR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 MC12093 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AG −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 4 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC12093 PACKAGE DIMENSIONS DFN8 CASE 506AA−01 ISSUE C D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B PIN ONE REFERENCE 2X 0.10 C 2X ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ TOP VIEW 0.10 C 0.08 C SEATING PLANE MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 −−− 0.25 0.35 A 0.10 C 8X DIM A A1 A3 b D D2 E E2 e K L E (A3) SIDE VIEW A1 C D2 e e/2 4 1 8X L E2 K 8 5 8X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). MOSAIC V is a trademark of Motorola, Inc. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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