MC14007UB
Dual Complementary Pair
Plus Inverter
The MC14007UB multipurpose device consists of three N−Channel
and three P−Channel enhancement mode devices packaged to provide
access to each device. These versatile parts are useful in inverter
circuits, pulse−shapers, linear amplifiers, high input impedance
amplifiers, threshold detectors, transmission gating, and functional
gating.
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Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power
•
•
•
•
Schottky TTL Load Over the Rated Temperature Range
Pin−for−Pin Replacement for CD4007A or CD4007UB
This device has 2 outputs without ESD Protection. Antistatic
precautions must be taken.
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
This Device is Pb−Free and is RoHS Compliant
SOIC−14
D SUFFIX
CASE 751A
PIN ASSIGNMENT
D−PB
1
14
VDD
S−PB
2
13
D−PA
GATEB
3
12
OUTC
S−NB
4
11
S−PC
D−NB
5
10
GATEC
GATEA
6
9
S−NC
VSS
7
8
D−NA
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
VDD
Parameter
Unit
−0.5 to +18.0
V
−0.5 to VDD +0.5
V
Input or Output Current
(DC or Transient) per Pin
± 10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
−55 to +125
°C
Tstg
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature
(8 second Soldering)
260
°C
Vin, Vout
Iin, Iout
DC Supply Voltage Range
Value
Input or Output Voltage Range
(DC or Transient)
July, 2014 − Rev. 11
MARKING DIAGRAM
14
14007UG
AWLYWW
1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/°C from 65°C 5o 125°C.
© Semiconductor Components Industries, LLC, 2014
D = DRAIN
S = SOURCE
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
MC14007UB/D
MC14007UB
A
A
12
B
9
B
1
C
2
3
INPUT
4
5
VDD
14
C
11
INPUT
1
0
OUTPUT CONDITION
13
INPUT
6
A = C, B = OPEN
A = B, C = OPEN
10
8
7
Substrates of P−Channel devices internally
connected to VDD; substrates of N−Channel
devices internally connected to VSS.
VSS
Figure 1. Typical Application: 2−Input Analog Multiplexer
14
13
2
1
11
6
12
7
8
3
4
5
10
VDD = PIN 14
VSS = PIN 7
Figure 2. Schematic
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2
9
MC14007UB
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
−55°C
Symbol
Characteristic
25°C
VDD
Vdc
Min
Max
Min
Typ
(Note 2)
125°C
Max
Min
Max
Unit
VOL
Output Voltage
Vin = VDD or 0
“0” Level
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
VOH
Vin = 0 or VDD
“1” Level
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
Vdc
5.0
10
15
−
−
−
1.0
2.0
2.5
−
−
−
2.25
4.50
6.75
1.0
2.0
2.5
−
−
−
1.0
2.0
2.5
“1” Level
5.0
10
15
4.0
8.0
12.5
−
−
−
4.0
8.0
12.5
2.75
5.50
8.25
−
−
−
4.0
8.0
12.5
−
−
−
Source
5.0
5.0
10
15
–3.0
–0.64
–1.6
–4.2
−
−
−
−
–2.4
–0.51
−1.3
−3.4
–5.0
–1.0
–2.5
–10
−
−
−
−
–1.7
−0.36
–0.9
−2.4
−
−
−
−
Sink
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
1.0
2.5
10
−
−
−
0.36
0.9
2.4
−
−
−
mAdc
VIL
Input Voltage
(VO = 4.5 Vdc)
(VO = 9.0 Vdc)
(VO = 13.5 Vdc)
VIH
(VO = 0.5 Vdc)
(VO = 1.0 Vdc)
(VO = 1.5 Vdc)
IOH
Output Drive Current
(VOH = 2.5 Vdc)
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
IOL
(VOL = 0.4 Vdc)
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
“0” Level
Vdc
Vdc
mAdc
Iin
Input Current
15
−
±0.1
−
±0.00001
±0.1
−
±1.0
mAdc
Cin
Input Capacitance
(Vin = 0)
−
−
−
−
5.0
7.5
−
−
pF
IDD
Quiescent Current
(Per Package)
5.0
10
15
−
−
−
0.25
0.5
1.0
−
−
−
0.0005
0.0010
0.0015
0.25
0.5
1.0
−
−
−
7.5
15
30
mAdc
Total Supply Current (Notes 3 and 4)
(Dynamic plus Quiescent,
Per Gate) (CL = 50 pF)
5.0
10
15
IT
IT = (0.7 mA/kHz) f + IDD/6
IT = (1.4 mA/kHz) f + IDD/6
IT = (2.2 mA/kHz) f + IDD/6
mAdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25°C.
4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL − 50) Vfk
where: IT is in mA (per package), CL in pF, V = (VDD − VSS) in volts, f in kHz is input frequency, and k = 0.003.
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3
MC14007UB
SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25°C)
VDD
Vdc
Min
Typ
(Note 6)
Max
Output Rise Time
tTLH = (1.2 ns/pF) CL + 30 ns
tTLH = (0.5 ns/pF) CL + 20 ns
tTLH = (0.4 ns/pF) CL + 15 ns
5.0
10
15
−
−
−
90
45
35
180
90
70
Output Fall Time
tTHL = (1.2 ns/pF) CL + 15 ns
tTHL = (0.5 ns/pF) CL + 15 ns
tTHL = (0.4 ns/pF) CL + 10 ns
5.0
10
15
−
−
−
75
40
30
150
80
60
Turn−Off Delay Time
tPLH = (1.5 ns/pF) CL + 35 ns
tPLH = (0.2 ns/pF) CL + 20 ns
tPLH = (0.15 ns/pF) CL + 17.5 ns
5.0
10
15
−
−
−
60
30
25
125
75
55
Turn−On Delay Time
tPHL = (1.0 ns/pF) CL + 10 ns
tPHL = (0.3 ns/pF) CL + 15 ns
tPHL = (0.2 ns/pF) CL + 15 ns
5.0
10
15
−
−
−
60
30
25
125
75
55
Symbol
tTLH
tTHL
tPLH
tPHL
Characteristic
Unit
ns
ns
ns
ns
5. The formulas given are for the typical characteristics only. Switching specifications are for device connected as an inverter.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
VDD = -VGS
VDD = VGS
14
IOH
7
14
VDS = VOH - VDD
IOL
VSS
7
All unused inputs connected to ground.
a TA = -55°C
b TA = +25°C
c TA = +125°C
-8.0
b
a
c
b
-12
b
c
-10 Vdc
-16
-15 Vdc
a
a
-20
-10
a
VGS = 15 Vdc
b
c
IOL , DRAIN CURRENT (mAdc)
IOH , DRAIN CURRENT (mAdc)
20
VGS = -5.0 Vdc
VSS
All unused inputs connected to ground.
0
-4.0
VDS = VOL
c
16
a
10 Vdc
12
b
c
a TA = -55°C
b TA = +25°C
c TA = +125°C
8.0
a
4.0
b 5.0 Vdc
c
0
-8.0
-6.0
-4.0
VDS, DRAIN VOLTAGE (Vdc)
-2.0
-0
0
Figure 3. Typical Output Source Characteristics
2.0
4.0
6.0
VDS, DRAIN VOLTAGE (Vdc)
8.0
Figure 4. Typical Output Sink Characteristics
These typical curves are not guarantees, but are design aids.
Caution: The maximum current rating is 10 mA per pin.
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4
10
MC14007UB
VDD
500mF
PULSE
GENERATOR
20 ns
0.01 mF
CERAMIC
ID
VSS
tPHL
Vout
7
VDD
90%
50%
10%
Vin
14
Vin
20 ns
VSS
tPLH
CL
VOH
90%
50%
10%
Vout
VOL
tTHL
tTLH
Figure 5. Switching Time and Power Dissipation Test Circuit and Waveforms
APPLICATIONS
The MC14007UB dual pair plus inverter, which has access to all its elements offers a number of unique circuit applications.
Figures 1, 6, and 7 are a few examples of the device flexibility.
+VDD
2
VDD
14
1
13
OUT = A+B•C
DISABLE3
11
INPUT10
11
12
10
12OUTPUT
2
B
1
8
OUTPUT
9
9
8
7
5
DISABLE6
3
7
C
4
INPUT
DISABLE
OUTPUT
1
0
X
0
0
1
0
1
OPEN
6
A
Substrates of P−Channel devices internally connected to VDD;
Substrates of N−Channel devices internally connected to VSS.
X = Don’t Care
Figure 7. AOI Functions Using Tree Logic
Figure 6. 3−State Buffer
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5
MC14007UB
ORDERING INFORMATION
Package
Shipping†
MC14007UBDG
SOIC−14
(Pb−Free)
55 Units / Rail
MC14007UBDR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
NLV14007UBDR2G*
SOIC−14
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE L
14
1
SCALE 1:1
D
DATE 03 FEB 2016
A
B
14
8
A3
E
H
L
1
0.25
B
M
DETAIL A
7
13X
M
b
0.25
M
C A
S
B
S
0.10
X 45 _
M
A1
e
DETAIL A
h
A
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
6.50
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
14
14X
1.18
XXXXXXXXXG
AWLYWW
1
1
1.27
PITCH
XXXXX
A
WL
Y
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42565B
SOIC−14 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SOIC−14
CASE 751A−03
ISSUE L
DATE 03 FEB 2016
STYLE 1:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. NO CONNECTION
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. NO CONNECTION
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 2:
CANCELLED
STYLE 3:
PIN 1. NO CONNECTION
2. ANODE
3. ANODE
4. NO CONNECTION
5. ANODE
6. NO CONNECTION
7. ANODE
8. ANODE
9. ANODE
10. NO CONNECTION
11. ANODE
12. ANODE
13. NO CONNECTION
14. COMMON CATHODE
STYLE 4:
PIN 1. NO CONNECTION
2. CATHODE
3. CATHODE
4. NO CONNECTION
5. CATHODE
6. NO CONNECTION
7. CATHODE
8. CATHODE
9. CATHODE
10. NO CONNECTION
11. CATHODE
12. CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 5:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. NO CONNECTION
7. COMMON ANODE
8. COMMON CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 6:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. ANODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
STYLE 7:
PIN 1. ANODE/CATHODE
2. COMMON ANODE
3. COMMON CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. ANODE/CATHODE
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. COMMON CATHODE
12. COMMON ANODE
13. ANODE/CATHODE
14. ANODE/CATHODE
STYLE 8:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. ANODE/CATHODE
7. COMMON ANODE
8. COMMON ANODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. NO CONNECTION
12. ANODE/CATHODE
13. ANODE/CATHODE
14. COMMON CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42565B
SOIC−14 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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