DATA SHEET
www.onsemi.com
Ultra Low-Noise Low
Dropout Voltage Regulator
with 1.0 V ON/OFF Control
5
1
THIN SOT−23−5
SN SUFFIX
CASE 483
MC33761
The MC33761 is an Low DropOut (LDO) regulator featuring
excellent noise performances. Thanks to its innovative design, the
circuit reaches an impressive 40 mVRMS noise level without an
external bypass capacitor. Housed in a small SOT−23 5 leads−like
package, it represents the ideal designer’s choice when space and
noise are at premium. The absence of external bandgap capacitor
accelerates the response time to a wake−up signal and keeps it within
40 ms (in repetitive mode), making the MC33761 as a natural
candidate for portable applications.
The MC33761 also hosts a novel architecture which prevents
excessive undershoots in the presence of fast transient bursts, as in any
bursting systems.
Finally, with a static line regulation better than −75 dB, it naturally
shields the downstream electronics against choppy lines.
PIN CONNECTIONS AND
MARKING DIAGRAM
2
ON/OFF
3
LxxAYW G
G
•
•
•
•
•
•
•
•
•
•
GND
5
Vout
4
NC
Lxx
= Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
• Ultra−Low Noise: 150 nV/√Hz @ 100 Hz, 40 mVRMS
•
1
(Top View)
Features
100 Hz−100 kHz Typical, Iout = 60 mA, Co = 1.0 mF
Fast Response Time from OFF to ON: 40 ms Typical at a 200 Hz
Repetition Rate
Ready for 1.0 V Platforms: ON with a 900 mV High Level
Nominal Output Current of 80 mA with a 100 mA Peak Capability
Typical Dropout of 90 mV @ 30 mA, 160 mV @ 80 mA
Ripple Rejection: 70 dB @ 1.0 kHz
1.5% Output Precision @ 25°C
Thermal Shutdown
Vout Available at 2.8 V, 2.9 V
Operating Range from −40 to +85°C
Dual Version is Available as MC33762
These are Pb−Free Devices
Vin
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ON/
OFF 3
NC
4
Thermal
On/Off
1
Vin
5
Vout
Shutdown
Band Gap
Reference
*Current Limit
*Antisaturation Protection
GND
2 *Load Transient Improvement
Figure 1. Simplified Block Diagram
Applications
• Noise Sensitive Circuits: VCOs RF Stages, etc.
• Bursting Systems (TDMA Phones)
• All Battery Operated Devices
© Semiconductor Components Industries, LLC, 2006
October, 2021 − Rev. 9
1
Publication Order Number:
MC33761/D
MC33761
PIN FUNCTION DESCRIPTIONS
Pin #
Pin Name
1
Vin
2
GND
3
ON/OFF
4
5
Function
Description
Powers the IC
A positive voltage up to 12 V can be applied upon this pin.
The IC’s ground
Shuts or wakes−up the IC
A 900 mV level on this pin is sufficient to start the IC. A 150 mV shuts it
down.
NC
None
It makes no arm to connect the pin to a known potential, like in a
pin−to−pin replacement case.
Vout
Delivers the output voltage
This pin requires a 1.0 mF output capacitor to be stable.
MAXIMUM RATINGS
Value
Pin #
Symbol
Min
Max
Unit
1
Vin
−
12
V
ESD Capability, HBM Model
All Pins
−
−
1.0
kV
ESD Capability, Machine Model
All Pins
−
−
200
V
Maximum Power Dissipation
NW Suffix, Plastic Package
Thermal Resistance Junction−to−Air
−
PD
−
Internally Limited
W
RqJA
−
210
°C/W
Operating Ambient Temperature
Maximum Junction Temperature (Note 2)
Maximum Operating Junction Temperature (Note 3)
−
TA
TJmax
TJ
−
−
−
−40 to +85
150
125
°C
°C
°C
Storage Temperature Range
−
Tstg
−
−60 to +150
°C
Rating
Power Supply Voltage
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS
(For typical values TA = 25°C, for min/max values TA = −40°C to +85°C, max TJ = 125°C unless otherwise noted)
Pin #
Symbol
Min
Typ
Max
Unit
Input Voltage Range
3
VON/OFF
0
−
Vin
V
ON/OFF Input Resistance (all versions)
3
RON/OFF
−
250
−
kW
ON/OFF Control Voltages (Note 4)
Logic Zero, OFF State, IO = 50 mA
Logic One, ON State, IO = 50 mA
3
VON/OFF
−
900
−
−
150
−
Current Consumption in OFF State (all versions)
OFF Mode Current: Vin = Vout + 1.0 V, IO = 0, VOFF =
150 mV
−
IQOFF
−
0.1
2.0
mA
Current Consumption in ON State (all versions)
ON Mode Current: Vin = Vout + 1.0 V, IO = 0, VON = 3.5 V
−
IQON
−
180
−
mA
Current Consumption in ON State (all versions), ON Mode
Saturation Current: Vin = Vout − 0.5 V, No Output Load
−
IQSAT
−
800
−
mA
Current Limit Vin = Voutnom + 1.0 V,
Output is brought to Voutnom − 0.3 V (all versions)
−
IMAX
100
180
500
mA
5
Vout
2.462
2.5
2.537
V
2.8 V
5
Vout
2.758
2.8
2.842
V
2.9 V
5
Vout
2.857
2.9
2.943
V
Characteristics
LOGIC CONTROL SPECIFICATIONS
mV
CURRENTS PARAMETERS
OUTPUT VOLTAGES
Vout + 1.0 V < Vin < 6.0 V, TA = 25°C, 1.0 mA < Iout < 80 mA
2.5 V
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2
MC33761
ELECTRICAL CHARACTERISTICS (continued)
(For typical values TA = 25°C, for min/max values TA = −40°C to +85°C, max TJ = 125°C unless otherwise noted)
Pin #
Symbol
Min
Typ
Max
Unit
3.0 V
5
Vout
2.955
3.0
3.045
V
5.0 V
Characteristics
OUTPUT VOLTAGES
5
Vout
4.925
5.0
5.075
V
Other Voltages up to 5.0 V Available in 50 mV Increment
Steps
5
Vout
−1.5
X
+1.5
%
Vout + 1.0 V < Vin < 6.0 V, TA = −40°C to +85°C, 1.0 mA <
Iout < 80 mA
2.5 V
5
Vout
2.425
2.5
2.575
V
2.8 V
5
Vout
2.716
2.8
2.884
V
2.9 V
5
Vout
2.813
2.9
2.987
3.0 V
5
Vout
2.91
3.0
3.090
V
5.0 V
5
Vout
4.850
5.0
5.150
V
5
Vout
−3.0
X
+3.0
%
5/1
Regline
−
−
20
mV
5
Regload
−
−
40
mV
5
5
5
Vin−Vout
Vin−Vout
Vin−Vout
−
−
−
90
140
160
150
200
250
5/1
Ripple
−
−70
−
dB
Output Noise Density @ 1.0 kHz
5
−
−
150
−
nV/
√Hz
RMS Output Noise Voltage (all versions)
Cout = 1.0 mF, Iout = 50 mA, F = 100 Hz to 1.0 MHz
5
Noise
−
35
−
mV
Output Rise Time (all versions) Cout = 1.0 mF, Iout = 50 mA,
10% of Rising ON Signal to 90% of Nominal Vout
5
trise
−
40
−
ms
−
−
−
−
125
°C
Other Voltages up to 5.0 V Available in 50 mV Increment
Steps
LINE AND LOAD REGULATION, DROPOUT VOLTAGES
Line Regulation (all versions)
Vout + 1.0 V < Vin < 12 V, Iout = 80 mA
Load Regulation (all versions)
Vin = Vout + 1.0 V, Cout = 1.0 mF, Iout = 1.0 to 80 mA
Dropout Voltage (all versions) (Note 1)
Iout = 30 mA
Iout = 60 mA
Iout = 80 mA
mV
DYNAMIC PARAMETERS
Ripple Rejection (all versions)
Vin = Vout + 1.0 V + 1.0 kHz 100 mVpp Sinusoidal Signal
THERMAL SHUTDOWN
Thermal Shutdown (all versions)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Vout is brought to Vout − 100 mV.
2. Internally limited by shutdown.
3. Specifications are guaranteed below this value.
4. Voltage slope should be greater than 2.0 mV/ms.
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3
MC33761
DEFINITIONS
Load Regulation
Line Regulation
The change in output voltage for a change in output
current at a constant chip temperature.
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by using pulse technique such that the average
chip temperature is not significantly affected. One usually
distinguishes static line regulation or DC line regulation (a
DC step in the input voltage generates a corresponding step
in the output voltage) from ripple rejection or audio
susceptibility where the input is combined with a frequency
generator to sweep from a few hertz up to a defined
boundary while the output amplitude is monitored.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 100 mV
below its nominal value (which is measured at 1.0 V
differential value). The dropout level is affected by the chip
temperature, load current and minimum input supply
requirements.
Thermal Protection
Output Noise Voltage
This is the integrated value of the output noise over a
specified frequency range. Input voltage and output current
are kept constant during the measurement. Results are
expressed in mVRMS.
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 125°C,
the regulator turns off. This feature is provided to prevent
catastrophic failures from accidental overheating.
Maximum Power Dissipation
Maximum Package Power Dissipation
The maximum total dissipation for which the regulator
will operate within its specs.
The maximum power package power dissipation is the
power dissipation level at which the junction temperature
reaches its maximum operating value, i.e. 125°C.
Depending on the ambient temperature, it is possible to
calculate the maximum power dissipation and thus the
maximum available output current.
Quiescent Current
The quiescent current is the current which flows through
the ground when the LDO operates without a load on its
output: internal IC operation, bias etc. When the LDO
becomes loaded, this term is called the Ground current. It is
actually the difference between the input current (measured
through the LDO input pin) and the output current.
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4
MC33761
CHARACTERIZATION CURVES
All curves taken with Vin = Vout + 1.0 V, Vout = 2.8 V, Cout = 1.0 mF
4.5
185
GROUND CURRENT (mA)
4.0
3.5
QUIESCENT CURRENT (m A)
−40°C
25°C
85°C
3.0
2.5
2.0
1.5
1.0
180
175
170
0.5
0
0
20
40
60
OUTPUT CURRENT (mA)
80
165
−60
100
Figure 2. Ground Current versus
Output Current
80
100
2.805
150
25°C
−40°C
100
50
20
40
60
OUTPUT CURRENT (mA)
80
40°C
2.795
2.790
2.785
25°C
0°C
2.780
−20°C
2.775
100
85°C
2.800
−40°C
0
20
Figure 4. Dropout versus Output Current
40
60
OUTPUT CURRENT (mA)
80 mA
160
60 mA
140
120
30 mA
100
80
60
40
20
0
−60
1.0 mA
−40
−20
80
Figure 5. Output Voltage versus
Output Current
180
DROPOUT VOLTAGE (mV)
0
OUTPUT VOLTAGE (V)
85°C
DROPOUT (mV)
−20
0
20
40
60
AMBIENT TEMPERATURE (°C)
Figure 3. Quiescent Current versus
Temperature
200
0
−40
20
40
0
TEMPERATURE (°C)
60
80
Figure 6. Dropout versus Temperature
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5
100
100
MC33761
APPLICATION HINTS
Input Decoupling
Protections
As with any regulator, it is necessary to reduce the
dynamic impedance of the supply rail that feeds the
component. A 1.0 mF capacitor either ceramic or tantalum is
recommended and should be connected close to the
MC33761 package. Higher values will correspondingly
improve the overall line transient response.
The MC33761 hosts several protections, giving natural
ruggedness and reliability to the products implementing the
component. The output current is internally limited to a
maximum value of 180 mA typical while temperature
shutdown occurs if the die heats up beyond 125°C. These
values let you assess the maximum differential voltage the
device can sustain at a given output current before its
protections come into play.
The maximum dissipation the package can handle is given
by:
Output Decoupling
Thanks to a novel concept, the MC33761 is a stable
component and does not require any specific Equivalent
Series Resistance (ESR) neither a minimum output current.
Capacitors exhibiting ESRs ranging from a few mW up to
3.0 W can thus safely be used. The minimum decoupling
value is 1.0 mF and can be augmented to fulfill stringent load
transient requirements. The regulator accepts ceramic chip
capacitors as well as tantalum devices.
T
*T
A
P max + Jmax
R
qJA
If TJmax is limited to 125°C, then the MC33761 can
dissipate up to 470 mW @ 25°C. The power dissipated by
the MC33761 can be calculated from the following formula:
ǒ
Noise Decoupling
Ptot + V
Unlike other LDOs, the MC33761 is a true low−noise
regulator. Without the need of an external bypass capacitor,
it typically reaches the incredible level of 40 mVRMS overall
noise between 100 Hz and 100 kHz. To give maximum
insight on noise specifications, onsemi includes spectral
density graphics. The classical bypass capacitor impacts the
start−up phase of standard LDOs. However, thanks to its
low−noise architecture, the MC33761 operates without a
bypass element and thus offers a typical 40 ms start−up
phase.
in
I
Ǔ
(I ) ) ǒV * V outǓ
gnd out
in
I out
or
Vin max +
Ptot ) V out
I
gnd
I out
) I out
If a 80 mA output current is needed, the ground current is
extracted from the data−sheet curves: 4.0 mA @ 80 mA. For
a MC33761SNT1−28 (2.8 V) delivering 80 mA and
operating at 25°C, the maximum input voltage will then be
8.3 V.
Typical Applications
The following picture portrays the typical application of
the MC33761.
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6
MC33761
Dropout
5
1
Input
Permanently
Enables the IC
When Closed
+
Charge
Output
2
3
C3
1 mF
4
MC33761
On/Off
R1
100 k
+
C2
1.0 mF
Figure 7. A Typical Application Schematic
As for any low noise designs, particular care has to be
taken when tackling Printed Circuit Board (PCB) layout.
The figure below gives an example of a layout where stray
inductances/capacitances are minimized. This layout is the
basis for the MC33761 performance evaluation board. The
BNC connectors give the user an easy and quick evaluation
mean.
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7
MC33761
UNDERSTANDING THE LOAD TRANSIENT IMPROVEMENT
During this decreasing phase, the LDO stops the PNP bias
and one can consider the LDO asleep (Figure 8). If by
misfortune a current shot appears, the reaction time is
incredibly lengthened and a strong undershoot takes place.
This reaction is clearly not acceptable for line sensitive
devices, such as VCOs or other Radio−Frequency parts.
This problem is dramatically exacerbated when the output
current drops to zero rather than a few mA. In this later case,
the internal feedback network is the only discharge path,
accordingly lengthening the output voltage decay period
(Figure 9).
The MC33761 cures this problem by implementing a
clever design where the LDO detects the presence of the
overshoot and forces the system to go back to steady−state
as soon as possible, ready for the next shot. Figure 10 and 11
show how it positively improves the response time and
decreases the negative peak voltage.
The MC33761 features a novel architecture which allows
the user to easily implement the regulator in burst systems
where the time between two current shots is kept very small.
The quality of the transient response time is related to
many parameters, among which the closed−loop bandwidth
with the corresponding phase margin plays an important
role. However, other characteristics also come into play like
the series pass transistor saturation. When a current
perturbation suddenly appears on the output, e.g. a load
increase, the error amplifier reacts and actively biases the
PNP transistor. During this reaction time, the LDO is in
open−loop and the output impedance is rather high. As a
result, the voltage brutally drops until the error amplifier
effectively closes the loop and corrects the output error.
When the load disappears, the opposite phenomenon takes
place with a positive overshoot. The problem appears when
this overshoot decays down to the LDO steady−state value.
Figure 8. A Standard LDO Behavior when the Load
Current Disappears
Figure 9. A Standard LDO Behavior when the Load
Current Appears in the Decay Zone
Figure 10. Without Load Transient Improvement
Figure 11. MC33761 with Load Transient Improvement
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8
MC33761
MC33761 HAS A FAST START−UP PHASE
Thanks to the lack of bypass capacitor the MC33761 is
able to supply its downstream circuitry as soon as the OFF
to ON signal appears. In a standard LDO, the charging time
of the external bypass capacitor hampers the response time.
A simple solution consists in suppressing this bypass
element but, unfortunately, the noise rises to an
unacceptable level. MC33761 offers the best of both worlds
since it no longer includes a bypass capacitor and starts in
less than 40 ms typically (Repetitive at 200 Hz). It also
ensures a low−noise level of 40 mVRMS 100 Hz−100 kHz.
The following picture details the typical 33761 start−up
phase.
Figure 12. Repetitive Start−Up Waveforms
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MC33761
TYPICAL TRANSIENT RESPONSES
Figure 13. Output is Pulsed from 2.0 mA to 80 mA
Figure 14. Discharge Effects from 0 to 40 mA
Figure 15. Load Transient Improvement Effect
Figure 16. Load Transient Improvement Effect
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MC33761
TYPICAL TRANSIENT RESPONSES
250
nV/sqrt Hz
200
Vin = Vout + 1 .0V
TA = 25°C
Cout = 1.0 mF
RMS Noise, IO = 50 mA:
20 Hz − 100 kHz: 27 mV
20 Hz − 1.0 MHz: 30 mV
IO = 50 mA
150
10 mA
100
50
RMS Noise, IO = 10 mA:
20 Hz − 100 kHz: 29 mV
20 Hz − 1.0 MHz: 31 mV
0
100
1,000
10,000
100,000
f, FREQUENCY (Hz)
1,000,000
Figure 17. MC33761 Typical Noise Density Performance
3.5
0
−10
2.5
(dB)
−40
Z O (OHMS)
−30
IO = 50 mA
−50
−60
−70
10 mA
−90
1,000
100
10,000
100,000
f, FREQUENCY (Hz)
10 mA
2.0
1.5
80 mA
1.0
Vin = VO + 1.0 V
TA = 25°C
Cout = 1.0 mF
−80
−100
IO = 1.0 mA
3.0
−20
0.5
1,000,000
0
20 mA
100
Figure 18. MC33761 Typical Ripple Rejection
Performance
1,000
100,000
10,000
f, FREQUENCY (Hz)
1,000,000
Figure 19. Typical Output Impedance plot
Cout = 1.0 mF, Vin = Vout + 1.0
ORDERING INFORMATION
Device
Specific Marking Code
Voltage Output
Package
Shipping†
MC33761SNT1−028G
L28
2.8 V
Thin SOT−23−5
(Pb−Free)
3000 / Tape & Reel
MC33761SNT1−029G
L29
2.9 V
Thin SOT−23−5
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
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11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE N
5
1
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
D 5X
NOTE 5
2X
DATE 12 AUG 2020
0.20 C A B
0.10 T
M
2X
0.20 T
5
B
1
4
2
B
S
3
K
DETAIL Z
G
A
A
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
0.05
H
C
SIDE VIEW
SEATING
PLANE
END VIEW
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
2.85
3.15
1.35
1.65
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
1.9
0.074
5
5
XXXAYWG
G
1
1
Analog
2.4
0.094
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
1.0
0.039
XXX MG
G
Discrete/Logic
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ARB18753C
TSOP−5
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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LITERATURE FULFILLMENT:
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onsemi Website: www.onsemi.com
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TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
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