MC74AC138, MC74ACT138
1-of-8
Decoder/Demultiplexer
T h e M C 7 4 A C 1 3 8 / 7 4 A C T 1 3 8 i s a h i g h −s p e e d 1 −o f −8
decoder/demultiplexer. This device is ideally suited for high−speed
bipolar memory chip select address decoding.
The multiple input enables allow parallel expansion to a 1−of−24
decoder using just three MC74AC138/74ACT138 devices or a
1−of−32 decoder using four MC74AC138/74ACT138 devices and one
inverter.
•
•
•
•
•
•
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MARKING
DIAGRAMS
16
Demultiplexing Capability
Multiple Input Enable for Easy Expansion
Active LOW Mutually Exclusive Outputs
Outputs Source/Sink 24 mA
′ACT138 Has TTL Compatible Inputs
These are Pb−Free Devices
SOIC−16
D SUFFIX
CASE 751B
16
1
xxx138G
AWLYWW
1
16
16
VCC
O0
O1
O2
O3
O4
O5
O6
16
15
14
13
12
11
10
9
1
xxx
138
ALYWG
G
TSSOP−16
DT SUFFIX
CASE 948F
1
xxx
= AC or ACT
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or G
= Pb−Free Package
1
A0
2
A1
3
A2
4
E1
5
E2
6
E3
7
O7
(Note: Microdot may be in either location)
8
GND
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
A0 A1 A2
E1 E2 E3
O0 O1 O2 O3 O4 O5 O6 O7
Figure 2. Logic Symbol
PIN ASSIGNMENT
PIN
FUNCTION
A0−A2
Address Inputs
E1−E2
Enable Inputs
E3
Enable Input
O0−O7
Outputs
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 7
1
Publication Order Number:
MC74AC138/D
MC74AC138, MC74ACT138
FUNCTIONAL DESCRIPTION
HIGH. This multiple enabled function allows easy parallel
expansion of the device to a 1−of−32 (5 lines to 32 lines)
decoder with just four MC74AC138/74ACT138 devices
and
one
inverter
(See
Figure
4).
The
MC74AC138/74ACT138 can be used as an 8−output
demultiplexer by using one of the active LOW Enable inputs
as the data input and the other Enable inputs as strobes. The
Enable inputs which are not used must be permanently tied
to their appropriate active−HIGH or active−LOW state.
The MC74AC138/74ACT138 high−speed 1−of−8
decoder/demultiplexer accepts three binary weighted inputs
(A0, A1, A2) and, when enabled, provides eight mutually
exclusive
active−LOW
outputs
(O0−O7).
The
MC74AC138/74ACT138 features three Enable inputs, two
active−LOW (E1, E2) and one active−HIGH (E3). All
outputs will be HIGH unless E1 and E2 are LOW and E3 is
TRUTH TABLE
Inputs
Outputs
E1
E2
E3
A0
A1
A2
O0
O1
O2
O3
O4
O5
O6
O7
H
X
X
X
H
X
X
X
L
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
H
L
L
H
H
L
L
L
L
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A2
07
NOTE:
A1
E1 E2 E3
A0
06
05
04
03
02
01
00
This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation
delays.
Figure 3. Logic Diagram
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2
MC74AC138, MC74ACT138
A0
A1
A2
′04
A3
A4
H
123
A0 A1 A2
E
00 01 02 03 04 05 06 07
123
A0 A1 A2
123
E
A0 A1 A2
00 01 02 03 04 05 06 07
E
00 01 02 03 04 05 06 07
00
123
A0 A1 A2
E
00 01 02 03 04 05 06 07
031
Figure 4. Expansion to 1−of−32 Decoding
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3
MC74AC138, MC74ACT138
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
*0.5 to )7.0
V
*0.5 v VI v VCC )0.5
V
*0.5 v VO v VCC )0.5
V
DC Input Diode Current
$20
mA
IOK
DC Output Diode Current
$50
mA
IO
DC Output Sink/Source Current
$50
mA
ICC
DC Supply Current per Output Pin
$50
mA
IGND
DC Ground Current per Output Pin
$50
mA
TSTG
Storage Temperature Range
*65 to )150
°C
TL
Lead temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction temperature under Bias
)150
°C
qJA
Thermal Resistance (Note 2)
SOIC
TSSOP
69.1
103.8
°C/W
PD
Power Dissipation in Still Air at 65°C (Note 3)
SOIC
TSSOP
500
500
mW
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ESD Withstand Voltage
Human Body Model (Note 4)
Machine Model (Note 5)
Charged Device Model (Note 6)
> 2000
> 200
> 1000
V
ILatch−Up
Latch−Up Performance
Above VCC and Below GND at 85°C (Note 7)
$100
mA
VCC
DC Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
(Note 1)
Level 1
Oxygen Index: 30% − 35%
UL 94 V−0 @ 0.125 in
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. The package thermal impedance is calculated in accordance with JESD51−7.
3. 500 mW at 65°C; derate to 300 mW by 10 mW/ from 65°C to 85°C.
4. Tested to EIA/JESD22−A114−A.
5. Tested to EIA/JESD22−A115−A.
6. Tested to JESD22−C101−A.
7. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
VIN, VOUT
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
Min
Typ
Max
Unit
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
−
VCC
VCC @ 3.0 V
−
150
−
VCC @ 4.5 V
−
40
−
VCC @ 5.5 V
−
25
−
VCC @ 4.5 V
−
10
−
VCC @ 5.5 V
−
8.0
−
−
−
140
°C
−40
25
85
°C
V
V
ns/V
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
Output Current − High
−
−
−24
mA
IOL
Output Current − Low
−
−
24
mA
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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4
MC74AC138, MC74ACT138
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74AC
74AC
TA = +25°C
TA =
−40°C to +85°C
Typ
VIH
VIL
VOH
VOL
Guaranteed Limits
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC − 0.1 V
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC − 0.1 V
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
V
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
5.5
−
±0.1
5.5
−
5.5
5.5
Maximum Low Level
Output Voltage
Maximum Input
Leakage Current
IOLD
†Minimum Dynamic
Output Current
ICC
Conditions
Minimum High Level
Input Voltage
IIN
IOHD
Unit
Maximum Quiescent
Supply Current
IOUT = −50 μA
V
*VIN = VIL or VIH
−12 mA
IOH
−24 mA
−24 mA
IOUT = 50 μA
V
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
±1.0
μA
VI = VCC, GND
−
75
mA
VOLD = 1.65 V Max
−
−
−75
mA
VOHD = 3.85 V Min
−
8.0
80
μA
VIN = VCC or GND
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
AC CHARACTERISTICS
Symbol
Parameter
VCC*
(V)
74AC
74AC
TA = +25°C
CL = 50 pF
TA = −40°C to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
An to On
3.3
5.0
1.5
1.5
8.5
6.5
13.0
9.5
1.5
1.5
15.0
10.5
ns
3−6
tPHL
Propagation Delay
An to On
3.3
5.0
1.5
1.5
8.0
6.0
12.5
9.0
1.5
1.5
14.0
10.5
ns
3−6
tPLH
Propagation Delay
E1 or E2 to On
3.3
5.0
1.5
1.5
11.0
8.0
15.0
11.0
1.5
1.5
16.0
12.0
ns
3−6
tPHL
Propagation Delay
E1 or E2 to On
3.3
5.0
1.5
1.5
9.5
7.0
13.5
9.5
1.5
1.5
15.0
10.5
ns
3−6
tPLH
Propagation Delay
E3 to On
3.3
5.0
1.5
1.5
11.0
8.0
15.5
11.0
1.5
1.5
16.5
12.5
ns
3−6
tPHL
Propagation Delay
E3 to On
3.3
5.0
1.5
1.5
8.5
6.0
13.0
8.0
1.5
1.0
14.0
9.5
ns
3−6
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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5
MC74AC138, MC74ACT138
DC CHARACTERISTICS
Symbol
VCC
(V)
Parameter
74ACT
74ACT
TA = +25°C
TA =
−40°C to +85°C
Typ
Unit
Conditions
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC − 0.1 V
VOH
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
4.5
5.5
−
−
3.86
4.86
3.76
4.76
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
4.5
5.5
−
−
0.36
0.36
0.44
0.44
V
*VIN = VIL or VIH
24 mA
IOL
24 mA
VOL
Maximum Low Level
Output Voltage
IOUT = −50 μA
*VIN = VIL or VIH
−24 mA
IOH
−24 mA
V
IOUT = 50 μA
V
IIN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
μA
VI = VCC, GND
ΔICCT
Additional Max. ICC/Input
5.5
0.6
−
1.5
mA
VI = VCC − 2.1 V
IOLD
†Minimum Dynamic
Output Current
5.5
−
−
75
mA
VOLD = 1.65 V Max
5.5
−
−
−75
mA
VOHD = 3.85 V Min
5.5
−
8.0
80
μA
VIN = VCC or GND
IOHD
ICC
Maximum Quiescent
Supply Current
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS
Symbol
Parameter
VCC*
(V)
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = −40°C to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
An to On
5.0
1.5
7.0
10.5
1.5
11.5
ns
3−6
tPHL
Propagation Delay
An to On
5.0
1.5
6.5
10.5
1.5
11.5
ns
3−6
tPLH
Propagation Delay
E1 or E2 to On
5.0
2.5
8.0
11.5
2.0
12.5
ns
3−6
tPHL
Propagation Delay
E1 or E2 to On
5.0
2.0
7.5
11.5
2.0
12.5
ns
3−6
tPLH
Propagation Delay
E3 to On
5.0
2.5
8.0
12.0
2.0
13.0
ns
3−6
tPHL
Propagation Delay
E3 to On
5.0
2.0
6.5
10.5
1.5
11.5
ns
3−6
*Voltage Range 5.0 V is 5.0 V ± 0.5 V
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
60
pF
VCC = 5.0 V
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6
MC74AC138, MC74ACT138
ORDERING INFORMATION
Package
Shipping†
MC74AC138DG
SOIC−16
(Pb−Free)
48 Units / Rail
MC74AC138DR2G
SOIC−16
(Pb−Free)
2500 Tape & Reel
MC74AC138DTR2G
TSSOP−16
(Pb−Free)
2500 Tape & Reel
MC74ACT138DG
SOIC−16
(Pb−Free)
48 Units / Rail
MC74ACT138DR2G
SOIC−16
(Pb−Free)
2500 Tape & Reel
MC74ACT138DTR2G
TSSOP−16
(Pb−Free)
2500 Tape & Reel
Device Order Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
DATE 29 DEC 2006
SCALE 1:1
−A−
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
9
−B−
1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
16 PL
0.25 (0.010)
M
T B
S
A
S
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR, DYE #1
BASE, #1
EMITTER, #1
COLLECTOR, #1
COLLECTOR, #2
BASE, #2
EMITTER, #2
COLLECTOR, #2
COLLECTOR, #3
BASE, #3
EMITTER, #3
COLLECTOR, #3
COLLECTOR, #4
BASE, #4
EMITTER, #4
COLLECTOR, #4
STYLE 4:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
STYLE 5:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
DRAIN, DYE #1
DRAIN, #1
DRAIN, #2
DRAIN, #2
DRAIN, #3
DRAIN, #3
DRAIN, #4
DRAIN, #4
GATE, #4
SOURCE, #4
GATE, #3
SOURCE, #3
GATE, #2
SOURCE, #2
GATE, #1
SOURCE, #1
STYLE 6:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
STYLE 7:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
SOURCE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE P‐CH
SOURCE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE N‐CH
COLLECTOR, DYE #1
COLLECTOR, #1
COLLECTOR, #2
COLLECTOR, #2
COLLECTOR, #3
COLLECTOR, #3
COLLECTOR, #4
COLLECTOR, #4
BASE, #4
EMITTER, #4
BASE, #3
EMITTER, #3
BASE, #2
EMITTER, #2
BASE, #1
EMITTER, #1
SOLDERING FOOTPRINT
8X
6.40
16X
1
1.12
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42566B
SOIC−16
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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F−01
ISSUE B
16
DATE 19 OCT 2006
1
SCALE 2:1
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
S
V
S
K
S
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
N
8
1
0.25 (0.010)
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.007
0.011
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
7.06
16
XXXX
XXXX
ALYW
1
1
0.65
PITCH
16X
0.36
DOCUMENT NUMBER:
DESCRIPTION:
16X
1.26
98ASH70247A
TSSOP−16
DIMENSIONS: MILLIMETERS
XXXX
A
L
Y
W
G or G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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