MC74AC139N

MC74AC139, MC74ACT139 Dual 1-of-4 Decoder/Demultiplexer The MC74AC139/74ACT139 is a high−speed, dual 1−of−4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually−exclusive active−LOW outputs. Each decoder has an active−LOW Enable input which can be used as a data input for a 4−output demultiplexer. Each half of the MC74AC139/74ACT139 can be used as a function generator providing four minterms of two variables. www.onsemi.com MARKING DIAGRAMS 16 Features • • • • • • Multifunctional Capability Two Completely Independent 1−of−4 Decoders Active LOW Mutually Exclusive Outputs Outputs Source/Sink 24 mA ′ACT139 Has TTL Compatible Inputs These are Pb−Free Devices SOIC−16 D SUFFIX CASE 751B 16 1 xxx139G AWLYWW 1 16 16 1 xxx 139 ALYWG G TSSOP−16 DT SUFFIX CASE 948F 1 VCC Eb A0b A1b O0b O1b O2b O3b 16 15 14 13 12 11 10 9 xxx = AC or ACT A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) 1 Ea 2 A0a 3 A1a 4 O0a 5 O1a 6 O2a 7 O3a 8 GND ORDERING INFORMATION Figure 1. Pinout: 16−Lead Packages Conductors (Top View) See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. PIN ASSIGNMENT PIN FUNCTION A0, A1 Address Inputs E Enable Inputs O0−O3 Outputs TRUTH TABLE Inputs Outputs E A0 A1 O0 O1 O2 O3 H L L L L X L H L H X L L H H H L H H H H H L H H H H H L H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © Semiconductor Components Industries, LLC, 2015 January, 2015 − Rev. 8 1 Publication Order Number: MC74AC139/D MC74AC139, MC74ACT139 E A0 A1 DECODER a O0 O1 O2 O3 E A0 A1 DECODER b O0 O1 O2 O3 Figure 2. Logic Symbol Ea 00a NOTE: A0a 01a 02a A1a Eb 03a A0b 00b 01b 02b A1b 03b This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram FUNCTIONAL DESCRIPTION E E A0 The MC74AC139/74ACT139 is a high−speed dual 1−of−4 decoder/demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A0−A1) and provides four mutually exclusive active−LOW outputs (O0−O3). Each decoder has an active−LOW enable (E). When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4−output demultiplexer application. Each half of the MC74AC139/74ACT139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 4, and thereby reducing the number of packages required in a logic network. O0 A1 E A0 O1 A0 2 O2 A1 E O3 A0 A1 Figure 4. Gate Functions (Each Half) www.onsemi.com O1 E O2 E A1 E A0 A1 A1 A0 O0 A1 A1 E A0 A0 O3 MC74AC139, MC74ACT139 MAXIMUM RATINGS Symbol Parameter Value Unit *0.5 to )7.0 V *0.5 v VI v VCC )0.5 V *0.5 v VO v VCC )0.5 V DC Input Diode Current $20 mA IOK DC Output Diode Current $50 mA IO DC Output Sink/Source Current $50 mA ICC DC Supply Current per Output Pin $50 mA IGND DC Ground Current per Output Pin $50 mA TSTG Storage Temperature Range *65 to )150 °C TL Lead temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction temperature under Bias )150 °C qJA Thermal Resistance (Note 2) SOIC TSSOP 69.1 103.8 °C/W PD Power Dissipation in Still Air at 65°C (Note 3) SOIC TSSOP 500 500 mW MSL Moisture Sensitivity FR Flammability Rating VESD ESD Withstand Voltage Human Body Model (Note 4) Machine Model (Note 5) Charged Device Model (Note 6) > 2000 > 200 > 1000 V ILatch−Up Latch−Up Performance Above VCC and Below GND at 85°C (Note 7) $100 mA VCC DC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK (Note 1) Level 1 Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. 2. The package thermal impedance is calculated in accordance with JESD51−7. 3. 500 mW at 65°C; derate to 300 mW by 10 mW/ from 65°C to 85°C. 4. Tested to EIA/JESD22−A114−A. 5. Tested to EIA/JESD22−A115−A. 6. Tested to JESD22−C101−A. 7. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage VIN, VOUT DC Input Voltage, Output Voltage (Ref. to GND) tr, tf Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs Min Typ Max Unit ′AC 2.0 5.0 6.0 ′ACT 4.5 5.0 5.5 0 − VCC VCC @ 3.0 V − 150 − VCC @ 4.5 V − 40 − VCC @ 5.5 V − 25 − VCC @ 4.5 V − 10 − VCC @ 5.5 V − 8.0 − − − 140 °C −40 25 85 °C V V ns/V tr, tf Input Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs TJ Junction Temperature (PDIP) TA Operating Ambient Temperature Range IOH Output Current − High − − −24 mA IOL Output Current − Low − − 24 mA ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. www.onsemi.com 3 MC74AC139, MC74ACT139 DC CHARACTERISTICS VIL VOH VOL TA = −40°C to +85°C Minimum High Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 V VOUT = 0.1 V or VCC − 0.1 V Maximum Low Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 V VOUT = 0.1 V or VCC − 0.1 V Minimum High Level Output Voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 V 3.0 4.5 5.5 − − − 2.56 3.86 4.86 2.46 3.76 4.76 3.0 4.5 5.5 0.002 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 5.5 − − − 0.36 0.36 0.36 0.44 0.44 0.44 5.5 − ±0.1 5.5 − 5.5 5.5 Maximum Low Level Output Voltage Maximum Input Leakage Current IOLD †Minimum Dynamic Output Current ICC TA = +25°C Typ Parameter IIN IOHD 74AC VCC (V) Symbol VIH 74AC Maximum Quiescent Supply Current Guaranteed Limits Unit Conditions IOUT = −50 mA *VIN = VIL or VIH −12 mA IOH −24 mA −24 mA V IOUT = 50 mA V V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA ±1.0 mA VI = VCC, GND − 75 mA VOLD = 1.65 V Max − − −75 mA VOHD = 3.85 V Min − 8.0 80 mA VIN = VCC or GND *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. AC CHARACTERISTICS Symbol Parameter 74AC 74AC TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF VCC* (V) Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay An to On 3.3 5.0 4.0 3.0 8.0 6.5 11.5 8.5 3.5 2.5 13 9.5 ns 3−6 tPHL Propagation Delay An to On 3.3 5.0 3.0 2.5 7.0 5.5 10 7.5 2.5 2.0 11 8.5 ns 3−6 tPLH Propagation Delay En to On 3.3 5.0 4.5 3.5 9.5 7.0 12 8.5 3.5 3.0 13 10 ns 3−6 tPHL Propagation Delay En to On 3.3 5.0 4.0 2.5 8.0 6.0 10 7.5 3.0 2.5 11 8.5 ns 3−6 *Voltage Range 3.3 V is 3.3 V ±0.3 V. *Voltage Range 5.0 V is 5.0 V ±0.5 V. www.onsemi.com 4 MC74AC139, MC74ACT139 DC CHARACTERISTICS Symbol Parameter 74ACT 74ACT TA = +25°C TA = −40°C to +85°C VCC (V) Typ Guaranteed Limits Unit Conditions VIH Minimum High Level Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V VOUT = 0.1 V or VCC − 0.1 V VIL Maximum Low Level Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V VOUT = 0.1 V or VCC − 0.1 V VOH Minimum High Level Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V 4.5 5.5 − − 3.86 4.86 3.76 4.76 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 4.5 5.5 − − 0.36 0.36 0.44 0.44 V *VIN = VIL or VIH 24 mA IOL 24 mA VOL Maximum Low Level Output Voltage IOUT = −50 mA *VIN = VIL or VIH −24 mA IOH −24 mA V IOUT = 50 mA V IIN Maximum Input Leakage Current 5.5 − ±0.1 ±1.0 mA VI = VCC, GND DICCT Additional Max. ICC/Input 5.5 0.6 − 1.5 mA VI = VCC − 2.1 V IOLD †Minimum Dynamic Output Current 5.5 − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 5.5 − 8.0 80 mA VIN = VCC or GND IOHD ICC Maximum Quiescent Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS Symbol Parameter 74ACT 74ACT TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF VCC* (V) Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay An to On 5.0 1.5 6.0 8.5 1.5 9.5 ns 3−6 tPHL Propagation Delay An to On 5.0 1.5 6.0 9.5 1.5 10.5 ns 3−6 tPLH Propagation Delay En to On 5.0 2.5 7.0 10.0 2.0 11.0 ns 3−6 tPHL Propagation Delay En to On 5.0 2.0 7.0 9.5 1.5 10.5 ns 3−6 *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol Parameter Value Typ Unit Test Conditions CIN Input Capacitance 4.5 pF VCC = 5.0 V CPD Power Dissipation Capacitance 40 pF VCC = 5.0 V www.onsemi.com 5 MC74AC139, MC74ACT139 ORDERING INFORMATION Package Shipping† MC74AC139DG SOIC−16 (Pb−Free) 48 Units / Rail MC74AC139DR2G SOIC−16 (Pb−Free) 2500 Tape & Reel MC74AC139DTR2G TSSOP−16 (Pb−Free) 2500 Tape & Reel MC74ACT139DG SOIC−16 (Pb−Free) 48 Units / Rail MC74ACT139DR2G SOIC−16 (Pb−Free) 2500 Tape & Reel MC74ACT139DTR2G TSSOP−16 (Pb−Free) 2500 Tape & Reel Device Order Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K DATE 29 DEC 2006 SCALE 1:1 −A− 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 −B− 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C −T− SEATING PLANE J M D DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 PL 0.25 (0.010) M T B S A S STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. COLLECTOR BASE EMITTER NO CONNECTION EMITTER BASE COLLECTOR COLLECTOR BASE EMITTER NO CONNECTION EMITTER BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. CATHODE ANODE NO CONNECTION CATHODE CATHODE NO CONNECTION ANODE CATHODE CATHODE ANODE NO CONNECTION CATHODE CATHODE NO CONNECTION ANODE CATHODE STYLE 3: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. COLLECTOR, DYE #1 BASE, #1 EMITTER, #1 COLLECTOR, #1 COLLECTOR, #2 BASE, #2 EMITTER, #2 COLLECTOR, #2 COLLECTOR, #3 BASE, #3 EMITTER, #3 COLLECTOR, #3 COLLECTOR, #4 BASE, #4 EMITTER, #4 COLLECTOR, #4 STYLE 4: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. STYLE 5: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. DRAIN, DYE #1 DRAIN, #1 DRAIN, #2 DRAIN, #2 DRAIN, #3 DRAIN, #3 DRAIN, #4 DRAIN, #4 GATE, #4 SOURCE, #4 GATE, #3 SOURCE, #3 GATE, #2 SOURCE, #2 GATE, #1 SOURCE, #1 STYLE 6: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE ANODE ANODE ANODE ANODE ANODE ANODE ANODE ANODE STYLE 7: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. SOURCE N‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) GATE P‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) SOURCE P‐CH SOURCE P‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) GATE N‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) SOURCE N‐CH COLLECTOR, DYE #1 COLLECTOR, #1 COLLECTOR, #2 COLLECTOR, #2 COLLECTOR, #3 COLLECTOR, #3 COLLECTOR, #4 COLLECTOR, #4 BASE, #4 EMITTER, #4 BASE, #3 EMITTER, #3 BASE, #2 EMITTER, #2 BASE, #1 EMITTER, #1 SOLDERING FOOTPRINT 8X 6.40 16X 1 1.12 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS DOCUMENT NUMBER: DESCRIPTION: 98ASB42566B SOIC−16 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−16 CASE 948F−01 ISSUE B 16 DATE 19 OCT 2006 1 SCALE 2:1 16X K REF 0.10 (0.004) 0.15 (0.006) T U M T U S V S K S ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 2X L/2 16 9 J1 B −U− L SECTION N−N J PIN 1 IDENT. N 8 1 0.25 (0.010) M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. N F DETAIL E −W− C 0.10 (0.004) −T− SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 7.06 16 XXXX XXXX ALYW 1 1 0.65 PITCH 16X 0.36 DOCUMENT NUMBER: DESCRIPTION: 16X 1.26 98ASH70247A TSSOP−16 DIMENSIONS: MILLIMETERS XXXX A L Y W G or G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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