MC74AC540N

MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 Octal Buffer/Line Driver with 3-State Outputs The MC74AC540/74ACT540 and MC74AC541/74ACT541 are octal buffer/line drivers designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. The MC74AC541/74ACT541 is a noninverting option of the MC74AC540/74ACT540. These devices are similar in function to the MC74AC240/74ACT240 and MC74AC244/74ACT244 while providing flow−through architecture (inputs on opposite side from outputs). This pinout arrangement makes these devices especially useful as output ports for microprocessors, allowing ease of layout and greater PC board density. www.onsemi.com SOIC−20W DW SUFFIX CASE 751D 1 TSSOP−20 DT SUFFIX CASE 948E Features • 3−State Outputs • Inputs and Outputs Opposite Side of Package, Allowing Easier • • • • • Interface to Microprocessors Outputs Source/Sink 24 mA MC74AC540/74ACT540 Provides Inverted Outputs MC74AC541/74ACT541 Provides Noninverted Outputs ′ACT540 and ′ACT541 Have TTL Compatible Inputs These are Pb−Free Devices 1 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 8 of this data sheet. TRUTH TABLE Inputs Outputs OE1 OE2 D ′540 ′541 L H X L L X H L H X X L L Z Z H H Z Z L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © Semiconductor Components Industries, LLC, 2015 March, 2015 − Rev. 9 1 Publication Order Number: MC74AC540/D MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 OE1 GND 1 20 VCC 2 19 OE2 3 OE1 1 20 VCC 2 19 OE2 18 3 18 4 17 4 17 5 16 5 16 6 15 6 15 7 14 7 14 8 13 8 13 9 12 9 12 10 11 10 11 GND Figure 1. MC74AC540/74ACT540 Figure 2. MC74AC541/74ACT541 www.onsemi.com 2 MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 MAXIMUM RATINGS Symbol Parameter Value Unit −0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) (Note 1) −0.5 to VCC +0.5 V VOUT IIK DC Input Diode Current ±20 mA IOK DC Output Diode Current ±50 mA IOUT DC Output Sink/Source Current ±50 mA ICC DC Supply Current, per Output Pin ±50 mA IGND DC Ground Current, per Output Pin ±100 mA TSTG Storage Temperature Range *65 to )150 _C TL Lead temperature, 1 mm from Case for 10 Seconds 260 _C TJ Junction Temperature Under Bias 140 _C qJA Thermal Resistance (Note 2) 65.8 110.7 _C/W MSL Moisture Sensitivity FR Flammability Rating VESD ILatchup SOIC TSSOP Level 1 Oxygen Index: 30% − 35% ESD Withstand Voltage Latchup Performance UL 94 V−0 @ 0.125 in Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) Above VCC and Below GND at 85_C (Note 6) > 2000 > 200 > 1000 V ±100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IOUT absolute maximum rating must be observed. 2. The package thermal impedance is calculated in accordance with JESD 51−7. 3. Tested to EIA/JESD22−A114−A. 4. Tested to EIA/JESD22−A115−A. 5. Tested to JESD22−C101−A. 6. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT tr, tf Parameter Supply Voltage Min Typ Max ′AC 2.0 5.0 6.0 ′ACT 4.5 5.0 5.5 0 − VCC VCC @ 3.0 V − 150 − VCC @ 4.5 V − 40 − VCC @ 5.5 V − 25 − VCC @ 4.5 V − 10 − VCC @ 5.5 V − 8.0 − −40 25 85 °C DC Input Voltage, Output Voltage (Ref. to GND) Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs Unit V V ns/V tr, tf Input Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs TA Operating Ambient Temperature Range IOH Output Current − High − − −24 mA IOL Output Current − Low − − 24 mA ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. www.onsemi.com 3 MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 DC CHARACTERISTICS VIL VOH VOL 74AC TA = −40°C to +85°C VCC (V) Typ Minimum High Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 V VOUT = 0.1 V or VCC − 0.1 V Maximum Low Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 V VOUT = 0.1 V or VCC − 0.1 V Minimum High Level Output Voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 V 3.0 4.5 5.5 − − − 2.56 3.86 4.86 2.46 3.76 4.76 3.0 4.5 5.5 0.002 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 5.5 − − − 0.36 0.36 0.36 0.44 0.44 0.44 Symbol VIH 74AC TA = +25°C Parameter Maximum Low Level Output Voltage Guaranteed Limits Unit Conditions IOUT = −50 mA V *VIN = VIL or VIH −12 mA IOH −24 mA −24 mA IOUT = 50 mA V V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA IIN Maximum Input Leakage Current 5.5 − ±0.1 ±1.0 mA VI = VCC, GND IOZ Maximum 3-State Current 5.5 − ±0.5 ±5.0 mA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND 5.5 − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 5.5 − 8.0 80 mA VIN = VCC or GND IOLD IOHD ICC †Minimum Dynamic Output Current Maximum Quiescent Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. www.onsemi.com 4 MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 AC CHARACTERISTICS (For Figures and Waveforms − See AND8277/D at www.onsemi.com) Symbol Parameter 74AC 74AC TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF VCC* (V) Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay Data to Output (′AC540) 3.3 5.0 1.5 1.5 5.5 4.0 7.5 6.0 1.0 1.0 8.0 6.5 ns 3−5 tPHL Propagation Delay Data to Output (′AC540) 3.3 5.0 1.5 1.5 5.0 4.0 7.0 5.5 1.0 1.0 7.5 6.0 ns 3−5 tPZH Output Enable Time (′AC540) 3.3 5.0 3.0 2.0 8.5 6.5 11 8.5 2.5 2.0 12 9.5 ns 3−7 tPZL Output Enable Time (′AC540) 3.3 5.0 2.5 2.0 7.5 6.0 10 7.5 2.0 1.5 11 8.5 ns 3−8 tPHZ Output Disable Time (′AC540) 3.3 5.0 2.5 1.5 8.5 7.5 13 10.5 1.5 1.0 14 11 ns 3−7 tPLZ Output Disable Time (′AC540) 3.3 5.0 2.0 1.5 7.0 6.0 10 8.0 2.0 1.5 11 9.0 ns 3−8 tPLH Propagation Delay Data to Output (′AC541) 3.3 5.0 2.0 1.5 5.5 4.0 8.0 6.0 1.5 1.0 9.0 6.5 ns 3−5 tPHL Propagation Delay Data to Output (′AC541) 3.3 5.0 2.0 1.5 5.5 4.0 8.0 6.0 1.5 1.0 8.5 6.5 ns 3−5 tPZH Output Enable Time (′AC541) 3.3 5.0 3.0 2.0 8.0 6.0 11.5 8.5 3.0 1.5 12.5 9.5 ns 3−7 tPZL Output Enable Time (′AC541) 3.3 5.0 2.5 1.5 7.0 5.5 10 7.5 2.5 1.0 11.5 8.5 ns 3−8 tPHZ Output Disable Time (′AC541) 3.3 5.0 3.5 2.0 9.0 7.0 12.5 9.5 2.5 1.0 14 10.5 ns 3−7 tPLZ Output Disable Time (′AC541) 3.3 5.0 2.5 2.0 6.5 5.5 9.5 7.5 2.0 1.0 10.5 8.5 ns 3−8 *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. www.onsemi.com 5 MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 DC CHARACTERISTICS 74ACT Symbol Parameter 74ACT TA = +25°C VCC (V) Typ TA = −40°C to +85°C Guaranteed Limits Unit Conditions VIH Minimum High Level Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V VOUT = 0.1 V or VCC − 0.1 V VIL Maximum Low Level Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V VOUT = 0.1 V or VCC − 0.1 V VOH Minimum High Level Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V 4.5 5.5 − − 3.86 4.86 3.76 4.76 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 4.5 5.5 − − 0.36 0.36 0.44 0.44 V *VIN = VIL or VIH 24 mA IOL 24 mA Maximum Input Leakage Current 5.5 − ±0.1 ±1.0 mA VI = VCC, GND Additional Max. ICC/Input 5.5 0.6 − 1.5 mA VI = VCC − 2.1 V Maximum 3-State Current 5.5 − ±0.5 ±5.0 mA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND 5.5 − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 5.5 − 8.0 80 mA VIN = VCC or GND VOL IIN DICCT IOZ IOLD IOHD ICC Maximum Low Level Output Voltage †Minimum Dynamic Output Current Maximum Quiescent Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. www.onsemi.com 6 V V IOUT = −50 mA *VIN = VIL or VIH IOH −24 mA −24 mA IOUT = 50 mA MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 AC CHARACTERISTICS (For Figures and Waveforms − See AND8277/D at www.onsemi.com) Symbol Parameter VCC* (V) 74ACT 74ACT TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay Data to Output (′ACT540) 5.0 1.0 − 7.0 1.0 7.5 ns 3−5 tPHL Propagation Delay Data to Output (′ACT540) 5.0 1.0 − 8.0 1.0 8.5 ns 3−5 tPZH Output Enable Time (′ACT540) 5.0 1.0 − 10.5 1.0 11.5 ns 3−7 tPZL Output Enable Time (′ACT540) 5.0 1.0 − 9.5 1.0 10.5 ns 3−8 tPHZ Output Disable Time (′ACT540) 5.0 1.0 − 12.0 1.0 12.5 ns 3−7 tPLZ Output Disable Time (′ACT540) 5.0 1.5 − 9.0 1.0 10 ns 3−8 tPLH Propagation Delay Data to Output (′ACT541) 5.0 1.5 − 7.5 1.0 8.0 ns 3−5 tPHL Propagation Delay Data to Output (′ACT541) 5.0 1.5 − 7.5 1.0 8.0 ns 3−5 tPZH Output Enable Time (′ACT541) 5.0 2.0 − 10.0 1.0 11.0 ns 3−7 tPZL Output Enable Time (′ACT541) 5.0 1.5 − 9.5 1.0 10.5 ns 3−8 tPHZ Output Disable Time (′ACT541) 5.0 2.0 − 11.0 1.0 12.0 ns 3−7 tPLZ Output Disable Time (′ACT541) 5.0 2.0 − 9.0 1.0 10 ns 3−8 *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol Value Typ Unit Test Conditions CIN Input Capacitance Parameter 4.5 pF VCC = 5.0 V CPD Power Dissipation Capacitance 30 pF VCC = 5.0 V www.onsemi.com 7 MC74AC540, MC74ACT540, MC74AC541, MC74ACT541 ORDERING INFORMATION Package Shipping† MC74AC540DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74AC540DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel MC74ACT540DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74ACT540DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel MC74ACT540DTR2G TSSOP−20 (Pb−Free) 2500 / Tape & Reel MC74AC541DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74AC541DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel MC74ACT541DWG SOIC−20 (Pb−Free) 38 Units / Rail MC74ACT541DWR2G SOIC−20 (Pb−Free) 1000 / Tape & Reel MC74AC541DTR2G TSSOP−20 (Pb−Free) 2500 / Tape & Reel MC74ACT541DTG TSSOP−20 (Pb−Free) 75 Units / Rail MC74ACT541DTR2G TSSOP−20 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These packages are inherently Pb−Free. MARKING DIAGRAMS SOIC−20W TSSOP−20 20 20 AC 54x ALYWG G AC54x AWLYYWWG 1 1 20 20 ACT 54x ALYWG G ACT54x AWLYYWWG 1 1 x = 0 or 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−20 WB CASE 751D−05 ISSUE H DATE 22 APR 2015 SCALE 1:1 A 20 q X 45 _ M E h 0.25 H NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 1 10 20X B b 0.25 M T A S B DIM A A1 b c D E e H h L q S L A 18X e SEATING PLANE A1 c T GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT* 20 20X 20X 1.30 0.52 20 XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG 11 1 11.00 1 XXXXX A WL YY WW G 10 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ 98ASB42343B SOIC−20 WB = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−20 WB CASE 948E ISSUE D DATE 17 FEB 2016 SCALE 2:1 20X 0.15 (0.006) T U 2X L K REF 0.10 (0.004) S L/2 20 M T U S V ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ K K1 S J J1 11 B SECTION N−N −U− PIN 1 IDENT 0.25 (0.010) N 1 10 M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. N F DETAIL E −W− C G D H DETAIL E 0.100 (0.004) −T− SEATING PLANE DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 7.06 XXXX XXXX ALYWG G 1 0.65 PITCH 16X 0.36 16X 1.26 DOCUMENT NUMBER: 98ASH70169A DESCRIPTION: TSSOP−20 WB A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DIMENSIONS: MILLIMETERS Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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