MC74LCX07
Low-Voltage CMOS Hex
Buffer with Open Drain
Outputs
With 5 V−Tolerant Inputs
The MC74LCX07 is a high performance hex buffer operating from
a 2.3 to 3.6 V supply. High impedance TTL compatible inputs
significantly reduce current loading to input drivers. These LCX
devices have open drain outputs which provide the ability to set output
levels, or do active−HIGH AND or active−LOW OR functions. A VI
specification of 5.5 V allows MC74LCX07 inputs to be safely driven
from 5.0 V devices.
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MARKING
DIAGRAMS
14
14
1
Features
LCX07G
AWLYWW
1
Designed for 2.3 to 3.6 V VCC Operation
5.0 V Tolerant Inputs/Outputs
14
14
LVTTL Compatible
LVCMOS Compatible
1
24 mA Output Sink Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
Wired−OR, Wired−AND
Output Level Can Be Set Externally Without Affecting Speed of
SOIC−14
D SUFFIX
CASE 751A
Device
ESD Performance:
Human Body Model >1500 V;
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC
A3
O3
A4
O4
A5
O5
14
13
12
11
10
9
8
1
2
3
4
5
6
7
A0
O0
A1
O1
A2
O2
GND
TSSOP−14
DT SUFFIX
CASE 948G
1
LCX
07
ALYWG
G
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G
= Pb−Free Package
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Figure 1. Pinout: 14−Lead (Top View)
Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 14
1
Publication Order Number:
MC74LCX07/D
MC74LCX07
A0
A1
A2
A3
A4
A5
1
3
5
13
11
9
*
2
*
4
*
6
*
12
*
10
*
8
O0
PIN NAMES
O1
O2
O3
Pins
Function
An
On
Data Inputs
Outputs
TRUTH TABLE
O4
An
On
O5
L
H
L
Z
* OD
Figure 2. Logic Diagram
MAXIMUM RATINGS
Symbol
Parameter
Value
VCC
DC Supply Voltage
VI
DC Input Voltage
−0.5 v VI v +7.0
VO
DC Output Voltage
−0.5 v VO v +7.0
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output/Sink Current
ICC
DC Supply Current Per Supply Pin
IGND
DC Ground Current Per Ground Pin
TSTG
Storage Temperature Range
MSL
Moisture Sensitivity
Condition
−0.5 to +7.0
Unit
V
V
Output in HIGH or LOW State (Note 1)
V
−50
VI < GND
mA
−50
VO < GND
mA
+50
VO > VCC
mA
+50
mA
$100
mA
$100
mA
−65 to +150
C
Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
ORDERING INFORMATION
Package
Shipping†
MC74LCX07DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74LCX07DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LCX07DTG
TSSOP−14
(Pb−Free)
96 Units / Rail
MC74LCX07DTR2G
TSSOP−14
(Pb−Free)
2500 Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MC74LCX07
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Operating
Data Retention Only
Min
Typ
Max
Unit
2.0
1.5
2.3 to 3.3
5.5
5.5
V
0
5.5
V
0
5.5
V
VCC
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH
HIGH Level Output Current
VCC= 3.0 V−3.6 V
VCC= 2.7 V−3.0 V
VCC= 2.3 V−2.7 V
−24
−12
−8
mA
IOL
LOW Level Output Current
VCC = 3.0 V−3.6 V
VCC = 2.7 V−3.0 V
VCC = 2.3 V−2.7 V
+24
+12
+8
mA
TA
Operating Free−Air Temperature
−40
+85
C
Dt/DV
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
0
10
ns/V
(HIGH or LOW State)
DC ELECTRICAL CHARACTERISTICS
TA = −40C to +85C
Symbol
VIH
VIL
VOL
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
LOW Level Output Voltage
Condition
2.3 V VCC 2.7 V
Min
Max
Unit
V
2.7 V VCC 3.6 V
2.0
4.5 V VCC 5.25 V
2.3 V VCC 2.7 V
3.125
0.7
V
2.7 V VCC 3.6 V
0.8
1.7
4.5 V VCC 5.25 V
0.8
2.3 V VCC 3.6 V; IOL = 100 mA
0.2
VCC = 2.3 V; IOL= 8 mA
0.3
VCC = 2.7 V; IOL= 12 mA
0.4
VCC = 3.0 V; IOL = 16 mA
0.4
V
VCC = 3.0 V; IOL = 24 mA
0.55
VCC = 3.6 V, VIN = VIH or VIL,
VOUT = 0 to 5.5 V
$5
mA
VCC = 0, VIN = 5.5 V or VOUT = 5.5 V
10
mA
Input Leakage Current
VCC = 3.6 V, VIN = 5.5 V or GND
$5
mA
Quiescent Supply Current
VCC = 3.6 V, VIN = 5.5 V or GND
10
mA
2.3 V VCC 3.6 V
4.5 V VCC 5.5 V
VCC = 5.25 V, one input at 3.125 V, other
inputs at VCC or GND
500
1.0
10
mA
mA
mA
IOZ
3−State Output Current
IOFF
Power Off Leakage Current
IIN
ICC
DICC
Increase in ICC per Input
2. These values of VI are used to test DC electrical characteristics only.
AC ELECTRICAL CHARACTERISTICS
Limits
TA= −405C to +855C
Symbol
tPLZ
tPZL
Parameter
Propagation Delay
Input to Output
VCC = 3.3 V $ 0.3 V
VCC= 2.7 V
CL= 50 pF
CL= 50 pF
VCC = 2.5 V $ 0.2 V
CL= 30 pF
Min
Max
Min
Max
Min
Max
Unit
0.5
0.5
3.0
3.0
0.8
0.8
3.7
3.7
0.8
0.8
3.8
3.8
ns
ns
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3
MC74LCX07
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25C
Symbol
Characteristic
Min
Condition
Typ
Max
Unit
VOLP
Dynamic LOW Peak Voltage (Note 3)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH =2.5 V, VIL = 0 V
0.9
0.7
V
VOLV
Dynamic LOW Valley Voltage (Note 3)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
3. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
CPD
Power Dissipation Capacitance
Condition
Typical
Unit
VCC = 3.3 V, VI = 0 V or VCC
7
pF
VCC = 3.3 V, VI = 0 V or VCC
8
pF
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
VCC
Vmi
An
Vmi
0V
tPZL
On
tPLZ
Vmo
VLZ
VOL
PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1MHz; tW = 500 ns
VCC
Symbol
3.3 V $ 0.3 V
2.7 V
2.5 V $ 0.2 V
Vmi
1.5 V
1.5 V
VCC/2
Vmo
1.5 V
1.5 V
VCC/2
VLZ
VOL + 0.3 V
VOL + 0.3 V
VOL + 015 V
Figure 3. AC Waveforms
VCC
6 V or VCC 2
R1
PULSE
GENERATOR
DUT
RT
CL
TEST
SWITCH
tPZL, tPLZ
6V
Open Collector/Drain tPLH and tPHL
6V
tPZH, tPHZ
CL =
CL =
RL =
RT =
RL
GND
50 pF at VCC = 3.3 "0.3 V or equivalent (includes jig and probe capacitance)
30 pF at VCC = 2.5 "0.2 V or equivalent (includes jig and probe capacitance)
R1 = 500 W or equivalent
ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
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4
GND
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE L
14
1
SCALE 1:1
D
DATE 03 FEB 2016
A
B
14
8
A3
E
H
L
1
0.25
B
M
DETAIL A
7
13X
M
b
0.25
M
C A
S
B
S
0.10
X 45 _
M
A1
e
DETAIL A
h
A
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
6.50
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
14
14X
1.18
XXXXXXXXXG
AWLYWW
1
1
1.27
PITCH
XXXXX
A
WL
Y
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42565B
SOIC−14 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SOIC−14
CASE 751A−03
ISSUE L
DATE 03 FEB 2016
STYLE 1:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. NO CONNECTION
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. NO CONNECTION
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 2:
CANCELLED
STYLE 3:
PIN 1. NO CONNECTION
2. ANODE
3. ANODE
4. NO CONNECTION
5. ANODE
6. NO CONNECTION
7. ANODE
8. ANODE
9. ANODE
10. NO CONNECTION
11. ANODE
12. ANODE
13. NO CONNECTION
14. COMMON CATHODE
STYLE 4:
PIN 1. NO CONNECTION
2. CATHODE
3. CATHODE
4. NO CONNECTION
5. CATHODE
6. NO CONNECTION
7. CATHODE
8. CATHODE
9. CATHODE
10. NO CONNECTION
11. CATHODE
12. CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 5:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. NO CONNECTION
7. COMMON ANODE
8. COMMON CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 6:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. ANODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
STYLE 7:
PIN 1. ANODE/CATHODE
2. COMMON ANODE
3. COMMON CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. ANODE/CATHODE
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. COMMON CATHODE
12. COMMON ANODE
13. ANODE/CATHODE
14. ANODE/CATHODE
STYLE 8:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. ANODE/CATHODE
7. COMMON ANODE
8. COMMON ANODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. NO CONNECTION
12. ANODE/CATHODE
13. ANODE/CATHODE
14. COMMON CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42565B
SOIC−14 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−14 WB
CASE 948G
ISSUE C
14
DATE 17 FEB 2016
1
SCALE 2:1
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
DETAIL E
K
A
−V−
K1
J J1
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
H
G
D
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0_
8_
0_
8_
GENERIC
MARKING DIAGRAM*
14
SOLDERING FOOTPRINT
XXXX
XXXX
ALYWG
G
7.06
1
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
DOCUMENT NUMBER:
98ASH70246A
DESCRIPTION:
TSSOP−14 WB
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
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