MC74LCX158DTG

MC74LCX158 Low-Voltage CMOS Quad 2-Input Multiplexer With 5 V−Tolerant Inputs (Inverting) The MC74LCX158 is a high performance, quad 2−input inverting multiplexer operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX158 inputs to be safely driven from 5 V devices. Four bits of data from two sources can be selected using the Select and Enable inputs. The four outputs present the selected data in the inverted form. The MC74LCX158 can also be used as a function generator. Current drive capability is 24 mA at the outputs. http://onsemi.com MARKING DIAGRAMS 16 SOIC−16 D SUFFIX CASE 751B 16 1 1 Features          LCX158G AWLYWW 16 Designed for 2.3 to 3.6 V VCC Operation 5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current (10 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance:  Human Body Model >2000 V  Machine Model >200 V These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 16 1 LCX 158 ALYWG G TSSOP−16 DT SUFFIX CASE 948F 1 A WL, L Y WW, W G or G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.  Semiconductor Components Industries, LLC, 2012 October, 2012 − Rev. 7 1 Publication Order Number: MC74LCX158/D MC74LCX158 VCC E A3 B3 Y3 A2 B2 Y2 16 15 14 13 12 11 10 9 1 2 A0 3 B0 4 5 Y0 A1 6 B1 7 8 Y1 GND S Figure 1. Pinout: 16−Lead Plastic Package (Top View) PIN NAMES Pins TRUTH TABLE Function An Source 0 Data Inputs Bn Source 1 Data Inputs E Enable Input S Select Input Yn Outputs Inputs Outputs Output Enable Select Y0−Y3 H X H L L A0−A3 L H B0−B3 X = Don’t Care A0−A3, B0−B3 = The levels of the respective Data−Word Inputs PIN DESCRIPTIONS INPUTS OUTPUTS A0−A3 (Pins 2, 5, 11, 14) Y0−Y3 (Pins 4, 7, 9, 12) Nibble A inputs. The data present on these pins is transferred to the outputs when the Select input is at a low level and the Output Enable input is at a low level. The data is presented to the outputs in inverted form for the LCX158. Data outputs. The selected input nibble is presented at these outputs when the Output Enable input is at a low level. The data present on these pins is in its inverted form for the LCX158. For the Output Enable input at a high level, the outputs are at a high level for the LCX158. B0−B3 (Pins 3, 6, 10, 13) Nibble B inputs. The data present on these pins is transferred to the outputs when the Select input is at a high level and the Output Enable input is at a low level. The data is presented to the outputs in inverted form for the LCX158. Select (Pin 1) Nibble select. This input determines the data word to be transferred to the outputs. A low level on this input selects the A inputs and a high level selects the B inputs. CONTROL INPUTS Enable (Pin 15) Output Enable input. A low level on this input allows the selected data to be presented at the outputs. A high level on this input sets all of the outputs to a high level for the LCX158. http://onsemi.com 2 MC74LCX158 A0 B0 A1 Nibble Inputs B1 A2 B2 A3 B3 Enable Select 2 4 3 Y0 5 7 6 Y1 Data Outputs 11 9 10 Y2 14 12 13 Y3 15 1 Figure 2. Expanded Logic Diagram ORDERING INFORMATION Package Shipping† MC74LCX158DG SOIC−16 (Pb−Free) 48 Units / Rail MC74LCX158DR2G SOIC−16 (Pb−Free) 2500 Tape & Reel MC74LCX158DTG TSSOP−16 (Pb−Free) 96 Units / Rail MC74LCX158DTR2G TSSOP−16 (Pb−Free) 2500 Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 MC74LCX158 MAXIMUM RATINGS Symbol VCC Parameter Value DC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current Condition Units −0.5 to +7.0 V −0.5  VI  +7.0 V −0.5  VO  VCC + 0.5 Output in HIGH or LOW State (Note 1) V −50 VI < GND mA −50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current 50 mA ICC DC Supply Current Per Supply Pin 100 mA IGND DC Ground Current Per Ground Pin 100 mA TSTG Storage Temperature Range −65 to +150 C MSL Moisture Sensitivity Level 1 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Operating Data Retention Only Min Typ Max 2.0 1.5 2.3 to 3.3 3.6 3.6 VI Input Voltage 0 5.5 VO Output Voltage (HIGH or LOW State) (3−State) 0 VCC IOH HIGH Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V −24 −12 −8 IOL LOW Level Output Voltage VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V +24 +12 +8 TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V http://onsemi.com 4 Units V V V mA mA −40 +85 C 0 10 ns/V MC74LCX158 DC ELECTRICAL CHARACTERISTICS TA = −40C to +85C Symbol Characteristic Condition Min VIH Minimum HIGH Level Input Voltage (Note 2) 2.3 V  VCC  2.7 V 2.7 V  VCC  3.0 V 3.0 V  VCC  3.6 V 1.7 2.0 2.0 VIL Maximum LOW Level Input Voltage (Note 2) 2.3 V  VCC  2.7 V 2.7 V  VCC  3.0 V 3.0 V  VCC  3.6 V VOH Minimum HIGH Level Output Voltage 2.3 V  VCC  3.6 V; IOH = −100 mA VCC = 2.3 V; IOH = −8 mA VCC = 2.7 V; IOH = −12 mA VCC = 3.0 V; IOH = −18 mA VCC = 3.0 V; IOH = −24 mA VOL Maximum LOW Level Output Voltage 2.3 V  VCC  3.6 V; IOH = 100 mA VCC = 2.3 V; IOH = 8 mA VCC = 2.7 V; IOH = 12 mA VCC = 3.0 V; IOH = 16 mA VCC = 3.0 V; IOH = 24 mA 0.2 0.7 0.4 0.4 0.55 V IOFF Power Off Leakage Current VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA VCC = 3.6 V, VIN = 5.5 V or GND 5 mA VCC = 3.6 V, VIN = 5.5 V or GND 10 mA 2.3  VCC  3.6 V; VIH = VCC − 0.6 V 500 mA IIN Input Leakage Current ICC Quiescent Supply Current DICC Increase in ICC per Input Max Units V 0.7 0.8 0.8 VCC − 0.2 1.7 2.2 2.4 2.2 V V 2. These values of VI are used to test DC electrical characteristics only. AC CHARACTERISTICS Limits TA = −40C to +85C Symbol Parameter VCC = 3.0 V  3.6 V VCC = 2.7 V VCC = 2.3 V to 2.7 V CL = 50 pF CL = 50 pF CL = 30 pF Min Max Min Max Min Max Units tPLH tPHL Propagation Delay A or B to Y 1.0 1.0 6.5 6.5 1.0 1.0 7.5 7.5 1.0 1.0 8.5 8.5 ns tPLH tPHL Propagation Delay S to Y 1.0 1.0 7.0 7.0 1.0 1.0 8.0 8.0 1.0 1.0 9.0 9.0 ns tPLH tPHL Propagation Delay Output Enable to Y 1.0 1.0 7.0 7.0 1.0 1.0 8.0 8.0 1.0 1.0 9.0 9.0 ns tOSHL tOSLH Output−to−Output Skew 1.0 1.0 ns DYNAMIC SWITCHING CHARACTERISTICS TA = +25C Symbol Characteristic Condition Min Typ Max Units VOLP Dynamic LOW Peak Voltage (Note 3) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V VOLV Dynamic LOW Valley Voltage (Note 3) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V 3. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Typical Units Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF CIN Parameter Condition http://onsemi.com 5 MC74LCX158 2.7 V 1.5 V A, B, S 1.5 V 0V tPHL tPLH VOH Yn 1.5 V 1.5 V VOL WAVEFORM 1 − INVERTING PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns 2.7 V E, S 1.5 V 1.5 V 0V tPHL tPLH VOH 1.5 V Yn 1.5 V VOL WAVEFORM 2 − INVERTING PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Figure 3. AC Waveforms VCC PULSE GENERATOR DUT RT CL CL = 50 pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500 W or equivalent RT = ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit http://onsemi.com 6 RL MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K DATE 29 DEC 2006 SCALE 1:1 −A− 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 −B− 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C −T− SEATING PLANE J M D DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 PL 0.25 (0.010) M T B S A S STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. COLLECTOR BASE EMITTER NO CONNECTION EMITTER BASE COLLECTOR COLLECTOR BASE EMITTER NO CONNECTION EMITTER BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. CATHODE ANODE NO CONNECTION CATHODE CATHODE NO CONNECTION ANODE CATHODE CATHODE ANODE NO CONNECTION CATHODE CATHODE NO CONNECTION ANODE CATHODE STYLE 3: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. COLLECTOR, DYE #1 BASE, #1 EMITTER, #1 COLLECTOR, #1 COLLECTOR, #2 BASE, #2 EMITTER, #2 COLLECTOR, #2 COLLECTOR, #3 BASE, #3 EMITTER, #3 COLLECTOR, #3 COLLECTOR, #4 BASE, #4 EMITTER, #4 COLLECTOR, #4 STYLE 4: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. STYLE 5: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. DRAIN, DYE #1 DRAIN, #1 DRAIN, #2 DRAIN, #2 DRAIN, #3 DRAIN, #3 DRAIN, #4 DRAIN, #4 GATE, #4 SOURCE, #4 GATE, #3 SOURCE, #3 GATE, #2 SOURCE, #2 GATE, #1 SOURCE, #1 STYLE 6: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE ANODE ANODE ANODE ANODE ANODE ANODE ANODE ANODE STYLE 7: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. SOURCE N‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) GATE P‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) SOURCE P‐CH SOURCE P‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) GATE N‐CH COMMON DRAIN (OUTPUT) COMMON DRAIN (OUTPUT) SOURCE N‐CH COLLECTOR, DYE #1 COLLECTOR, #1 COLLECTOR, #2 COLLECTOR, #2 COLLECTOR, #3 COLLECTOR, #3 COLLECTOR, #4 COLLECTOR, #4 BASE, #4 EMITTER, #4 BASE, #3 EMITTER, #3 BASE, #2 EMITTER, #2 BASE, #1 EMITTER, #1 SOLDERING FOOTPRINT 8X 6.40 16X 1 1.12 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS DOCUMENT NUMBER: DESCRIPTION: 98ASB42566B SOIC−16 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−16 CASE 948F−01 ISSUE B 16 DATE 19 OCT 2006 1 SCALE 2:1 16X K REF 0.10 (0.004) 0.15 (0.006) T U M T U S V S K S ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 2X L/2 16 9 J1 B −U− L SECTION N−N J PIN 1 IDENT. N 8 1 0.25 (0.010) M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. N F DETAIL E −W− C 0.10 (0.004) −T− SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 7.06 16 XXXX XXXX ALYW 1 1 0.65 PITCH 16X 0.36 DOCUMENT NUMBER: DESCRIPTION: 16X 1.26 98ASH70247A TSSOP−16 DIMENSIONS: MILLIMETERS XXXX A L Y W G or G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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