MC74LCX16240
Low-Voltage CMOS
16-Bit Buffer
With 5 V−Tolerant Inputs and Outputs
(3−State, Inverting)
The MC74LCX16240 is a high performance, inverting
16−bit buffer operating from a 2.3 V to 3.6 V supply. The device is
nibble controlled. Each nibble has separate Output Enable inputs
which can be tied together for full 16−bit operation. High impedance
TTL compatible inputs significantly reduce current loading to input
drivers while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX16240
inputs to be safely driven from 5.0 V devices. The LCX16240 is
suitable for memory address driving and all TTL level bus oriented
transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
The MC74LCX16240 contains sixteen inverting buffers with
3−state 5.0 V tolerant outputs. The device is nibble controlled with
each nibble functioning identically, but independently. The control
pins may be tied together to obtain full 16−bit operation. The 3−state
outputs are controlled by an Output Enable (OEn) input for each
nibble. When OEn is LOW, the outputs are on. When OEn is HIGH,
the outputs are in the high impedance state.
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48
1
TSSOP−48
DT SUFFIX
CASE 1201
MARKING DIAGRAM
48
LCX16240G
AWLYYWW
Features
•
•
•
•
•
•
•
•
•
•
•
Designed for 2.3 to 3.6 V VCC Operation
5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 9
1
Publication Order Number:
MC74LCX16240/D
MC74LCX16240
Table 1. PIN NAMES
48 OE2
OE1 1
O0 2
Pins
47 D0
O1 3
46 D1
GND 4
45 GND
O2 5
44 D2
O3 6
43 D3
VCC 7
42 VCC
O4 8
41 D4
O5 9
40 D5
GND 10
38 D6
O7 12
37 D7
O8 13
36 D8
O9 14
35 D9
Output Enable Inputs
Inputs
Outputs
1
OE3
OE1
39 GND
O6 11
Function
OEn
D0−D15
O0−O15
48
OE4
OE2
D0:3
GND 15
34 GND
O10 16
33 D10
O11 17
32 D11
VCC 18
31 VCC
O12 19
30 D12
O13 20
29 D13
GND 21
28 GND
O14 22
27 D14
O15 23
26 D15
OE4 24
25 OE3
D4:7
O0:3
D8:11
O4:7
D12:15
25
24
O8:11
O12:15
One of Four
Figure 2. Logic Diagram
Figure 1. Pinout: TSSOP−48 (Top View)
TRUTH TABLE
OE1
H
L
Z
X
D0:3
O0:3
OE2
L
L
H
L
H
L
H
X
Z
=
=
=
=
D4:7
O4:7
OE3
D8:11
O8:11
OE4
L
L
H
L
H
L
H
X
Z
D12:15
O12:15
L
L
H
L
H
L
L
L
H
L
H
L
H
X
Z
H
X
Z
High Voltage Level
Low Voltage Level
High Impedance State
High or Low Voltage Level and Transitions are Acceptable; for ICC reasons, DO NOT FLOAT Inputs
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2
MC74LCX16240
ORDERING INFORMATION
Device
M74LCX16240DTR2G
Package
Shipping†
TSSOP−48
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MAXIMUM RATINGS
Symbol
VCC
Parameter
Value
DC Supply Voltage
Condition
Unit
−0.5 to +7.0
V
VI
DC Input Voltage
−0.5 ≤ VI ≤ +7.0
VO
DC Output Voltage
−0.5 ≤ VO ≤ +7.0
Output in 3−State
V
V
−0.5 ≤ VO ≤ VCC + 0.5
Output in HIGH or LOW State (Note 1)
V
IIK
DC Input Diode Current
−50
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
MSL
Moisture Sensitivity
Level 1
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage
Operating
Data Retention Only
Min
Typ
Max
Unit
2.0
1.5
2.5, 3.3
2.5, 3.3
3.6
3.6
V
0
5.5
V
0
0
VCC
5.5
V
VI
Input Voltage
VO
Output Voltage
IOH
HIGH Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
−24
−12
−8
mA
IOL
LOW Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
+24
+12
+8
mA
TA
Operating Free−Air Temperature
−40
+85
°C
0
10
ns/V
Dt/DV
(HIGH or LOW State)
(3−State)
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
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3
MC74LCX16240
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
VIH
VIL
VOH
VOL
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
LOW Level Output Voltage
IOZ
3−State Output Current
IOFF
Power Off Leakage Current
Condition
Min
2.3 V ≤ VCC ≤ 2.7 V
1.7
2.7 V ≤ VCC ≤ 3.6 V
2.0
Max
V
2.3 V ≤ VCC ≤ 2.7 V
0.7
2.7 V ≤ VCC ≤ 3.6 V
0.8
2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA
VCC − 0.2
VCC = 2.3 V; IOH = −8 mA
1.8
VCC = 2.7 V; IOH = −12 mA
2.2
VCC = 3.0 V; IOH = −18 mA
2.4
VCC = 3.0 V; IOH = −24 mA
2.2
Unit
V
V
2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA
0.2
V
VCC = 2.3 V; IOL= 8 mA
0.6
VCC = 2.7 V; IOL= 12 mA
0.4
VCC = 3.0 V; IOL = 16 mA
0.4
VCC = 3.0 V; IOL = 24 mA
0.55
VCC = 3.6 V, VIN = VIH or VIL,
VOUT = 0 to 5.5 V
±5
mA
VCC = 0, VIN = 5.5 V or VOUT = 5.5 V
10
mA
IIN
Input Leakage Current
VCC = 3.6 V, VIN = 5.5 V or GND
±5
mA
ICC
Quiescent Supply Current
VCC = 3.6 V, VIN = 5.5 V or GND
10
mA
2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V
500
mA
DICC
Increase in ICC per Input
2. These values of VI are used to test DC electrical characteristics only.
AC CHARACTERISTICS tR = tF = 2.5ns; RL = 500 W
TA = −40°C to +85°C
VCC = 3.3 V ± 0.3 V
CL = 50 pF
Symbol
Parameter
VCC = 2.7 V
CL = 50 pF
VCC = 2.5 V ± 0.2 V
CL = 30 pF
Waveform
Min
Max
Min
Max
Min
Max
Unit
tPLH
tPHL
Propagation Delay
Input to Output
1
1.5
1.5
4.5
4.5
1.5
1.5
5.3
5.3
1.5
1.5
5.4
5.4
ns
tPZH
tPZL
Output Enable Time to
High and Low Level
2
1.5
1.5
5.4
5.4
1.5
1.5
6.0
6.0
1.5
1.5
7.0
7.0
ns
tPHZ
tPLZ
Output Disable Time From
High and Low Level
2
1.5
1.5
5.3
5.3
1.5
1.5
5.4
5.4
1.5
1.5
6.4
6.4
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 3)
1.0
1.0
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
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4
MC74LCX16240
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
VOLP
Dynamic LOW Peak Voltage
(Note 4)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.8
0.6
V
V
VOLV
Dynamic LOW Valley Voltage
(Note 4)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
CIN
Parameter
Condition
Typical
Unit
Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
8
pF
CPD
Power Dissipation Capacitance
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
20
pF
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5
MC74LCX16240
VCC
OEn
Vmi
VCC
Dn
Vmi
Vmi
tPHL
On
tPZH
0V
tPLH
Vmo
On
VOH
VHZ
Vmo
VOH
Vmo
tPZL
VOL
tPLZ
Vmo
On
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
0V
tPHZ
VLZ
VOL
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC Waveforms
Table 2. AC WAVEFORMS
VCC
Symbol
3.3 V ± 0.3 V
2.7 V
2.5 V + 0.2 V
Vmi
1.5 V
1.5 V
VCC / 2
Vmo
1.5 V
1.5 V
VCC / 2
VHZ
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.15 V
VLZ
VOH − 0.3 V
VOH − 0.3 V
VOH − 015 V
VCC
PULSE
GENERATOR
R1
DUT
RT
CL
RL
Figure 4. Test Circuit
Table 3. TEST CIRCUIT
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6 V at VCC = 3.3 0.3 V
6 V at VCC = 2.5 0.2 V
Open Collector/Drain tPLH and tPHL
6V
tPZH, tPHZ
GND
CL = 50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance)
CL = 30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance)
RL = R1 = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50 W)
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6
6 V or VCC × 2
OPEN
GND
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−48
CASE 1201−01
ISSUE B
DATE 06 JUL 2010
1
SCALE 1:1
48X
ÇÇÇÇ
ÉÉ
ÇÇÇÇ
ÉÉ
ÇÇÇÇ
ÉÉ
K REF
0.12 (0.005)
M
T U
S
V
K
K1
S
T U
S
J J1
48
25
M
0.254 (0.010)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSIONS A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
SECTION N−N
B
−U−
L
1
N
24
A
−V−
PIN 1
IDENT.
N
F
DETAIL E
D
C
M
0.25 (0.010)
−W−
0.076 (0.003)
−T− SEATING
PLANE
DETAIL E
H
G
INCHES
MIN
MAX
0.488
0.496
0.236
0.244
−−−
0.043
0.002
0.006
0.020
0.030
0.0197 BSC
0.015
−−−
0.004
0.008
0.004
0.006
0.007
0.011
0.007
0.009
0.313
0.325
0_
8_
XXXXXXXXXXXG
AWLYYWW
48X
0.32
MILLIMETERS
MIN
MAX
12.40
12.60
6.00
6.20
−−−
1.10
0.05
0.15
0.50
0.75
0.50 BSC
0.37
−−−
0.09
0.20
0.09
0.16
0.17
0.27
0.17
0.23
7.95
8.25
0_
8_
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT
48X
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
1.00
1
8.45
XXXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
DOCUMENT NUMBER:
DESCRIPTION:
98ASH70297A
TSSOP−48
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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