MC74LCX540DT

MC74LCX540 Low-Voltage CMOS Octal Buffer Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Inverting) The MC74LCX540 is a high performance, inverting octal buffer operating from a 2.3 to 3.6 V supply. This device is similar in function to the MC74LCX240, while providing flow through architecture. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX540 inputs to be safely driven from 5 V devices. The MC74LCX540 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 24 mA at the outputs. The Output Enable (OE1, OE2) inputs, when HIGH, disables the outputs by placing them in a HIGH Z condition. Features • • • • • • • • • • • Designed for 2.3 to 3.6 V VCC Operation 5 V Tolerant − Interface Capability With 5 V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance: ♦ Human Body Model >2000 V ♦ Machine Model >200 V These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant © Semiconductor Components Industries, LLC, 2012 October, 2012 − Rev. 8 1 http://onsemi.com MARKING DIAGRAMS 20 20 1 LCX540 AWLYYWWG SOIC−20 WB DW SUFFIX CASE 751D 1 20 20 LCX 540 ALYW G G 1 TSSOP−20 DT SUFFIX CASE 948E A L, WL Y, YY W, WW G or G 1 = = = = = Assembly Location Wafer Lot Year Work Week Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. Publication Order Number: MC74LCX540/D MC74LCX540 OE1 OE2 1 19 D0 VCC OE2 O0 O1 O2 O3 O4 O5 O6 O7 20 19 18 17 16 15 14 13 12 11 D1 D2 D3 1 2 3 4 5 6 7 8 9 10 OE1 D0 D1 D2 D3 D4 D5 D6 D7 GND D4 Figure 1. Pinout: 20−Lead (Top View) D5 D6 PIN NAMES Pins Function OEn Output Enable Inputs Dn Data Inputs On 3−State Outputs D7 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 O0 O1 O2 O3 O4 O5 O6 O7 Figure 2. Logic Diagram TRUTH TABLE Inputs 2 Outputs OE1 OE2 Dn On L L L H L L H L X H X Z H X X Z H = High Voltage Level L = Low Voltage Level Z = High Impedance State X = High or Low Voltage Level and Transitions are Acceptable For ICC reasons, DO NOT FLOAT Inputs http://onsemi.com 2 MC74LCX540 MAXIMUM RATINGS Symbol VCC Parameter Condition Value Units −0.5 to +7.0 V −0.5 ≤ VI ≤ +7.0 V Output in 3−State −0.5 ≤ VO ≤ +7.0 V (Note 1) −0.5 ≤ VO ≤ VCC + 0.5 V DC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current VI < GND −50 mA IOK DC Output Diode Current VO < GND −50 mA VO > VCC +50 mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA ±100 mA −65 to +150 °C IGND DC Ground Current Per Ground Pin TSTG Storage Temperature Range MSL Moisture Sensitivity Level 1 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Operating Data Retention Only Min Typ Max 2.0 1.5 3.3 3.3 3.6 3.6 Units V VI Input Voltage 0 5.5 VO Output Voltage (HIGH or LOW State) (3−State) 0 0 VCC 5.5 IOH HIGH Level Output Current, VCC = 3.0 V − 3.6 V −24 mA IOL LOW Level Output Current, VCC = 3.0 V − 3.6 V 24 mA IOH HIGH Level Output Current, VCC = 2.7 V − 3.0 V −12 mA IOL LOW Level Output Current, VCC = 2.7 V − 3.0 V TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V V V 12 mA −40 +85 °C 0 10 ns/V ORDERING INFORMATION Package Shipping† SOIC−20 WB (Pb−Free) 1000 Tape & Reel MC74LCX540DTG TSSOP−20 (Pb−Free) 75 Units / Rail MC74LCX540DTR2G TSSOP−20 (Pb−Free) 2000 Tape & Reel Device MC74LCX540DWR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 MC74LCX540 DC ELECTRICAL CHARACTERISTICS TA = −40°C to +85°C Symbol Characteristic VIH HIGH Level Input Voltage (Note 2) VIL LOW Level Input Voltage (Note 2) VOH HIGH Level Output Voltage VOL LOW Level Output Voltage IOZ 3−State Output Current IOFF Power Off Leakage Current Condition Min 2.7 V ≤ VCC ≤ 3.6 V 2.0 Max Units V 2.7 V ≤ VCC ≤ 3.6 V 0.8 2.7 V ≤ VCC ≤ 3.6 V; IOH = −100 mA VCC − 0.2 VCC = 2.7 V; IOH = −12 mA 2.2 VCC = 3.0 V; IOH = −18 mA 2.4 VCC = 3.0 V; IOH = −24 mA 2.2 V V 2.7 V ≤ VCC ≤ 3.6 V; IOL = 100 mA 0.2 VCC = 2.7 V; IOL = 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 V VCC = 3.0 V; IOL = 24 mA 0.55 VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 5.5 V ±5 mA VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND ±5 mA ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 mA 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V 500 mA DICC Increase in ICC per Input 2. These values of VI are used to test DC electrical characteristics only. AC CHARACTERISTICS (tR = tF = 2.5 ns; CL = 50 pF; RL = 500 W) Limits TA = −40°C to +85°C VCC = 3.0 V to 3.6 V Symbol Parameter VCC = 2.7 V Waveform Min Max Max Units tPLH tPHL Propagation Delay Input to Output 1 1.5 1.5 6.5 6.5 7.5 7.5 ns tPZH tPZL Output Enable Time to High and Low Level 2 1.5 1.5 8.5 8.5 9.5 9.5 ns tPHZ tPLZ Output Disable Time From High and Low Level 2 1.5 1.5 7.5 7.5 8.5 8.5 ns tOSHL tOSLH Output−to−Output Skew (Note 3) 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol VOLP Characteristic Dynamic LOW Peak Voltage (Note 4) Condition VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V Min Typ 0.8 Max Units V VOLV Dynamic LOW Valley Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol CIN Parameter Input Capacitance COUT Output Capacitance CPD Power Dissipation Capacitance Condition Typical Units VCC = 3.3 V, VI = 0 V or VCC 7 pF VCC = 3.3 V, VI = 0 V or VCC 8 pF 10 MHz, VCC = 3.3V, VI = 0 V or VCC 25 pF http://onsemi.com 4 MC74LCX540 2.7 V Dn 1.5 V 1.5 V 0V tPHL tPLH VOH 1.5 V On 1.5 V VOL WAVEFORM 1 - PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns 2.7 V 1.5 V OEn 0V tPZH tPHZ VCC VOH - 0.3 V 1.5 V On ≈0V tPZL tPLZ ≈ 3.0 V 1.5 V On VOL + 0.3 V GND WAVEFORM 2 - OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Figure 3. AC Waveforms VCC R1 PULSE GENERATOR DUT RT CL Test Switch tPLH, tPHL Open tPZL, tPLZ 6V Open Collector/Drain tPLH and tPHL 6V tPZH, tPHZ GND RL CL = 50 pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500 W or equivalent RT = ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit http://onsemi.com 5 6V OPEN GND MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−20 WB CASE 751D−05 ISSUE H DATE 22 APR 2015 SCALE 1:1 A 20 q X 45 _ M E h 0.25 H NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 1 10 20X B b 0.25 M T A S B DIM A A1 b c D E e H h L q S L A 18X e SEATING PLANE A1 c T GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT* 20 20X 20X 1.30 0.52 20 XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG 11 1 11.00 1 XXXXX A WL YY WW G 10 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ 98ASB42343B SOIC−20 WB = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−20 WB CASE 948E ISSUE D DATE 17 FEB 2016 SCALE 2:1 20X 0.15 (0.006) T U 2X L K REF 0.10 (0.004) S L/2 20 M T U S V ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ K K1 S J J1 11 B SECTION N−N −U− PIN 1 IDENT 0.25 (0.010) N 1 10 M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. N F DETAIL E −W− C G D H DETAIL E 0.100 (0.004) −T− SEATING PLANE DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 7.06 XXXX XXXX ALYWG G 1 0.65 PITCH 16X 0.36 16X 1.26 DOCUMENT NUMBER: 98ASH70169A DESCRIPTION: TSSOP−20 WB A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DIMENSIONS: MILLIMETERS Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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