MC74VHC1G132
2−Input NAND
Schmitt−Trigger
The MC74VHC1G132 is a single gate CMOS Schmitt NAND
trigger fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The MC74VHC1G132 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G132 to be used to interface 5.0 V circuits to
3.0 V circuits.
The MC74VHC1G132 can be used to enhance noise immunity or to
square up slowly changing waveforms.
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MARKING
DIAGRAMS
5
1
VDd
SC70−5/SC−88A/SOT−353
DF SUFFIX
CASE 419A
Pin 1
High Speed: tPD = 3.6 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 1.0 A (Max) at TA = 25°C
5
Power Down Protection Provided on Inputs
1
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 68; Equivalent Gates = 16
Pb−Free Package is Available
VDd
SOT23−5/TSOP−5/SC59−5
DT SUFFIX
CASE 483
Pin 1
d = Date Code
PIN ASSIGNMENT
IN B
IN A
GND
5
1
VCC
2
4
3
1
IN B
2
IN A
3
GND
4
OUT Y
5
VCC
OUT Y
FUNCTION TABLE
Inputs
Figure 1. Pinout (Top View)
IN A
IN B
&
OUT Y
Output
A
B
Y
L
L
H
H
L
H
L
H
H
H
H
L
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Semiconductor Components Industries, LLC, 2004
May, 2004 − Rev. 16
1
Publication Order Number:
MC74VHC1G132/D
MC74VHC1G132
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
0.5 to 7.0
V
−0.5 to +7.0
V
VCC
DC Supply Voltage
VIN
DC Input Voltage
VOUT
DC Output Voltage
0.5 to VCC 0.5
V
IIK
DC Input Diode Current
−20
mA
IOK
DC Output Diode Current
20
mA
IOUT
DC Output Sink Current
12.5
mA
ICC
DC Supply Current per Supply Pin
25
mA
TSTG
Storage Temperature Range
65 to 150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
JA
Thermal Resistance
PD
Power Dissipation in Still Air at 85°C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
2000
200
N/A
V
ILATCH−UP
Latch−Up Performance
Above VCC and Below GND at 125°C (Note 5)
500
mA
150
°C
SC70−5/SC−88A (Note 1)
TSOP−5
350
230
°C/W
SC70−5/SC−88A
TSOP−5
150
200
mW
Level 1
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
5.5
V
VCC
DC Supply Voltage
2.0
VIN
DC Input Voltage
0.0
5.5
V
VOUT
DC Output Voltage
0.0
VCC
V
TA
Operating Temperature Range
55
125
°C
tr , tf
Input Rise and Fall Time
−
−
No Limit
No Limit
ns/V
1,032,200
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80 ° C
80
TJ = 90 ° C
Time, Years
TJ = 100 ° C
Time, Hours
TJ = 110° C
Junction
Temperature °C
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 120° C
Device Junction Temperature versus
Time to 0.1% Bond Failures
TJ = 130 ° C
NORMALIZED FAILURE RATE
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
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2
MC74VHC1G132
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
TA ≤ 85°C
TA = 25°C
−55 ≤ TA ≤ 125°C
VCC
(V)
Min
Typ
Max
Min
Max
Min
Max
Unit
VT+
Positive Threshold
Voltage
3.0
4.5
5.5
1.50
2.35
2.80
1.88
2.66
3.21
2.25
3.10
3.70
1.50
2.35
2.80
2.25
3.10
3.70
1.50
2.35
2.80
2.25
3.10
3.70
V
VT−
Negative Threshold
Voltage
3.0
4.5
5.5
0.65
1.10
1.45
1.03
1.62
2.02
1.40
2.10
2.60
0.65
1.10
1.45
1.40
2.10
2.60
0.65
1.10
1.45
1.40
2.10
2.60
V
VH
Hysteresis Voltage
3.0
4.5
5.5
0.30
0.40
0.50
0.85
1.05
1.20
1.60
2.00
2.25
0.30
0.40
0.50
1.60
2.00
2.25
0.30
0.40
0.50
1.60
2.00
2.25
V
VOH
Minimum High−Level
g
O t tV
Output
Voltage
lt
IOH = −50A
VIN = VCC or GND
2.0
1.9
2.0
1.9
1.9
VIN = VIH or VIL
IOH = −50 A
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.5
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
VIN = VIH or VIL
IOL = 50 A
2.0
3.0
4.5
IOL = 4 mA
IOL = 8 mA
VOL
Maximum Low−Level
Output Voltage
0.0
0.0
0.0
V
V
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN
Maximum Input
Leakage Current
VIN = 5.5 V or GND
0 to
5.5
±0.1
±1.0
±1.0
A
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
1.0
20
40
A
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AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr/tf = 3.0 ns
TA ≤ 85°C
TA = 25°C
Symbol
tPLH,
tPHL
CIN
Parameter
Maximum
Propagation Delay,
A or B to Y
Min
Test Conditions
−55 ≤ TA ≤ 125°C
Typ
Max
Min
Max
Min
Max
Unit
ns
VCC = 3.3 ± 0.3 V
CL = 15 pF
CL = 50 pF
4.6
6.1
11.9
15.4
1.0
1.0
14.0
17.5
1.0
1.0
16.1
19.6
VCC = 5.0 ± 0.5 V
CL = 15 pF
CL = 50 pF
3.6
4.3
7.7
9.7
1.0
1.0
9.0
11.0
1.0
1.0
10.3
12.3
5.5
10
Maximum Input
Capacitance
10
10
pF
Typical @ 25°C, VCC = 5.0 V
CPD
11
Power Dissipation Capacitance (Note 6)
pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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3
MC74VHC1G132
TEST POINT
VCC
A or B
OUTPUT
50%
DEVICE
UNDER
TEST
GND
tPLH
Y
tPHL
CL *
50% VCC
*Includes all probe and jig capacitance
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device
Order Number
Circuit
Indicator
Temp
Range
Identifier
Technology
Device
Function
Package
Suffix
Tape &
Reel
Suffix
MC74VHC1G132DFT1
MC
74
VHC1G
132
DF
MC74VHC1G132DF1G
MC
74
VHC1G
132
MC74VHC1G132DFT2
MC
74
VHC1G
MC74VHC1G132DTT1
MC
74
VHC1G
Package Type
Tape and
Reel Size†
T1
SC70−5/SC−88A/
SOT−353
178 mm (7 in)
3000 Unit
DF
T1
SC70−5/SC−88A/
SOT−353
(Pb−Free)
178 mm (7 in)
3000 Unit
132
DF
T2
SC70−5/SC−88A/
SOT−353
178 mm (7 in)
3000 Unit
132
DT
T1
SOT23−5/TSOP−5
SC59−5
178 mm (7 in)
3000 Unit
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74VHC1G132
PACKAGE DIMENSIONS
SC70−5/SC−88A/SOT−353
DF SUFFIX
5−LEAD PACKAGE
CASE 419A−02
ISSUE G
A
G
5
4
DIM
A
B
C
D
G
H
J
K
N
S
−B−
S
1
2
3
D 5 PL
0.2 (0.008)
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
−−−
0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
J
K
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
−−−
0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
MC74VHC1G132
PACKAGE DIMENSIONS
SOT23−5/TSOP−5/SC59−5
DT SUFFIX
5−LEAD PACKAGE
CASE 483−01
ISSUE C
D
S
5
4
1
2
3
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
L
MILLIMETERS
INCHES
DIM MIN
MAX
MIN
MAX
A
2.90
3.10 0.1142 0.1220
B
1.30
1.70 0.0512 0.0669
C
0.90
1.10 0.0354 0.0433
D
0.25
0.50 0.0098 0.0197
G
0.85
1.05 0.0335 0.0413
H 0.013 0.100 0.0005 0.0040
J
0.10
0.26 0.0040 0.0102
K
0.20
0.60 0.0079 0.0236
L
1.25
1.55 0.0493 0.0610
M
0_
10 _
0_
10 _
S
2.50
3.00 0.0985 0.1181
G
A
J
C
0.05 (0.002)
H
M
K
SOLDERING FOOTPRINT*
0.95
0.037
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your
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MC74VHC1G132/D
