DATA SHEET
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Positive Voltage Regulators
100 mA
MC78L00A Series,
NCV78L00A
The MC78L00A Series of positive voltage regulators are
inexpensive, easy−to−use devices suitable for a multitude of
applications that require a regulated supply of up to 100 mA. Like
their higher powered MC7800 and MC78M00 Series cousins, these
regulators feature internal current limiting and thermal shutdown
making them remarkably rugged. No external components are
required with the MC78L00 devices in many applications.
These devices offer a substantial performance advantage over the
traditional zener diode−resistor combination, as output impedance
and quiescent current are substantially reduced.
Features
•
•
•
•
•
•
•
•
Wide Range of Available, Fixed Output Voltages
Low Cost
Internal Short Circuit Current Limiting
Internal Thermal Overload Protection
No External Components Required
Complementary Negative Regulators Offered (MC79L00A Series)
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Input
Q11
Q5
Q3
15k
1
12
3
STRAIGHT LEAD
2
3
BENT LEAD
Pin: 1. Output
2. Ground
3. Input
TO−92
P SUFFIX
CASE 29−10
SOIC−8*
D SUFFIX
CASE 751
SOT−89
CASE 528AG
*SOIC−8 is an internally modified SO−8 package. Pins
2, 3, 6, and 7 are electrically common to the die attach
flag. This internal lead frame modification decreases
package thermal resistance and increases power
dissipation capability when appropriately mounted on
a printed circuit board. SOIC−8 conforms to all external dimensions of the standard SO−8 package.
PIN CONNECTIONS
VOUT 1
8
VIN
GND 2
7
GND
GND 3
6
GND
NC 4
5
NC
(Top View)
TAB
Q12
Q1
Q10
5.0k
3.8k
Q4
1.9k
1.2k
Q6
Output
1
2
3
VOUT GND VIN
(Top View)
0-25k
19k
2.2k
Q9
C
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Q8
Q2
Z1
3.0
2.85k
Q7
420
1.0k
Ground
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 12 of this data sheet.
Figure 1. Representative Schematic Diagram
© Semiconductor Components Industries, LLC, 1999
August, 2021 − Rev. 20
1
Publication Order Number:
MC78L00A/D
MC78L00A Series, NCV78L00A
Input
MC78LXXA
Cin*
0.33 mF
Output
CO**
0.1 mF
Figure 2. Standard Application
A common ground is required between the input and the output voltages. The input voltage must remain typically 2.0 V above the output
voltage even during the low point on the input ripple voltage.
* Cin is required if regulator is located an appreciable distance from power supply filter.
** CO is not needed for stability; however, it does improve transient response.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (5.0 V−9.0 V)
Input Voltage (12 V−18 V)
Input Voltage (24 V)
VI
30
35
40
Vdc
Storage Temperature Range
Tstg
−65 to +150
°C
Maximum Junction Temperature
TJ
150
°C
Moisture Sensitivity Level
ESD Capability, Human Body Model (Note 1)
MSL
1
−
ESDHBM
2000
V
ESD Capability, Machine Model (Note 1)
ESDMM
200
V
ESD Capability, Charged Device Model (Note 1)
ESDCDM
2000
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model tested per EIA/JES D22/C101, Field Induced Charge Model.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
PD
Internally Limited
W
Thermal Characteristics, TO−92
Thermal Resistance, Junction−to−Ambient
RqJA
200
°C/W
Thermal Characteristics, SOIC8
Thermal Resistance, Junction−to−Ambient
RqJA
Refer to Figure 8
°C/W
Thermal Characteristics, SOT−89
Thermal Resistance, Junction−to−Ambient
RqJA
55
°C/W
Package Dissipation
2. Thermal Resistance, Junction−to−Ambient depends on P.C.B. Copper area. See details in Figure 8.
Thermal Resistance, Junction−to−Case is not defined. SOIC 8 lead and TO-92 packages that do not have a heat sink like other packages
may have. This is the reason that a Theta JC is never specified. A little heat transfer will occur through the package but since it is plastic, it is
minimal. The majority of the heat that is transferred is through the leads where they connect to the circuit board.
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2
MC78L00A Series, NCV78L00A
ELECTRICAL CHARACTERISTICS (VI = 10 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, − 40°C < TJ < +125°C (for MC78LXXAB,
NCV78L05A), 0°C < TJ < +125°C (for MC78LXXAC), unless otherwise noted.)
MC78L05AC, AB, NCV78L05A
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
4.8
5.0
5.2
Vdc
Line Regulation
(TJ = +25°C, IO = 40 mA)
7.0 Vdc ≤ VI ≤ 20 Vdc
8.0 Vdc ≤ VI ≤ 20 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(7.0 Vdc ≤ VI ≤ 20 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(VI = 10 V, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(8.0 Vdc ≤ VI ≤ 20 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
DIIB
mV
−
−
55
45
150
100
−
−
11
5.0
60
30
4.75
4.75
−
−
5.25
5.25
−
−
3.8
−
6.0
5.5
−
−
−
−
1.5
0.1
mV
Vdc
mA
mA
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
40
−
mV
Ripple Rejection (IO = 40 mA,
f = 120 Hz, 8.0 Vdc ≤ VI ≤ 18 V, TJ = +25°C)
RR
41
49
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage (TJ = +25°C)
NOTE:
NCV78L05A: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring
site and change control.
ELECTRICAL CHARACTERISTICS (VI = 14 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, − 40°C < TJ < +125°C (for MC78LXXAB),
0°C < TJ < +125°C (for MC78LXXAC), unless otherwise noted.)
MC78L08AC, AB
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
7.7
8.0
8.3
Vdc
Line Regulation
(TJ = +25°C, IO = 40 mA)
10.5 Vdc ≤ VI ≤ 23 Vdc
11 Vdc ≤ VI ≤ 23 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(10.5 Vdc ≤ VI ≤ 23 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(VI = 14 V, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(11 Vdc ≤ VI ≤ 23 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
DIIB
mV
−
−
20
12
175
125
−
−
15
8.0
80
40
7.6
7.6
−
−
8.4
8.4
−
−
3.0
−
6.0
5.5
−
−
−
−
1.5
0.1
mV
Vdc
mA
mA
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
60
−
mV
Ripple Rejection (IO = 40 mA,
f = 120 Hz, 12 V ≤ VI ≤ 23 V, TJ = +25°C)
RR
37
57
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage (TJ = +25°C)
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MC78L00A Series, NCV78L00A
ELECTRICAL CHARACTERISTICS (VI = 15 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, − 40°C < TJ < +125°C (for MC78LXXAB),
0°C < TJ < +125°C (for MC78LXXAC), unless otherwise noted.)
MC78L09AC, AB
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
Characteristics
VO
8.6
9.0
9.4
Vdc
Line Regulation
(TJ = +25°C, IO = 40 mA)
11.5 Vdc ≤ VI ≤ 24 Vdc
12 Vdc ≤ VI ≤ 24 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(11.5 Vdc ≤ VI ≤ 24 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(VI = 15 V, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(11 Vdc ≤ VI ≤ 23 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
DIIB
mV
−
−
20
12
175
125
−
−
15
8.0
90
40
8.5
8.5
−
−
9.5
9.5
−
−
3.0
−
6.0
5.5
−
−
−
−
1.5
0.1
mV
Vdc
mA
mA
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
60
−
mV
Ripple Rejection (IO = 40 mA,
f = 120 Hz, 13 V ≤ VI ≤ 24 V, TJ = +25°C)
RR
37
57
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage
(TJ = +25°C)
ELECTRICAL CHARACTERISTICS (VI = 19 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, − 40°C < TJ < +125°C (for MC78LXXAB),
0°C < TJ < +125°C (for MC78LXXAC), unless otherwise noted.)
MC78L12AC, AB
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
Characteristics
VO
11.5
12
12.5
Vdc
Line Regulation
(TJ = +25°C, IO = 40 Ma)
14.5 Vdc ≤ VI ≤ 27 Vdc
16 Vdc ≤ VI ≤ 27 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(14.5 Vdc ≤ VI ≤ 27 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(VI = 19 V, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(16 Vdc ≤ VI ≤ 27 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
DIIB
mV
−
−
120
100
250
200
−
−
20
10
100
50
11.4
11.4
−
−
12.6
12.6
−
−
4.2
−
6.5
6.0
−
−
−
−
1.5
0.1
mV
Vdc
mA
mA
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
80
−
mV
Ripple Rejection
(IO = 40 mA, f = 120 Hz, 15 V ≤ VI ≤ 25 V, TJ = +25°C)
RR
37
42
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage
(TJ = +25°C)
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MC78L00A Series, NCV78L00A
ELECTRICAL CHARACTERISTICS (VI = 23 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, − 40°C < TJ < +125°C (for MC78LXXAB),
0°C < TJ < +125°C (for MC78LXXAC), unless otherwise noted.)
MC78L15AC, AB / NCV78L15A
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
Characteristics
VO
14.4
15
15.6
Vdc
Line Regulation
(TJ = +25°C, IO = 40 mA)
17.5 Vdc ≤ VI ≤ 30 Vdc
20 Vdc ≤ VI ≤ 30 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(17.5 Vdc ≤ VI ≤ 30 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(VI = 23 V, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(20 Vdc ≤ VI ≤ 30 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
DIIB
mV
−
−
130
110
300
250
−
−
25
12
150
75
14.25
14.25
−
−
15.75
15.75
−
−
4.4
−
6.5
6.0
−
−
−
−
1.5
0.1
mV
Vdc
mA
mA
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
90
−
mV
Ripple Rejection
(IO = 40 mA, f = 120 Hz, 18.5 V ≤ VI ≤ 28.5 V, TJ = +25°C)
RR
34
39
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage
(TJ = +25°C)
ELECTRICAL CHARACTERISTICS (VI = 27 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, 0°C < TJ < +125°C, unless otherwise noted.)
MC78L18AC
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
17.3
18
18.7
Vdc
Line Regulation
(TJ = +25°C, IO = 40 mA)
21.4 Vdc ≤ VI ≤ 33 Vdc
20.7 Vdc ≤ VI ≤ 33 Vdc
22 Vdc ≤ VI ≤ 33 Vdc
21 Vdc ≤ VI ≤ 33 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(21.4 Vdc ≤ VI ≤ 33 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(20.7 Vdc ≤ VI ≤ 33 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(VI = 27 V, 1.0 mA ≤ IO ≤ 70 mA)
(VI = 27 V, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(22 Vdc ≤ VI ≤ 33 Vdc)
(21 Vdc ≤ VI ≤ 33 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
mV
−
45
325
−
35
275
−
−
30
15
170
85
mV
Vdc
17.1
−
18.9
17.1
−
18.9
−
−
3.1
−
6.5
6.0
mA
mA
DIIB
−
−
−
−
1.5
0.1
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
150
−
mV
Ripple Rejection
(IO = 40 mA, f = 120 Hz, 23 V ≤ VI ≤ 33 V, TJ = +25°C)
RR
33
48
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage
(TJ = +25°C)
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MC78L00A Series, NCV78L00A
ELECTRICAL CHARACTERISTICS (VI = 33 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, 0°C < TJ < +125°C, unless otherwise noted.)
MC78L24AC
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
23
24
25
Vdc
Line Regulation
(TJ = +25°C, IO = 40 mA)
27.5 Vdc ≤ VI ≤ 38 Vdc
28 Vdc ≤ VI ≤ 80 Vdc
27 Vdc ≤ VI ≤ 38 Vdc
Regline
Load Regulation
(TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA)
(TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA)
Regload
Output Voltage
(28 Vdc ≤ VI ≤ 38 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(27 Vdc ≤ VI ≤ 38 Vdc, 1.0 mA ≤ IO ≤ 40 mA)
(28 Vdc ≤ VI = 33 Vdc, 1.0 mA ≤ IO ≤ 70 mA)
(27 Vdc ≤ VI ≤ 33 Vdc, 1.0 mA ≤ IO ≤ 70 mA)
VO
Input Bias Current
(TJ = +25°C)
(TJ = +125°C)
IIB
Input Bias Current Change
(28 Vdc ≤ VI ≤ 38 Vdc)
(1.0 mA ≤ IO ≤ 40 mA)
DIIB
mV
−
−
−
−
50
60
−
300
350
−
−
40
20
200
100
mV
Vdc
22.8
−
25.2
22.8
−
25.2
−
−
3.1
−
6.5
6.0
−
−
−
−
1.5
0.1
mA
mA
Output Noise Voltage
(TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
200
−
mV
Ripple Rejection
(IO = 40 mA, f = 120 Hz, 29 V ≤ VI ≤ 35 V, TJ = +25°C)
RR
31
45
−
dB
VI − VO
−
1.7
−
Vdc
Dropout Voltage
(TJ = +25°C)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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V I -V O , INPUT/OUTPUT DIFFERENTIAL VOLTAGE (V)
MC78L00A Series, NCV78L00A
MC78L05AC
Vout = 5.0 V
TJ = 25°C
6.0
IO = 1.0 mA
4.0
IO = 40 mA
IO = 100 mA
2.0
0
0
2.0
4.0
6.0
VI, INPUT VOLTAGE (V)
8.0
10
Figure 3. Dropout Characteristics
IO = 70 mA
2.0
1.5
IO = 40 mA
1.0
IO = 1.0 mA
Dropout of Regulation is
defined as when
VO = 2% of VO
0.5
0
0
25
4.0
3.8
3.6
3.4
3.2
MC78L05AC
VI = 10 V
VO= 5.0 V
IO = 40 mA
3.0
125
Figure 4. Dropout Voltage versus
Junction Temperature
4.0
MC78L05AC
Vout = 5.0 V
IO = 40 mA
TJ = 25°C
3.0
2.0
1.0
0
0
0
25
50
75
100
TA, AMBIENT TEMPERATURE (°C)
125
0
5.0
10
15
20
25
VI, INPUT VOLTAGE (V)
35
170
10,000
No Heatsink
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
110
100
RqJA = 200°C/W
PD(max) to 25°C = 625 mW
75
100
125
TA, AMBIENT TEMPERATURE (°C)
150
Figure 7. Maximum Average Power Dissipation versus
Ambient Temperature − TO−92 Type Package
Graph represents symmetrical layout
90
L
70
2.0 oz.
Copper
L
2.4
2.0
1.6
1.2
3.0 mm
50
0.8
RqJA
30
0
10
20
30
40
0.4
50
L, LENGTH OF COPPER (mm)
Figure 8. SOIC−8 Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
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2.8
PD(max) for TA = 50°C
130
1000
50
40
3.2
150
10
25
30
Figure 6. Input Bias Current
versus Input Voltage
R θ JA, THERMAL RESISTANCE JUNCTION‐TO‐AIR (° C/W)
Figure 5. Input Bias Current versus
Ambient Temperature
PD , POWER DISSIPATION (mW)
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
5.0
I IB , INPUT BIAS CURRENT (mA)
I IB , INPUT BIAS CURRENT (mA)
4.2
2.5
PD, MAXIMUM POWER DISSIPATION (W)
VO, OUTPUT VOLTAGE (V)
8.0
MC78L00A Series, NCV78L00A
APPLICATIONS INFORMATION
Design Considerations
input bypass capacitor should be selected to provide good
high−frequency characteristics to insure stable operation
under all load conditions. A 0.33 mF or larger tantalum,
mylar, or other capacitor having low internal impedance at
high frequencies should be chosen. The bypass capacitor
should be mounted with the shortest possible leads directly
across the regulators input terminals. Good construction
techniques should be used to minimize ground loops and
lead resistance drops since the regulator has no external
sense lead. Bypassing the output is also recommended.
The MC78L00A Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts
down the circuit when subjected to an excessive power
overload condition. Internal Short Circuit Protection limits
the maximum current the circuit will pass.
In many low current applications, compensation
capacitors are not required. However, it is recommended
that the regulator input be bypassed with a capacitor if the
regulator is connected to the power supply filter with long
wire lengths, or if the output load capacitance is large. The
+20V
MC78L15A
0.33mF
Input
6
R
IO
Constant
Current to
Grounded Load
2
MC1741
3
+
4
0.33mF
6.5
20V
The MC78L00 regulators can also be used as a current source
when connected as above. In order to minimize dissipation the
MC78L05C is chosen in this application. Resistor R determines
the current as follows:
5.0 V
IO =
+ IB
R
10k
7
MC78L05A
0.33mF
+VO
10k
MPS A70
-VO
MPS U55
Figure 10. +15 V Tracking Voltage Regulator
+VI
MC78LXXA
0.33mF
IIB = 3.8 mA over line and load changes
-VI
For example, a 100 mA current source would require R to be a
50W, 1/2 W resistor and the output voltage compliance would be
the input voltage less 7 V.
0.33mF
+VO
0.1mF
MC79LXXA
0.1mF
-VO
Figure 9. Current Regulator
Figure 11. Positive and Negative Regulator
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MC78L00A Series, NCV78L00A
ORDERING INFORMATION
Output Voltage
Operating
Temperature Range
MC78L05ABDG
5.0 V
NCV78L05ABDG*
Package
Shipping†
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
5.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L05ABDR2G
5.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCV78L05ABDR2G*
5.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L05ABPG
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
NCV78L05ABPG*
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L05ABPRAG
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
NCV78L05ABPRAG*
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L05ABPREG
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
NCV78L05ABPREG*
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L05ABPRMG
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
NCV78L05ABPRMG*
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
NCV78L05ABPRPG*
5.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L05ACDG
5.0 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L05ACDR2G
5.0 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L05ACPG
5.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L05ACPRAG
5.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L05ACPREG
5.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L05ACPRMG
5.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L05ACPRPG
5.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L05ACHT1G
5.0 V
TJ = 0° to +125°C
SOT−89
(Pb−Free)
2500 / Tape & Reel
MC78L08ABDG
8.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
Device
*NCV78L05A, NCV78L12A, NCV78L15A: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
www.onsemi.com
9
MC78L00A Series, NCV78L00A
ORDERING INFORMATION (continued)
Output Voltage
Operating
Temperature Range
MC78L08ABDR2G
8.0 V
NCV78L08ABDR2G*
Package
Shipping†
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
8.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L08ABPG
8.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L08ABPRAG
8.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L08ABPRPG
8.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L08ACDG
8.0 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L08ACDR2G
8.0 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L08ACPG
8.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L08ACPRAG
8.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L08ACPREG
8.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L08ACPRPG
8.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L09ABDG
9.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L09ABDR2G
9.0 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L09ABPRAG
9.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L09ABPRPG
9.0 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L09ACDG
9.0 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L09ACDR2G
9.0 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L09ACPG
9.0 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L12ABDG
12 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L12ABDR2G
12 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCV78L12ABDG*
12 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
NCV78L12ABDR2G*
12 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L12ABPG
12 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
Device
*NCV78L05A, NCV78L12A, NCV78L15A: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
www.onsemi.com
10
MC78L00A Series, NCV78L00A
ORDERING INFORMATION (continued)
Output Voltage
Operating
Temperature Range
MC78L12ABPRPG
12 V
NCV78L12ABPG*
Package
Shipping†
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
12 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L12ACDG
12 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L12ACDR2G
12 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L12ACPG
12 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L12ACPRAG
12 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L12ACPREG
12 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L12ACPRMG
12 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L12ACPRPG
12 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L15ABDG
15 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L15ABDR2G
15 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCV78L15ABDR2G*
15 V
TJ = −40° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L15ABPG
15 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L15ABPRAG
15 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L15ABPRPG
15 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L15ACDG
15 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
98 Units / Rail
MC78L15ACDR2G
15 V
TJ = 0° to +125°C
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC78L15ACPG
15 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L15ACPRAG
15 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L15ACPRPG
15 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L18ABPG
18 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L18ACPG
18 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L18ACPRAG
18 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
Device
*NCV78L05A, NCV78L12A, NCV78L15A: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
www.onsemi.com
11
MC78L00A Series, NCV78L00A
ORDERING INFORMATION (continued)
Output Voltage
Operating
Temperature Range
MC78L18ACPRMG
18 V
MC78L18ACPRPG
Package
Shipping†
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
18 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
MC78L24ABPG
24 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
NCV78L24ABPRPG*
24 V
TJ = −40° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L24ACPG
24 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 Units / Bag
MC78L24ACPRAG
24 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Tape & Reel
MC78L24ACPRPG
24 V
TJ = 0° to +125°C
TO−92
(Pb−Free)
2000 / Ammo Pack
Device
*NCV78L05A, NCV78L12A, NCV78L15A: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
MARKING DIAGRAMS
SOIC−8
D SUFFIX
CASE 751
8
1
TO−92
P SUFFIX
CASE 029
8
8LxxA
ALYWB
G
xx
A
L
Y
W
B, C
G
1
8LxxA
ALYWC
G
= 05, 08, 09, 12, or 15
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Temperature Range
= Pb−Free Package
MC78L
zzABP
ALYW
MC78L
zzACP
ALYW
1 2 3
1 2 3
zz
A
L
Y
W
SOT−89
CASE 528AG
Y W
X X
Y
= Year
W = Work Week
XX = Specific Device Code
www.onsemi.com
12
= 05, 08, 09, 12, 15, 18 or 24
= Assembly Location
= Wafer Lot
= Year
= Work Week
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE D
SCALE 1:1
12
3
STRAIGHT LEAD
1
DATE 05 MAR 2021
2
3
BENT LEAD
STYLES AND MARKING ON PAGE 3
DOCUMENT NUMBER:
DESCRIPTION:
98AON52857E
TO−92 (TO−226) 1 WATT
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE D
DATE 05 MAR 2021
STYLES AND MARKING ON PAGE 3
DOCUMENT NUMBER:
DESCRIPTION:
98AON52857E
TO−92 (TO−226) 1 WATT
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE D
DATE 05 MAR 2021
STYLE 1:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 2:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 6:
PIN 1. GATE
2. SOURCE & SUBSTRATE
3. DRAIN
STYLE 7:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 8:
PIN 1. DRAIN
2. GATE
3. SOURCE & SUBSTRATE
STYLE 9:
PIN 1. BASE 1
2. EMITTER
3. BASE 2
STYLE 10:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 11:
PIN 1. ANODE
2. CATHODE & ANODE
3. CATHODE
STYLE 12:
PIN 1. MAIN TERMINAL 1
2. GATE
3. MAIN TERMINAL 2
STYLE 13:
PIN 1. ANODE 1
2. GATE
3. CATHODE 2
STYLE 14:
PIN 1. EMITTER
2. COLLECTOR
3. BASE
STYLE 15:
PIN 1. ANODE 1
2. CATHODE
3. ANODE 2
STYLE 16:
PIN 1. ANODE
2. GATE
3. CATHODE
STYLE 17:
PIN 1. COLLECTOR
2. BASE
3. EMITTER
STYLE 18:
PIN 1. ANODE
2. CATHODE
3. NOT CONNECTED
STYLE 19:
PIN 1. GATE
2. ANODE
3. CATHODE
STYLE 20:
PIN 1. NOT CONNECTED
2. CATHODE
3. ANODE
STYLE 21:
PIN 1. COLLECTOR
2. EMITTER
3. BASE
STYLE 22:
PIN 1. SOURCE
2. GATE
3. DRAIN
STYLE 23:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 24:
PIN 1. EMITTER
2. COLLECTOR/ANODE
3. CATHODE
STYLE 25:
PIN 1. MT 1
2. GATE
3. MT 2
STYLE 26:
PIN 1.
2.
3.
STYLE 27:
PIN 1. MT
2. SUBSTRATE
3. MT
STYLE 28:
PIN 1. CATHODE
2. ANODE
3. GATE
STYLE 29:
PIN 1. NOT CONNECTED
2. ANODE
3. CATHODE
STYLE 30:
PIN 1. DRAIN
2. GATE
3. SOURCE
STYLE 32:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
STYLE 33:
PIN 1. RETURN
2. INPUT
3. OUTPUT
STYLE 34:
PIN 1. INPUT
2. GROUND
3. LOGIC
STYLE 35:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
VCC
GROUND 2
OUTPUT
STYLE 31:
PIN 1. GATE
2. DRAIN
3. SOURCE
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
ALYWG
G
XXXX
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON52857E
TO−92 (TO−226) 1 WATT
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 3 OF 3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−89, 3 LEAD
CASE 528AG
ISSUE O
DATE 04 MAR 2014
SCALE 2:1
A
D
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. LEAD THICKNESS INCLUDES LEAD FINISH.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
5. DIMENSIONS L, L2, D2, AND H ARE MEASURED AT
DATUM PLANE C.
6. CENTER LEAD CONTOUR MAY VARY WITHIN THE
REGION DEFINED BY DIMENSION E.
7. DIMENSION D2 IS DEFINED AT ITS WIDEST POINT.
H
1
2
3
DIM
A
b
b1
c
D
D2
E
e
H
L
TOP VIEW
c
A
0.10 C
C
SIDE VIEW
e
b1
1
GENERIC
MARKING DIAGRAM*
e
b
2
MILLIMETERS
MIN
MAX
1.40
1.60
0.38
0.47
0.46
0.55
0.40
0.44
4.40
4.60
1.60
1.90
2.40
2.60
1.50 BSC
4.05
4.25
0.89
1.20
L2
Y W
3
L
X X
Y
= Year
W = Work Week
XX = Specific Device Code
D2
B
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT*
2.00
PACKAGE
OUTLINE
4.45
1.57
2X
1
0.50
2X
1.50
0.86
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON82692F
SOT−89, 3 LEAD
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
8
1
SCALE 1:1
−X−
DATE 16 FEB 2011
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
8
8
1
1
IC
4.0
0.155
XXXXX
A
L
Y
W
G
IC
(Pb−Free)
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
XXXXXX
AYWW
1
1
Discrete
XXXXXX
AYWW
G
Discrete
(Pb−Free)
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
1.270
0.050
SCALE 6:1
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
8
8
XXXXX
ALYWX
G
XXXXX
ALYWX
1.52
0.060
0.6
0.024
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
7.0
0.275
DIM
A
B
C
D
G
H
J
K
M
N
S
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SOIC−8 NB
CASE 751−07
ISSUE AK
DATE 16 FEB 2011
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
7. BASE
8. EMITTER
STYLE 2:
PIN 1. COLLECTOR, DIE, #1
2. COLLECTOR, #1
3. COLLECTOR, #2
4. COLLECTOR, #2
5. BASE, #2
6. EMITTER, #2
7. BASE, #1
8. EMITTER, #1
STYLE 3:
PIN 1. DRAIN, DIE #1
2. DRAIN, #1
3. DRAIN, #2
4. DRAIN, #2
5. GATE, #2
6. SOURCE, #2
7. GATE, #1
8. SOURCE, #1
STYLE 4:
PIN 1. ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
8. COMMON CATHODE
STYLE 5:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
6. GATE
7. SOURCE
8. SOURCE
STYLE 6:
PIN 1. SOURCE
2. DRAIN
3. DRAIN
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
STYLE 7:
PIN 1. INPUT
2. EXTERNAL BYPASS
3. THIRD STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE 3
7. SECOND STAGE Vd
8. FIRST STAGE Vd
STYLE 8:
PIN 1. COLLECTOR, DIE #1
2. BASE, #1
3. BASE, #2
4. COLLECTOR, #2
5. COLLECTOR, #2
6. EMITTER, #2
7. EMITTER, #1
8. COLLECTOR, #1
STYLE 9:
PIN 1. EMITTER, COMMON
2. COLLECTOR, DIE #1
3. COLLECTOR, DIE #2
4. EMITTER, COMMON
5. EMITTER, COMMON
6. BASE, DIE #2
7. BASE, DIE #1
8. EMITTER, COMMON
STYLE 10:
PIN 1. GROUND
2. BIAS 1
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS 2
7. INPUT
8. GROUND
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 13:
PIN 1. N.C.
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 14:
PIN 1. N−SOURCE
2. N−GATE
3. P−SOURCE
4. P−GATE
5. P−DRAIN
6. P−DRAIN
7. N−DRAIN
8. N−DRAIN
STYLE 15:
PIN 1. ANODE 1
2. ANODE 1
3. ANODE 1
4. ANODE 1
5. CATHODE, COMMON
6. CATHODE, COMMON
7. CATHODE, COMMON
8. CATHODE, COMMON
STYLE 16:
PIN 1. EMITTER, DIE #1
2. BASE, DIE #1
3. EMITTER, DIE #2
4. BASE, DIE #2
5. COLLECTOR, DIE #2
6. COLLECTOR, DIE #2
7. COLLECTOR, DIE #1
8. COLLECTOR, DIE #1
STYLE 17:
PIN 1. VCC
2. V2OUT
3. V1OUT
4. TXE
5. RXE
6. VEE
7. GND
8. ACC
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 19:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. MIRROR 2
7. DRAIN 1
8. MIRROR 1
STYLE 20:
PIN 1. SOURCE (N)
2. GATE (N)
3. SOURCE (P)
4. GATE (P)
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
PIN 1. CATHODE 1
2. CATHODE 2
3. CATHODE 3
4. CATHODE 4
5. CATHODE 5
6. COMMON ANODE
7. COMMON ANODE
8. CATHODE 6
STYLE 22:
PIN 1. I/O LINE 1
2. COMMON CATHODE/VCC
3. COMMON CATHODE/VCC
4. I/O LINE 3
5. COMMON ANODE/GND
6. I/O LINE 4
7. I/O LINE 5
8. COMMON ANODE/GND
STYLE 23:
PIN 1. LINE 1 IN
2. COMMON ANODE/GND
3. COMMON ANODE/GND
4. LINE 2 IN
5. LINE 2 OUT
6. COMMON ANODE/GND
7. COMMON ANODE/GND
8. LINE 1 OUT
STYLE 24:
PIN 1. BASE
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
STYLE 25:
PIN 1. VIN
2. N/C
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
STYLE 26:
PIN 1. GND
2. dv/dt
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
STYLE 29:
PIN 1. BASE, DIE #1
2. EMITTER, #1
3. BASE, #2
4. EMITTER, #2
5. COLLECTOR, #2
6. COLLECTOR, #2
7. COLLECTOR, #1
8. COLLECTOR, #1
STYLE 30:
PIN 1. DRAIN 1
2. DRAIN 1
3. GATE 2
4. SOURCE 2
5. SOURCE 1/DRAIN 2
6. SOURCE 1/DRAIN 2
7. SOURCE 1/DRAIN 2
8. GATE 1
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
STYLE 27:
PIN 1. ILIMIT
2. OVLO
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
STYLE 28:
PIN 1. SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
5. V_MON
6. VBULK
7. VBULK
8. VIN
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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