DATA SHEET
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Negative Voltage
Regulators
TO−220
T SUFFIX
CASE 221AB
1.0 A
Heatsink surface
connected to Pin 2.
MC7900 Series
The MC7900 series of fixed output negative voltage regulators are
intended as complements to the popular MC7800 series devices.
These negative regulators are available in the same seven−voltage
options as the MC7800 devices. In addition, one extra voltage option
commonly employed in MECL systems is also available in the
negative MC7900 series.
Available in fixed output voltage options from − 5.0 V to − 24 V,
these regulators employ current limiting, thermal shutdown, and
safe−area compensation − making them remarkably rugged under
most operating conditions. With adequate heatsinking they can deliver
output currents in excess of 1.0 A.
• No External Components Required
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe−Area Compensation
• Available in 2% Voltage Tolerance (See Ordering Information)
• Pb−Free Package May be Available. The G−Suffix Denotes a
Pb−Free Lead Finish
D2PAK
D2T SUFFIX
CASE 936
2.0 k
14.7 k
2.4 k
4.0 k
1.0 k
1
2
Heatsink surface (shown as terminal 4 in
case outline drawing) is connected to Pin 2.
STANDARD APPLICATION
Input
Cin*
0.33 mF
25
12 k
1.2 k
4.0 k
1.0 k
3
3
8.0 k
3.6 k
2
Pin 1. Ground
2. Input
3. Output
Gnd
2.0 k
1
R1
MC79XX
Output
CO**
1.0 mF
A common ground is required between the input
and the output voltages. The input voltage must
remain typically 2.0 V above more negative even
during the high point of the input ripple voltage.
XX, These two digits of the type number
indicate nominal voltage.
** Cin is required if regulator is located an
appreciable distance from power supply filter.
** CO improve stability and transient response.
1.6 k
R2
VO
10 k
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
20 pF
10 pF
2.0 k
20 k
20 k
10 k
240
0.3
1.1 k
750
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 12 of this data sheet.
VI
This device contains 26 active transistors.
Figure 1. Representative Schematic Diagram
© Semiconductor Components Industries, LLC, 2013
October, 2021 − Rev. 21
1
Publication Order Number:
MC7900/D
MC7900 Series
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Symbol
Value
Unit
VI
−35
−40
Vdc
PD
qJA
qJC
Internally Limited
65
5.0
W
°C/W
°C/W
PD
qJA
qJC
Internally Limited
70
5.0
W
°C/W
°C/W
Storage Junction Temperature Range
Tstg
−65 to +150
°C
Junction Temperature
TJ
+150
°C
Rating
Input Voltage (− 5.0 V ≥ VO ≥ −18 V)
Input Voltage (24 V)
Power Dissipation
Case 221A
TA = +25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Case 936 (D2PAK)
TA = +25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL_STD_883, Method 3015
Machine Model Method 200 V
MC7905B, MC7905C
ELECTRICAL CHARACTERISTICS (VI = −10 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
−4.8
−5.0
−5.2
Vdc
Line Regulation (Note 1)
(TJ = +25°C, IO = 100 mA)
−7.0 Vdc ≥ VI ≥ − 25 Vdc
−8.0 Vdc ≥ VI ≥ −12 Vdc
(TJ = +25°C, IO = 500 mA)
−7.0 Vdc ≥ VI ≥ − 25 Vdc
−8.0 Vdc ≥ VI ≥ −12 Vdc
Regline
Load Regulation, TJ = +25°C (Note 1)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
−
−
7.0
2.0
50
25
−
−
35
8.0
100
50
−
−
11
4.0
100
50
−4.75
−
−5.25
−
4.3
8.0
−
−
−
−
1.3
0.5
Vn
−
40
−
RR
−
70
−
Output Voltage
−7.0 Vdc ≥ VI ≥ − 20 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−7.0 Vdc ≥ VI ≥ − 25 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Ripple Rejection (IO = 20 mA, f = 120 Hz)
Dropout Voltage
IO = 1.0 A, TJ = +25°C
VI−VO
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C
mV
DVO/DT
mV
Vdc
mA
mA
mV
dB
Vdc
−
1.3
−
−
−1.0
−
mV/°C
1. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
*Tlow = −40°C for MC7905B and Tlow = 0°C for MC7905C.
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MC7900 Series
MC7905AC
ELECTRICAL CHARACTERISTICS (VI = −10 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)
Symbol
Min
Typ
Max
Unit
VO
−4.9
−5.0
−5.1
Vdc
−
−
−
−
2.0
7.0
7.0
6.0
25
50
50
50
−
−
−
11
4.0
9.0
100
50
100
−4.80
−
−5.20
−
4.4
8.0
−
−
−
−
−
−
1.3
0.5
0.5
Line Regulation (Note 2)
−8.0 Vdc ≥ VI ≥ −12 Vdc; IO = 1.0 A, TJ = +25°C
−8.0 Vdc ≥ VI ≥ −12 Vdc; IO = 1.0 A
−7.5 Vdc ≥ VI ≥ − 25 Vdc; IO = 500 mA
−7.0 Vdc ≥ VI ≥ − 20 Vdc; IO = 1.0 A, TJ = +25°C
Regline
Load Regulation (Note 2)
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C
250 mA ≤ IO ≤ 750 mA
5.0 mA ≤ IO ≤ 1.0 A
Regload
Output Voltage
−7.5 Vdc ≥ VI ≥ − 20 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current
IIB
Input Bias Current Change
−7.5 Vdc ≥ VI ≥ − 25 Vdc
5.0 mA ≤ IO ≤ 1.0 A
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C
DIIB
mV
mV
Vdc
mA
mA
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
40
−
mV
Ripple Rejection (IO = mA, f = 120 Hz)
RR
−
70
−
dB
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Dropout Voltage (IO = 1.0 A. TJ = +25°C)
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C
DVO/DT
mV/°C
MC7905.2C
ELECTRICAL CHARACTERISTICS (VI = −10 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
−5.0
−5.2
−5.4
Vdc
Line Regulation (Note 2)
(TJ = +25°C, IO = 100 mA)
−7.2 Vdc ≥ VI ≥ − 25 Vdc
−8.0 Vdc ≥ VI ≥ −12 Vdc
(TJ = +25°C, IO = 500 mA)
−7.2 Vdc ≥ VI ≥ − 25 Vdc
−8.0 Vdc ≥ VI ≥ −12 Vdc
Regline
Load Regulation, TJ = +25°C (Note 2)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
mV
−
−
8.0
2.2
52
27
−
−
37
8.5
105
52
−
−
12
4.5
105
52
−4.95
−
−5.45
−
4.3
8.0
−
−
−
−
1.3
0.5
Vn
−
42
−
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
68
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Output Voltage
−7.2 Vdc ≥ VI ≥ − 20 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−7.2 Vdc ≥ VI ≥ − 25 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C
DVO/DT
mV
Vdc
mA
mA
mV
mV/°C
2. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
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MC7900 Series
MC7906C
ELECTRICAL CHARACTERISTICS (VI = −11 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
−5.75
−6.0
−6.25
Vdc
Line Regulation (Note 3)
(TJ = +25°C, IO = 100 mA)
−8.0 Vdc ≥ VI ≥ − 25 Vdc
−9.0 Vdc ≥ VI ≥ −13 Vdc
(TJ = +25°C, IO = 500 mA)
−8.0 Vdc ≥ VI ≥ − 25 Vdc
−9.0 Vdc ≥ VI ≥ −13 Vdc
Regline
Load Regulation, TJ = +25°C (Note 3)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
Output Voltage
−8.0 Vdc ≥ VI ≥ − 21 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−8.0 Vdc ≥ VI ≥ − 25 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
mV
−
−
9.0
3.0
60
30
−
−
43
10
120
60
−
−
13
5.0
120
60
−5.7
−
−6.3
−
4.3
8.0
−
−
−
−
1.3
0.5
mV
Vdc
mA
mA
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
45
−
mV
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
65
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C
DVO/DT
mV/°C
MC7908C
ELECTRICAL CHARACTERISTICS (VI = −14 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)
Symbol
Min
Typ
Max
Unit
VO
−7.7
−8.0
−8.3
Vdc
Line Regulation (Note 3)
(TJ = +25°C, IO = 100 mA)
−10.5 Vdc ≥ VI ≥ −25 Vdc
−11 Vdc ≥ VI ≥ −17 Vdc
(TJ = +25°C, IO = 500 mA)
−10.5 Vdc ≥ VI ≥ −25 Vdc
−11 Vdc ≥ VI ≥ −17 Vdc
Regline
Load Regulation, TJ = +25°C (Note 3)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
mV
−
−
12
5.0
80
40
−
−
50
22
160
80
−
−
26
9.0
160
80
−7.6
−
−8.4
−
4.3
8.0
−
−
−
−
1.0
0.5
Vn
−
52
−
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
62
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Output Voltage
−10.5 Vdc ≥ VI ≥ − 23 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−10.5 Vdc ≥ VI ≥ − 25 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C
DVO/DT
mV
Vdc
mA
mA
mV
mV/°C
3. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
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MC7900 Series
MC7912B, MC7912C
ELECTRICAL CHARACTERISTICS (VI = −19 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)
Symbol
Min
Typ
Max
Unit
VO
−11.5
−12
−12.5
Vdc
Line Regulation (Note 4)
(TJ = +25°C, IO = 100 mA)
−14.5 Vdc ≥ VI ≥ − 30 Vdc
−16 Vdc ≥ VI ≥ − 22 Vdc
(TJ = +25°C, IO = 500 mA)
−14.5 Vdc ≥ VI ≥ − 30 Vdc
−16 Vdc ≥ VI ≥ − 22 Vdc
Regline
Load Regulation, TJ = +25°C (Note 4)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
Output Voltage
−14.5 Vdc ≥ VI ≥ − 27 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−14.5 Vdc ≥ VI ≥ − 30 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
mV
−
−
13
6.0
120
60
−
−
55
24
240
120
−
−
46
17
240
120
−11.4
−
−12.6
−
4.4
8.0
−
−
−
−
1.0
0.5
mV
Vdc
mA
mA
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
75
−
mV
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
61
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C
DVO/DT
mV/°C
MC7912AC
ELECTRICAL CHARACTERISTICS (VI = −19 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
VO
−11.75
−12
−12.25
Vdc
−
−
−
−
6.0
24
24
13
60
120
120
120
−
−
−
46
17
35
150
75
150
−11.5
−
−12.5
−
4.4
8.0
−
−
−
−
−
−
0.8
0.5
0.5
Vn
−
75
−
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
61
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Output Voltage (TJ = +25°C)
Line Regulation (Note 4)
−16 Vdc ≥ VI ≥ − 22 Vdc; IO = 1.0 A, TJ = +25°C
−16 Vdc ≥ VI ≥ − 22 Vdc; IO = 1.0 A
−14.8 Vdc ≥ VI ≥ − 30 Vdc; IO = 500 mA
−14.5 Vdc ≥ VI ≥ − 27 Vdc; IO = 1.0 A, TJ = +25°C
Regline
Load Regulation (Note 4)
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C
250 mA ≤ IO ≤ 750 mA
5.0 mA ≤ IO ≤ 1.0 A
Regload
Output Voltage
−14.8 Vdc ≥ VI ≥ − 27 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current
IIB
Input Bias Current Change
−15 Vdc ≥ VI ≥ − 30 Vdc
5.0 mA ≤ IO ≤ 1.0 A
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C
DIIB
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C
DVO/DT
mV
mV
Vdc
mA
mA
mV
mV/°C
4. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
*Tlow = −40°C for MC7912B and Tlow = 0°C for MC7912C.
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MC7900 Series
MC7915B, MC7915C
ELECTRICAL CHARACTERISTICS (VI = − 23 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics
Output Voltage (TJ = +25°C)
Symbol
Min
Typ
Max
Unit
VO
−14.4
−15
−15.6
Vdc
Line Regulation (Note 5)
(TJ = +25°C, IO = 100 mA)
−17.5 Vdc ≥ VI ≥ − 30 Vdc
−20 Vdc ≥ VI ≥ − 26 Vdc
(TJ = +25°C, IO = 500 mA)
−17.5 Vdc ≥ VI ≥ − 30 Vdc
−20 Vdc ≥ VI ≥ − 26 Vdc
Regline
Load Regulation, TJ = +25°C (Note 5)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
Output Voltage
−17.5 Vdc ≥ VI ≥ − 30 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−17.5 Vdc ≥ VI ≥ − 30 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
mV
−
−
14
6.0
150
75
−
−
57
27
300
150
−
−
68
25
300
150
−14.25
−
−15.75
−
4.4
8.0
−
−
−
−
1.0
0.5
mV
Vdc
mA
mA
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
90
−
mV
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
60
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C
DVO/DT
mV/°C
MC7915AC
ELECTRICAL CHARACTERISTICS (VI = − 23 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
VO
−14.7
−15
−15.3
Vdc
−
−
−
−
27
57
57
57
75
150
150
150
−
−
−
68
25
40
150
75
150
−14.4
−
−15.6
−
4.4
8.0
−
−
−
−
−
−
0.8
0.5
0.5
Vn
−
90
−
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
60
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Output Voltage (TJ = +25°C)
Line Regulation (Note 5)
−20 Vdc ≥ VI ≥ − 26 Vdc, IO = 1.0 A, TJ = +25°C
−20 Vdc ≥ VI ≥ − 26 Vdc, IO = 1.0 A,
−17.9 Vdc ≥ VI ≥ − 30 Vdc, IO = 500 mA
−17.5 Vdc ≥ VI ≥ − 30 Vdc, IO = 1.0 A, TJ = +25°C
Regline
Load Regulation (Note 5)
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C
250 mA ≤ IO ≤ 750 mA
5.0 mA ≤ IO ≤ 1.0 A
Regload
Output Voltage
−17.9 Vdc ≥ VI ≥ − 30 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current
IIB
Input Bias Current Change
−17.5 Vdc ≥ VI ≥ − 30 Vdc
5.0 mA ≤ IO ≤ 1.0 A
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C
DIIB
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C
DVO/DT
mV
mV
Vdc
mA
mA
mV
mV/°C
5. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
*Tlow = −40°C for MC7915B and Tlow = 0°C for MC7915C.
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MC7900 Series
MC7918C
ELECTRICAL CHARACTERISTICS (VI = − 27 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
−17.3
−18
−18.7
Vdc
Line Regulation (Note 6)
(TJ = +25°C, IO = 100 mA)
−21 Vdc ≥ VI ≥ − 33 Vdc
−24 Vdc ≥ VI ≥ − 30 Vdc
(TJ = +25°C, IO = 500 mA)
−21 Vdc ≥ VI ≥ − 33 Vdc
−24 Vdc ≥ VI ≥ − 30 Vdc
Regline
Load Regulation, TJ = +25°C (Note 6)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
Output Voltage
−21 Vdc ≥ VI ≥ − 33 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−21 Vdc ≥ VI ≥ − 33 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
mV
−
−
25
10
180
90
−
−
90
50
360
180
−
−
110
55
360
180
−17.1
−
−18.9
−
4.5
8.0
−
−
−
−
1.0
0.5
mV
Vdc
mA
mA
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Vn
−
110
−
mV
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
59
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C
DVO/DT
mV/°C
MC7924B, MC7924C
ELECTRICAL CHARACTERISTICS (VI = − 33 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
VO
−23
−24
−25
Vdc
Line Regulation (Note 6)
(TJ = +25°C, IO = 100 mA)
−27 Vdc ≥ VI ≥ − 38 Vdc
−30 Vdc ≥ VI ≥ − 36 Vdc
(TJ = +25°C, IO = 500 mA)
−27 Vdc ≥ VI ≥ − 38 Vdc
−30 Vdc ≥ VI ≥ − 36 Vdc
Regline
Load Regulation, TJ = +25°C (Note 6)
5.0 mA ≤ IO ≤ 1.5 A
250 mA ≤ IO ≤ 750 mA
Regload
mV
−
−
31
14
240
120
−
−
118
70
470
240
−
−
150
85
480
240
−22.8
−
−25.2
−
4.6
8.0
−
−
−
−
1.0
0.5
Vn
−
170
−
Ripple Rejection (IO = 20 mA, f = 120 Hz)
RR
−
56
−
dB
Dropout Voltage (IO = 1.0 A, TJ = +25°C)
VI−VO
−
1.3
−
Vdc
−
−1.0
−
Output Voltage
−27 Vdc ≥ VI ≥ − 38 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W
VO
Input Bias Current (TJ = +25°C)
IIB
Input Bias Current Change
−27 Vdc ≥ VI ≥ − 38 Vdc
5.0 mA ≤ IO ≤ 1.5 A
DIIB
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz)
Average Temperature Coefficient of Output Voltage
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C
DVO/DT
mV
Vdc
mA
mA
mV
mV/°C
6. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
*Tlow = −40°C for MC7924B and Tlow = 0°C for MC7924C.
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7
MC7900 Series
20
qHS = 5°C/W
5.0
4.0
3.0
2.0
1.0
I O , OUTPUT CURRENT (A)
PD, POWER DISSIPATION (W)
2.5
Infinite Heatsink
10
qHS = 15°C/W
No Heatsink
0.5
0.4
0.3
0.2
qJC = 5° C/W
qJA = 65° C/W
PD(max) = 15W
0.1
25
50
75
100
125
1.0
0.5
0
3.0
6.0
9.0
12
15
18
21
24
27
|VI -VO| INPUT-OUTPUT VOLTAGE DIFFERENTIAL (V)
Figure 2. Worst Case Power Dissipation as a
Function of Ambient Temperature
Figure 3. Peak Output Current as a Function
of Input−Output Differential Voltage
30
80
Vin = -11 V
VO = -6.0 V
IO = 20 mA
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
1.5
TA, AMBIENT TEMPERATURE (°C)
80
60
40
20
10
100
1.0 k
10 k
f = 120 Hz
IO = 20 mA
DVin = 1.0 V(RMS)
70
60
50
40
100 k
f, FREQUENCY (Hz)
8.0
10
12
14
16
VO, OUTPUT VOLTAGE (V)
Figure 4. Ripple Rejection as a
Function of Frequency
Figure 5. Ripple Rejection as a Function
of Output Voltage
6.26
2.0
4.0
6.0
18
20
22
I IB , INPUT BIAS CURRENT (mA)
VO, OUTPUT VOLTAGE (-V)
5.2
6.22
5.0
6.18
4.8
6.14
Vin = -11 V
VO = -6.0 V
IO = 20 mA
4.6
Vin = -11 V
VD = -6.0 V
IO = 20 mA
6.10
6.06
TJ = +25°C
0
150
100
0
2.0
4.4
4.2
-25
0
25
50
75
100
125
150
175
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Output Voltage as a Function
of Junction Temperature
Figure 7. Quiescent Current as a
Function of Temperature
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8
125
MC7900 Series
APPLICATIONS INFORMATION
Design Considerations
-10 V
Input
The MC7900 Series of fixed voltage regulators are
designed with Thermal overload Protection that shuts down
the circuit when subjected to an excessive power overload
condition. Internal Short Circuit Protection that limits the
maximum current the circuit will pass, and Output Transistor
Safe−Area Compensation that reduces the output short circuit
current as the voltage across the pass transistor is increased.
In many low current applications, compensation
capacitors are not required. However, it is recommended
that the regulator input be bypassed with a capacitor if the
regulator is connected to the power supply filter with long
wire lengths, or if the output load capacitance is large. An
input bypass capacitor should be selected to provide good
high−frequency characteristics to insure stable operation
under all load conditions. A 0.33 mF or larger tantalum,
mylar, or other capacitor having low internal impedance at
high frequencies should be chosen. The capacitor chosen
should have an equivalent series resistance of less than
0.7 W. The bypass capacitor should be mounted with the
shortest possible leads directly across the regulators input
terminals. Normally good construction techniques should be
used to minimize ground loops and lead resistance drops
since the regulator has no external sense lead. Bypassing the
output is also recommended.
-20 V
Input
MC7905
10
IO = 200 mA
R
VO ≤ 10 V
2N3055*
or Equiv
0.56
0.56
MJE200*
or Equiv
MC7905*
5.6
10 mF
+
Gnd
+
1.0 mF
+
1.0 mF
+
Gnd
Figure 9. Current Boost Regulator
(− 5.0 V @ 4.0 A, with 5.0 A Current Limiting)
When a boost transistor is used, short circuit currents are
equal to the sum of the series pass and regulator limits, which
are measured at 3.2 A and 1.8 A respectively in this case.
Series pass limiting is approximately equal to 0.6 V/RSC.
Operation beyond this point to the peak current capability of
the MC7905C is possible if the regulator is mounted on a
heatsink; otherwise thermal shutdown will occur when the
additional load current is picked up by the regulator.
1N4001G or Equiv
+20 V
Input
0.33 mF
+15 V
Output
MC7815
+
1.0 mF
1.0 mF
+
Gnd
1.0 mF
Gnd
1.0 mF
*Mounted on heatsink.
+
+
-5.0 V
Output
0.56
Gnd
1.0 mF
1.0 mF
+
Clamp diode
1N4001G
or Equiv
Gnd
1N4001G
or Equiv
MC7915
-20 V
Input
Figure 8. Current Regulator
The MC7905, −5.0 V regulator can be used as a constant
current source when connected as above. The output current
is the sum of resistor R current and quiescent bias current as
follows:
-15 V
Output
1N4001G or Equiv
Figure 10. Operational Amplifier Supply
The MC7815 and MC7915 positive and negative
regulators may be connected as shown to obtain a dual
power supply for operational amplifiers. A clamp diode
should be used at the output of the MC7815 to prevent
potential latch−up problems whenever the output of the
positive regulator (MC7815) is drawn below ground with an
output current greater than 200 mA.
5.0 V
IO +
) IB
R
The quiescent current for this regulator is typically 4.3
mA. The 5.0 V regulator was chosen to minimize dissipation
and to allow the output voltage to operate to within 6.0 V
below the input voltage.
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9
MC7900 Series
Protection Diodes
Diode D2 prevents output capacitor from discharging thru
the MC7915 during an input short circuit or fast switch off
of power supply.
When external capacitors are used with MC7900 series
regulator it is sometimes necessary to add protection diodes
to prevent the capacitors from discharging through low
current points into the regulator or from output polarity
reversals. Generally, no protection diode is required for
values of output capacitance less then 10mF. Figure 11 shows
the MC7915 with the recommended protection diodes.
• Opposite Polarity Protection
Diode D1 protects the regulator from output polarity
reversals during startup, power off and short-circuit
operation.
• Reverse-bias Protection
Gnd
+
1.0 mF
1.0 mF
Gnd
+
D1
MBRS140
or Equiv
MC7915
-20 V
Input
-15 V
Output
D2
MBRS140
or Equiv
Figure 11. Protection Diodes
DEFINITIONS
JUNCTION‐TO‐AIR (°C/W)
R θ JA, THERMAL RESISTANCE
80
3.5
PD(max) for TA = +50°C
70
3.0
Free Air
Mounted
Vertically
60
Minimum
Size Pad
50
L
40
RqJA
30
0
5.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
2.0 oz. Copper
L
10
15
20
25
2.5
2.0
1.5
1.0
30
L, LENGTH OF COPPER (mm)
Figure 12. D2PAK Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
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10
PD, MAXIMUM POWER DISSIPATION (W)
Input Bias Current − That part of the input current that
is not delivered to the load.
Output Noise Voltage − The rms AC voltage at the
output, with constant load and no input ripple, measured
over a specified frequency range.
Long Term Stability − Output voltage stability under
accelerated life test conditions with the maximum rated
voltage listed in the devices’ electrical characteristics and
maximum power dissipation.
Line Regulation − The change in output voltage for a
change in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
Load Regulation − The change in output voltage for a
change in load current at constant chip temperature.
Maximum Power Dissipation − The maximum total
device dissipation for which the regulator will operate
within specifications.
MC7900 Series
ORDERING INFORMATION
Device
MC7905ACD2TR4G
Nominal
Output Voltage
Output Voltage
Tolerance
−5.0 V
2%
4%
MC7905BTG
Operating
Temperature Range
Shipping†
D2PAK
(Pb−Free)
TJ = 0°C to +125°C
800 Tape & Reel
TO−220
(Pb−Free)
TJ = −40°C to +125°C
50 Units/Rail
TO−220
(Pb−Free)
TJ = 0°C to +125°C
50 Units/Rail
Package
MC7905CTG
MC7906CTG
−6.0 V
4%
TO−220
(Pb−Free)
TJ = 0°C to +125°C
50 Units/Rail
MC7912ACTG
−12 V
2%
TO−220
(Pb−Free)
TJ = 0°C to +125°C
50 Units/Rail
4%
D2PAK
(Pb−Free)
TJ = −40°C to +125°C
800 Tape & Reel
MC7912BD2TR4G
MC7912BTG
TO−220
(Pb−Free)
MC7912CTG
TO−220
(Pb−Free)
TJ = 0°C to +125°C
50 Units/Rail
D2PAK
(Pb−Free)
TJ = 0°C to +125°C
50 Units/Rail
MC7915ACD2TG
− 15 V
2%
50 Units/Rail
MC7915ACD2TR4G
D2PAK
(Pb−Free)
800 Tape & Reel
MC7915ACTG
TO−220
(Pb−Free)
50 Units/Rail
MC7915BTG
4%
TO−220
(Pb−Free)
TJ = −40°C to +125°C
50 Units/Rail
MC7915BD2TR4G
D2PAK
(Pb−Free)
MC7915CD2TR4G
D2PAK
(Pb−Free)
MC7915CTG
TO−220
(Pb−Free)
50 Units/Rail
MC7918CTG
TO−220
(Pb−Free)
50 Units/Rail
800 Tape & Reel
TJ = 0°C to +125°C
800 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
MC7900 Series
MARKING DIAGRAMS
TO−220
T SUFFIX
CASE 221AB
MC
79xxACT
AWLYWWG
MC
7905.2CT
AWLYWWG
MC
79xxBT
AWLYWWG
MC
79xxCT
AWLYWWG
1 2 3
1 2 3
1 2 3
1 2 3
D2PAK
D2T SUFFIX
CASE 936
MC
79xxACD2T
AWLYWWG
MC
79xxBD2T
AWLYWWG
2
1
MC
79xxCD2T
AWLYWWG
2
3
1
xx
A
WL
Y
WW
G
2
3
= Nominal Voltage
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Device
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12
1
3
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220, SINGLE GAUGE
CASE 221AB−01
ISSUE A
−T−
B
F
T
SCALE 1:1
SEATING
PLANE
C
S
DATE 16 NOV 2010
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS
S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
U
1 2 3
H
K
Z
L
R
V
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.020
0.024
0.235
0.255
0.000
0.050
0.045
----0.080
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
0.508
0.61
5.97
6.47
0.00
1.27
1.15
----2.04
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
BASE
EMITTER
COLLECTOR
EMITTER
STYLE 3:
PIN 1.
2.
3.
4.
CATHODE
ANODE
GATE
ANODE
STYLE 4:
PIN 1.
2.
3.
4.
MAIN TERMINAL 1
MAIN TERMINAL 2
GATE
MAIN TERMINAL 2
STYLE 5:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
STYLE 6:
PIN 1.
2.
3.
4.
ANODE
CATHODE
ANODE
CATHODE
STYLE 7:
PIN 1.
2.
3.
4.
CATHODE
ANODE
CATHODE
ANODE
STYLE 8:
PIN 1.
2.
3.
4.
CATHODE
ANODE
EXTERNAL TRIP/DELAY
ANODE
STYLE 9:
PIN 1.
2.
3.
4.
GATE
COLLECTOR
EMITTER
COLLECTOR
STYLE 10:
PIN 1.
2.
3.
4.
GATE
SOURCE
DRAIN
SOURCE
STYLE 11:
PIN 1.
2.
3.
4.
DRAIN
SOURCE
GATE
SOURCE
DOCUMENT NUMBER:
DESCRIPTION:
98AON23085D
TO−220, SINGLE GAUGE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK
CASE 936−03
ISSUE E
DATE 29 SEP 2015
SCALE 1:1
T
C
A
K
B
J
C
ES
OPTIONAL
CHAMFER
DETAIL C
DETAIL C
3
F
G
SIDE VIEW
2X
TOP VIEW
D
0.010 (0.254)
N
DUAL GAUGE
CONSTRUCTION
P
BOTTOM VIEW
SIDE VIEW
SINGLE GAUGE
CONSTRUCTION
T
M
M
R
T
V
H
2
U
ED
OPTIONAL
CHAMFER
S
1
TERMINAL 4
T
SEATING
PLANE
L
BOTTOM VIEW
DETAIL C
OPTIONAL CONSTRUCTIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
6. SINGLE GAUGE DESIGN WILL BE SHIPPED AF
TER FPCN EXPIRATION IN OCTOBER 2011.
DIM
A
B
C
D
ED
ES
F
G
H
J
K
L
M
N
P
R
S
U
V
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.018
0.026
0.051 REF
0.100 BSC
0.539
0.579
0.125 MAX
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
0_
8_
0.116 REF
0.200 MIN
0.250 MIN
MILLIMETERS
MIN
MAX
9.804 10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
0.457
0.660
1.295 REF
2.540 BSC
13.691 14.707
3.175 MAX
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
0_
8_
2.946 REF
5.080 MIN
6.350 MIN
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
10.490
XXXXXXG
ALYWW
8.380
16.155
XXXXXX = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
WW
= Work Week
G
= Pb−Free Package
2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH01005A
D2PAK
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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