2N3055(NPN), MJ2955(PNP)
Preferred Device
Complementary Silicon
Power Transistors
Complementary silicon power transistors are designed for
general−purpose switching and amplifier applications.
Features
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• DC Current Gain − hFE = 20−70 @ IC = 4 Adc
• Collector−Emitter Saturation Voltage −
•
•
15 AMPERE
POWER TRANSISTORS
COMPLEMENTARY SILICON
60 VOLTS, 115 WATTS
VCE(sat) = 1.1 Vdc (Max) @ IC = 4 Adc
Excellent Safe Operating Area
Pb−Free Packages are Available*
MAXIMUM RATINGS
Symbol
Value
Unit
Collector−Emitter Voltage
Rating
VCEO
60
Vdc
Collector−Emitter Voltage
VCER
70
Vdc
Collector−Base Voltage
VCB
100
Vdc
Emitter−Base Voltage
VEB
7
Vdc
IC
15
Adc
Collector Current − Continuous
Base Current
IB
7
Adc
Total Power Dissipation @ TC = 25°C
Derate Above 25°C
PD
115
0.657
W
W/°C
TJ, Tstg
− 65 to +200
°C
Operating and Storage Junction
Temperature Range
TO−204AA (TO−3)
CASE 1−07
STYLE 1
MARKING DIAGRAM
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
xxxx55G
AYYWW
MEX
PD, POWER DISSIPATION (WATTS)
160
140
xxxx55
120
G
A
YY
WW
MEX
100
80
= Device Code
xxxx = 2N30 or MJ20
= Pb−Free Package
= Location Code
= Year
= Work Week
= Country of Orgin
60
ORDERING INFORMATION
40
Device
20
0
0
25
50
75
100
125
150
175
200
Package
Shipping
2N3055
TO−204AA
100 Units / Tray
2N3055G
TO−204AA
(Pb−Free)
100 Units / Tray
MJ2955
TO−204AA
100 Units / Tray
MJ2955G
TO−204AA
(Pb−Free)
100 Units / Tray
TC, CASE TEMPERATURE (°C)
Figure 1. Power Derating
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 6
1
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
2N3055/D
2N3055(NPN), MJ2955(PNP)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
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THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case
Symbol
Max
Unit
RqJC
1.52
_C/W
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
VCEO(sus)
60
−
Vdc
OFF CHARACTERISTICS*
Collector−Emitter Sustaining Voltage (Note 1) (IC = 200 mAdc, IB = 0)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Collector−Emitter Sustaining Voltage (Note 1) (IC = 200 mAdc, RBE = 100 W)
VCER(sus)
70
−
Vdc
Collector Cutoff Current (VCE = 30 Vdc, IB = 0)
ICEO
−
0.7
mAdc
Collector Cutoff Current
(VCE = 100 Vdc, VBE(off) = 1.5 Vdc)
(VCE = 100 Vdc, VBE(off) = 1.5 Vdc, TC = 150°C)
ICEX
−
−
1.0
5.0
Emitter Cutoff Current (VBE = 7.0 Vdc, IC = 0)
IEBO
−
5.0
20
5.0
70
−
−
1.1
3.0
mAdc
mAdc
ON CHARACTERISTICS* (Note 1)
DC Current Gain
(IC = 4.0 Adc, VCE = 4.0 Vdc)
(IC = 10 Adc, VCE = 4.0 Vdc)
hFE
−
Collector−Emitter Saturation Voltage
(IC = 4.0 Adc, IB = 400 mAdc)
(IC = 10 Adc, IB = 3.3 Adc)
VCE(sat)
Base−Emitter On Voltage (IC = 4.0 Adc, VCE = 4.0 Vdc)
VBE(on)
−
1.5
Vdc
Is/b
2.87
−
Adc
Current Gain − Bandwidth Product (IC = 0.5 Adc, VCE = 10 Vdc, f = 1.0 MHz)
fT
2.5
−
MHz
*Small−Signal Current Gain (IC = 1.0 Adc, VCE = 4.0 Vdc, f = 1.0 kHz)
hfe
15
120
−
*Small−Signal Current Gain Cutoff Frequency (VCE = 4.0 Vdc, IC = 1.0 Adc, f = 1.0 kHz)
fhfe
10
−
kHz
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎ
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ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎ
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
(VCE = 40 Vdc, t = 1.0 s, Nonrepetitive)
DYNAMIC CHARACTERISTICS
*Indicates Within JEDEC Registration. (2N3055)
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
20
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on TC = 25°C; TJ(pk) is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated for temperature according to Figure 1.
IC, COLLECTOR CURRENT (AMP)
50 ms
10
dc
1 ms
6
4
500 ms
2
250 ms
1
0.6
0.4
0.2
BONDING WIRE LIMIT
THERMALLY LIMITED @ TC = 25°C (SINGLE PULSE)
SECOND BREAKDOWN LIMIT
6
10
20
40
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
60
Figure 2. Active Region Safe Operating Area
http://onsemi.com
2
2N3055(NPN), MJ2955(PNP)
500
200
TJ = 150°C
200
25°C
100
−55 °C
70
50
30
20
10
7.0
5.0
0.1
0.2
0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0
IC, COLLECTOR CURRENT (AMP)
70
−55 °C
50
30
20
10
10
0.1
2.0
TJ = 25°C
1.6
4.0 A
8.0 A
1.2
0.8
0.4
0
5.0
10
20
50
100 200
500 1000 2000
IB, BASE CURRENT (mA)
0.2
0.3
0.5 0.7 1.0
2.0 3.0
IC, COLLECTOR CURRENT (AMP)
5.0 7.0
10
Figure 4. DC Current Gain, MJ2955 (PNP)
VCE , COLLECTOR−EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 3. DC Current Gain, 2N3055 (NPN)
IC = 1.0 A
VCE = 4.0 V
TJ = 150°C
25°C
100
hFE , DC CURRENT GAIN
hFE , DC CURRENT GAIN
300
VCE = 4.0 V
5000
2.0
TJ = 25°C
1.6
IC = 1.0 A
4.0 A
8.0 A
1.2
0.8
0.4
0
5.0
Figure 5. Collector Saturation Region,
2N3055 (NPN)
10
20
50
100 200
500 1000 2000
IB, BASE CURRENT (mA)
5000
Figure 6. Collector Saturation Region,
MJ2955 (PNP)
1.4
2.0
TJ = 25°C
1.2
TJ = 25°C
0.8
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
1.6
1.0
VBE(sat) @ IC/IB = 10
0.6
VBE @ VCE = 4.0 V
0.4
1.2
VBE(sat) @ IC/IB = 10
VBE @ VCE = 4.0 V
0.8
0.4
0.2
0
VCE(sat) @ IC/IB = 10
VCE(sat) @ IC/IB = 10
0.1
0.2
0.3
0.5 0.7
1.0
2.0
3.0
5.0 7.0
0
10
0.1
IC, COLLECTOR CURRENT (AMPERES)
0.2
0.3
0.5
1.0
2.0
3.0
5.0
IC, COLLECTOR CURRENT (AMP)
Figure 7. “On” Voltages, 2N3055 (NPN)
Figure 8. “On” Voltages, MJ2955 (PNP)
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3
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
DATE 05/18/1988
SCALE 1:1
A
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.
C
−T−
E
D
K
2 PL
0.13 (0.005)
U
T Q
M
M
Y
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
M
−Y−
L
V
SEATING
PLANE
2
H
G
B
M
T Y
1
−Q−
0.13 (0.005)
INCHES
MIN
MAX
1.550 REF
--1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
--0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
--26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
--21.08
3.84
4.19
30.15 BSC
3.33
4.77
M
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
STYLE 2:
PIN 1. BASE
2. COLLECTOR
CASE: EMITTER
STYLE 3:
PIN 1. GATE
2. SOURCE
CASE: DRAIN
STYLE 4:
PIN 1. GROUND
2. INPUT
CASE: OUTPUT
STYLE 6:
PIN 1. GATE
2. EMITTER
CASE: COLLECTOR
STYLE 7:
PIN 1. ANODE
2. OPEN
CASE: CATHODE
STYLE 8:
PIN 1. CATHODE #1
2. CATHODE #2
CASE: ANODE
STYLE 9:
PIN 1. ANODE #1
2. ANODE #2
CASE: CATHODE
STYLE 5:
PIN 1. CATHODE
2. EXTERNAL TRIP/DELAY
CASE: ANODE
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
© Semiconductor Components Industries, LLC, 2000
January, 2000 − Rev. 07Z
1
Case Outline Number:
1
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