Complementary Plastic
Power Transistors
NPN/PNP Silicon DPAK For Surface
Mount Applications
MJD200 (NPN),
MJD210 (PNP)
www.onsemi.com
Designed for low voltage, low−power, high−gain audio
amplifier applications.
SILICON
POWER TRANSISTORS
5 AMPERES
25 VOLTS, 12.5 WATTS
Features
• High DC Current Gain
• Lead Formed for Surface Mount Applications in Plastic Sleeves
•
•
•
•
•
•
(No Suffix)
Low Collector−Emitter Saturation Voltage
High Current−Gain − Bandwidth Product
Annular Construction for Low Leakage
Epoxy Meets UL 94 V−0 @ 0.125 in
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
PNP
NPN
COLLECTOR
2,4
COLLECTOR
2,4
1
BASE
1
BASE
3
EMITTER
MAXIMUM RATINGS
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
Collector Current − Continuous
Collector Current − Peak
Symbol
Max
Unit
VCB
40
Vdc
VCEO
25
Vdc
VEB
8.0
Vdc
IC
5.0
Adc
ICM
10
Adc
Base Current
IB
1.0
Adc
Total Power Dissipation
@ TC = 25°C
Derate above 25°C
PD
12.5
0.1
W
W/°C
Total Power Dissipation (Note 1)
@ TA = 25°C
Derate above 25°C
PD
1.4
0.011
W
W/°C
Operating and Storage Junction
Temperature Range
TJ, Tstg
−65 to +150
°C
ESD − Human Body Model
HBM
3B
V
ESD − Machine Model
MM
C
V
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
3
EMITTER
4
1 2
3
DPAK
CASE 369C
STYLE 1
MARKING DIAGRAM
AYWW
J2x0G
A
Y
WW
G
= Assembly Location
= Year
= Work Week
x = 1 or 0
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
THERMAL CHARACTERISTICS
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
Characteristic
RqJC
10
°C/W
Thermal Resistance, Junction−to−Ambient (Note 2)
RqJA
89.3
°C/W
2. These ratings are applicable when surface mounted on the minimum pad sizes recommended.
© Semiconductor Components Industries, LLC, 2013
October, 2019 − Rev. 14
1
Publication Order Number:
MJD200/D
MJD200 (NPN), MJD210 (PNP)
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
25
−
−
−
100
100
−
100
70
45
10
−
180
−
−
−
−
0.3
0.75
1.8
−
2.5
−
1.6
65
−
Unit
OFF CHARACTERISTICS
VCEO(sus)
Collector−Emitter Sustaining Voltage (Note 3)
(IC = 10 mAdc, IB = 0)
Collector Cutoff Current
(VCB = 40 Vdc, IE = 0)
(VCB = 40 Vdc, IE = 0, TJ = 125°C)
ICBO
Emitter Cutoff Current
(VBE = 8 Vdc, IC = 0)
IEBO
Vdc
nAdc
mAdc
nAdc
ON CHARACTERISTICS
hFE
C Current Gain (Note 3),
(IC = 500 mAdc, VCE = 1 Vdc)
(IC = 2 Adc, VCE = 1 Vdc)
(IC = 5 Adc, VCE = 2 Vdc)
−
Collector−Emitter Saturation Voltage (Note 3)
(IC = 500 mAdc, IB = 50 mAdc)
(IC = 2 Adc, IB = 200 mAdc)
(IC = 5 Adc, IB = 1 Adc)
VCE(sat)
Base−Emitter Saturation Voltage (Note 3)
(IC = 5 Adc, IB = 1 Adc)
VBE(sat)
Base−Emitter On Voltage (Note 3)
(IC = 2 Adc, VCE = 1 Vdc)
VBE(on)
Vdc
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product (Note 4)
(IC = 100 mAdc, VCE = 10 Vdc, ftest = 10 MHz)
fT
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
MJD200
MJD210, NJVMJD210T4G
MHz
Cob
pF
−
−
80
120
PD, POWER DISSIPATION (WATTS)
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle [ 2%.
4. fT = ⎪hfe⎪• ftest.
TA
2.5
TC
25
2
20
VCC
+30 V
25 ms
RC
+11 V
1.5
0
15
SCOPE
RB
-9 V
1
10
0.5
5
0
0
TA (SURFACE MOUNT)
tr, tf ≤ 10 ns
DUTY CYCLE = 1%
TC
D1
51
-4 V
RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
25
50
75
100
125
150
D1 MUST BE FAST RECOVERY TYPE, e.g.:
FOR PNP TEST CIRCUIT,
1N5825 USED ABOVE IB ≈ 100 mA
REVERSE ALL POLARITIES
MSD6100 USED BELOW IB ≈ 100 mA
T, TEMPERATURE (°C)
Figure 1. Power Derating
Figure 2. Switching Time Test Circuit
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2
MJD200 (NPN), MJD210 (PNP)
1K
10K
td
500
300
200
5K
3K
2K
1K
50
30
20
tr
10
5
3
2
t, TIME (ns)
t, TIME (ns)
100
ts
VCC = 30 V
IC/IB = 10
TJ = 25°C
500
300
200
100
50
30
20
MJD200
MJD210
1
1
2 3
0.01 0.02 0.03 0.05 0.1
0.2 0.3 0.5
IC, COLLECTOR CURRENT (A)
VCC = 30 V
IC/IB = 10
IB1 = IB2
TJ = 25°C
5
10
MJD200
MJD210
tf
10
0.01 0.02 0.03 0.05 0.1
0.2 0.3 0.5
1
2
IC, COLLECTOR CURRENT (A)
Figure 3. Turn−On Time
Figure 4. Turn−Off Time
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3
3
5
10
MJD200 (NPN), MJD210 (PNP)
NPN
MJD200
400
PNP
MJD210
400
TJ = 150°C
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
25°C
200
-55°C
100
80
60
40
VCE = 1 V
VCE = 2 V
20
0.05 0.07 0.1
0.5 0.7 1
2
0.2 0.3
IC, COLLECTOR CURRENT (A)
3
TJ = 150°C
200
25°C
100
80
-55°C
60
40
VCE = 1 V
VCE = 2 V
20
0.05 0.07 0.1
5
0.2 0.3
0.5 0.7 1
2
IC, COLLECTOR CURRENT (A)
3
5
Figure 5. DC Current Gain
2
2
TJ = 25°C
TJ = 25°C
1.6
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
1.6
1.2
0.8
VBE(sat) @ IC/IB = 10
VBE @ VCE = 1 V
0.4
1.2
0.8
VBE(sat) @ IC/IB = 10
VBE @ VCE = 1 V
0.4
VCE(sat) @ IC/IB = 10
0
0.05 0.07 0.1
0.2 0.3
0.5 0.7 1
IC, COLLECTOR CURRENT (A)
2
3
VCE(sat) @ IC/IB = 10
0
0.05 0.07 0.1
0.2 0.3
0.5 0.7 1
IC, COLLECTOR CURRENT (A)
5
2
3
5
3
5
Figure 6. “On” Voltage
+2
+2.5
θV, TEMPERATURE COEFFICIENTS (mV/°C)
θV, TEMPERATURE COEFFICIENTS (mV/°C)
+2.5
*APPLIES FOR IC/IB ≤ hFE/3
+1.5
+1
+0.5
25°C to 150°C
qVC for VCE(sat)
0
-0.5
-55°C to 25°C
-1
25°C to 150°C
-1.5
qVB for VBE
-2
-2.5
0.05 0.07 0.1
-55°C to 25°C
0.2
0.3
0.5 0.7
1
2
3
+2
*APPLIES FOR IC/IB ≤ hFE/3
+1.5
25°C to 150°C
+1
+0.5
*qVC for VCE(sat)
0
-55°C to 25°C
-0.5
25°C to 150°C
-1
-1.5
qVB for VBE
-2
-2.5
0.05 0.07 0.1
5
-55°C to 25°C
IC, COLLECTOR CURRENT (A)
0.2
0.3
0.5 0.7
1
IC, COLLECTOR CURRENT (A)
Figure 7. Temperature Coefficients
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4
2
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
MJD200 (NPN), MJD210 (PNP)
1
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
RqJC(t) = r(t) qJC
RqJC = 10°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
0.05
0.1
0.07
0.05
0.02
0.01
0.03
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0 (SINGLE PULSE)
0.02
0.01
0.02
0.05
0.1
0.2
0.5
1
2
t, TIME (ms)
5
10
20
50
100
200
Figure 8. Thermal Response
5
3
2
1
0.1
0.01
0.3
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 9 is based on TJ(pk) = 150°C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
≤ 150°C. TJ(pk) may be calculated from the data in Figure 8.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
5ms
TJ = 150°C
100ms
1ms
500ms
dc
BONDING WIRE LIMITED
THERMALLY LIMITED @ TC = 25°C
(SINGLE PULSE)
SECOND BREAKDOWN LIMITED
CURVES APPLY BELOW
RATED VCEO
1
2
3
5
7 10
20
VCE, COLLECTOR−EMITTER VOLTAGE (V)
30
Figure 9. Active Region Safe Operating Area
200
TJ = 25°C
C, CAPACITANCE (pF)
IC, COLLECTOR CURRENT (AMP)
10
Cib
100
70
50
Cob
MJD200 (NPN)
MJD210 (PNP)
30
20
0.4
0.6
1
2
4
6
10
VR, REVERSE VOLTAGE (V)
Figure 10. Capacitance
www.onsemi.com
5
20
40
MJD200 (NPN), MJD210 (PNP)
ORDERING INFORMATION
Package Type
Shipping†
MJD200G
DPAK
(Pb−Free)
75 Units / Rail
MJD200RLG
DPAK
(Pb−Free)
1,800 / Tape & Reel
MJD200T4G
DPAK
(Pb−Free)
2,500 / Tape & Reel
MJD210G
DPAK
(Pb−Free)
75 Units / Rail
MJD210RLG
DPAK
(Pb−Free)
1,800 / Tape & Reel
MJD210T4G
DPAK
(Pb−Free)
2,500 / Tape & Reel
NJVMJD210T4G*
DPAK
(Pb−Free)
2,500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
4
1 2
DATE 21 JUL 2015
3
SCALE 1:1
A
E
b3
C
A
B
c2
4
L3
Z
D
1
L4
2
3
NOTE 7
b2
e
c
SIDE VIEW
b
0.005 (0.13)
TOP VIEW
H
DETAIL A
M
BOTTOM VIEW
C
Z
H
L2
GAUGE
PLANE
C
L
L1
DETAIL A
Z
SEATING
PLANE
BOTTOM VIEW
A1
ALTERNATE
CONSTRUCTIONS
ROTATED 905 CW
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 8:
PIN 1. N/C
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
STYLE 9:
STYLE 10:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
3. RESISTOR ADJUST
3. CATHODE
4. CATHODE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.102
5.80
0.228
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.028 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.114 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.72
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.90 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
6.17
0.243
SCALE 3:1
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
XXXXXX
A
L
Y
WW
G
3.00
0.118
1.60
0.063
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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