MJD243(NPN),
MJD253(PNP)
Complementary Silicon
Plastic Power Transistors
DPAK−3 for Surface Mount Applications
www.onsemi.com
Designed for low voltage, low−power, high−gain audio amplifier
applications.
4.0 A, 100 V, 12.5 W
POWER TRANSISTOR
Features
• High DC Current Gain
• Lead Formed for Surface Mount Applications in Plastic Sleeves
•
•
•
•
•
•
•
(No Suffix)
Straight Lead Version in Plastic Sleeves (“−1” Suffix)
Low Collector−Emitter Saturation Voltage
High Current−Gain − Bandwidth Product
Annular Construction for Low Leakage
Epoxy Meets UL 94 V−0 @ 0.125 in
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
Collector Current − Continuous
Value
Unit
VCB
100
Vdc
VCEO
100
Vdc
VEB
7.0
Vdc
IC
4.0
Adc
8.0
Adc
Base Current
IB
1.0
Adc
Total Device Dissipation
@ TC = 25°C
Derate above 25°C
PD
12.5
0.1
W
W/°C
Total Device Dissipation
@ TA = 25°C (Note 2)
Derate above 25°C
PD
1.4
0.011
W
W/°C
TJ, Tstg
−65 to +150
°C
ESD − Human Body Model
HBM
3B
V
ESD − Machine Model
MM
C
V
Operating and Storage Junction
Temperature Range
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted on minimum pad sizes recommended.
© Semiconductor Components Industries, LLC, 2013
September, 2016 − Rev. 17
COLLECTOR
2, 4
1
BASE
1
COLLECTOR
2, 4
1
BASE
3
EMITTER
3
EMITTER
4
4
1
Symbol
ICM
Collector Current − Peak
COMPLEMENTARY
2
1 2
3
IPAK
CASE 369D
STYLE 1
3
DPAK−3
CASE 369C
STYLE 1
MARKING DIAGRAMS
AYWW
J253G
IPAK
A
Y
WW
x
G
AYWW
J2x3G
DPAK
= Assembly Location
= Year
= Work Week
= 4 or 5
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
MJD243/D
MJD243 (NPN), MJD253 (PNP)
THERMAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Characteristic
Symbol
Value
RqJC
RqJA
10
89.3
Min
Max
100
−
−
−
100
100
−
100
40
15
180
−
−
−
0.3
0.6
−
1.8
−
1.5
40
−
−
50
Unit
°C/W
Thermal Resistance
Junction−to−Case
Junction−to−Ambient (Note 2)
2. When surface mounted on minimum pad sizes recommended.
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Unit
OFF CHARACTERISTICS
VCEO(sus)
Collector−Emitter Sustaining Voltage (Note 3)
(IC = 10 mAdc, IB = 0)
Collector Cutoff Current
(VCB = 100 Vdc, IE = 0)
(VCB = 100 Vdc, IE = 0, TJ = 125°C)
ICBO
Emitter Cutoff Current
(VBE = 7.0 Vdc, IC = 0)
IEBO
DC Current Gain (Note 3)
(IC = 200 mAdc, VCE = 1.0 Vdc)
(IC = 1.0 Adc, VCE = 1.0 Vdc)
hFE
Collector−Emitter Saturation Voltage (Note 3)
(IC = 500 mAdc, IB = 50 mAdc)
(IC = 1.0 Adc, IB = 100 mAdc)
VCE(sat)
Base−Emitter Saturation Voltage (Note 3)
(IC = 2.0 Adc, IB = 200 mAdc)
VBE(sat)
Base−Emitter On Voltage (Note 3)
(IC = 500 mAdc, VCE = 1.0 Vdc)
VBE(on)
Vdc
nAdc
mAdc
nAdc
−
Vdc
Vdc
Vdc
DYNAMIC CHARACTERISTICS
fT
Current−Gain − Bandwidth Product (Note 4)
(IC = 100 mAdc, VCE = 10 Vdc, ftest = 10 MHz)
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
MHz
Cob
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle [ 2%.
4. fT = ⎪hFE⎪• ftest.
www.onsemi.com
2
MJD243 (NPN), MJD253 (PNP)
10
IC, COLLECTOR CURRENT (AMPS)
PD, POWER DISSIPATION (WATTS)
TA TC
2.5 25
2 20
1.5 15
TA (SURFACE MOUNT)
1 10
TC
0.5
100ms
1ms
2
1
5ms
0.5
0.2
0.02
0
0.01
25
T, TEMPERATURE (°C)
2
5
10
20
50
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 1. Power Derating
Figure 2. Active Region Maximum
Safe Operating Area
50
75
100
125
150
0.3
0.2
0.1
0.07
0.05
0.03
0.02
0.01
0.02
1
100
The data of Figure 2 is based on TJ(pk) = 150°C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
≤ 150°C. TJ(pk) may be calculated from the data in Figure 3.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
1
0.7
0.5
dc
BONDING WIRE LIMITED
THERMALLY LIMITED @ TC = 25°C
(SINGLE PULSE)
SECOND BREAKDOWN LIMITED
CURVES APPLY BELOW
RATED VCEO
0.1
0.05
5
0
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
500ms
5
D = 0.5
0.2
0.1
RqJC(t) = r(t) qJC
RqJC = 10°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
0.05
0.02
0.01
0 (SINGLE PULSE)
0.05
0.1
0.2
0.5
1
2
t, TIME (ms)
5
Figure 3. Thermal Response
www.onsemi.com
3
10
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
20
50
100
200
MJD243 (NPN), MJD253 (PNP)
NPN
MJD243
PNP
MJD253
200
500
VCE = 1.0 V
VCE = 2.0 V
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
300
200
TJ = 150°C
25°C
100
70
50
-55°C
30
20
10
7.0
5.0
0.04 0.06
0.1
0.2
0.4 0.6
1.0
IC, COLLECTOR CURRENT (AMP)
2.0
25°C
-55°C
30
20
10
7.0
5.0
3.0
2.0
0.04 0.06
4.0
VCE = 1.0 V
VCE = 2.0 V
TJ = 150°C
100
70
50
0.1
0.2
0.4 0.6
1.0
IC, COLLECTOR CURRENT (AMP)
2.0
4.0
Figure 4. DC Current Gain
1.4
1.4
TJ = 25°C
1.2
1.2
1.0
1.0
0.8
0.6
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
TJ = 25°C
VBE(sat) @ IC/IB = 10
VBE @ VCE = 1.0 V
IC/IB = 10
0.4
VBE(sat) @ IC/IB = 10
0.8
VBE @ VCE = 1.0 V
0.6
IC/IB = 10
0.4
5.0
5.0
0.2
0.2
VCE(sat)
0
0.04 0.06
0.1
VCE(sat)
0.2
0.4 0.6
1.0
2.0
0
0.04 0.06
4.0
0.1
IC, COLLECTOR CURRENT (AMP)
0.2
0.4
0.6
1.0
2.0
IC, COLLECTOR CURRENT (AMP)
4.0
-1.0
θV, TEMPERATURE COEFFICIENTS (mV/ °C)
θV, TEMPERATURE COEFFICIENTS (mV/ °C)
Figure 5. “On” Voltages
25°C to 150°C
-1.5
-2.0
qVB FOR VBE
-2.5
0.04 0.06
0.1
-55°C to 25°C
0.2
0.4 0.6
1.0
IC, COLLECTOR CURRENT (AMP)
2.0
+2.5
+2.0
*APPLIES FOR IC/IB ≤ hFE/3
+1.5
+1.0
+0.5
25°C to 150°C
*qVC FOR VCE(sat)
0
-55°C to 25°C
-0.5
-1.0
-1.5
25°C to 150°C
qVB FOR VBE
-2.5
0.04 0.06
4.0
-55°C to 25°C
-2.0
0.1
0.2
0.4
0.6
1.0
IC, COLLECTOR CURRENT (AMP)
Figure 6. Temperature Coefficients
www.onsemi.com
4
2.0
4.0
MJD243 (NPN), MJD253 (PNP)
VCC
+30 V
1K
RC
25 ms
+11 V
SCOPE
RB
t, TIME (ns)
D1
51
tr, tf ≤ 10 ns
DUTY CYCLE = 1.0%
tr
100
0
-9.0 V
500
300
200
-4 V
50
30
20
td
10
5
3
2
RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1 MUST BE FAST RECOVERY TYPE, e.g.:
1N5825 USED ABOVE IB ≈ 100 mA
MSD6100 USED BELOW IB ≈ 100 mA
FOR PNP TEST CIRCUIT, REVERSE ALL POLARITIES
1
0.01
NPN MJD243
PNP MJD253
0.02 0.03 0.05 0.1
1
2
0.2 0.3 0.5
IC, COLLECTOR CURRENT (AMPS)
10K
VCC = 30 V
IC/IB = 10
IB1 = IB2
TJ = 25°C
10
TJ = 25°C
100
C, CAPACITANCE (pF)
ts
1K
500
300
200
100
Cib
70
50
30
Cob
20
tf
MJD243 (NPN)
MJD253 (PNP)
NPN MJD243
PNP MJD253
0.2 0.3 0.5
1
2
0.02 0.03 0.05 0.1
IC, COLLECTOR CURRENT (AMPS)
3
5
10
1.0
10
2.0
3.0
5.0 7.0 10
20 30
VR, REVERSE VOLTAGE (VOLTS)
Figure 9. Turn−Off Time
Figure 10. Capacitance
200
TJ = 25°C
100
C, CAPACITANCE (pF)
t, TIME (ns)
5
200
5K
3K
2K
10
0.01
3
Figure 8. Turn−On Time
Figure 7. Switching Time Test Circuit
50
30
20
VCC = 30 V
IC/IB = 10
TJ = 25°C
Cib
70
50
30
20
10
Cob
1
2
3
5
7 10
20 30
VR, REVERSE VOLTAGE (VOLTS)
Figure 11. Capacitance
www.onsemi.com
5
50
70 100
50 70 100
MJD243 (NPN), MJD253 (PNP)
ORDERING INFORMATION
Package Type
Package
Shipping†
MJD243G
DPAK−3
(Pb−Free)
369C
75 Units / Rail
MJD243T4G
DPAK−3
(Pb−Free)
369C
2,500 / Tape & Reel
NJVMJD243T4G*
DPAK−3
(Pb−Free)
369C
2,500 / Tape & Reel
MJD253−1G
IPAK
(Pb−Free)
369D
75 Units / Rail
MJD253T4G
DPAK−3
(Pb−Free)
369C
2,500 / Tape & Reel
NJVMJD253T4G*
DPAK−3
(Pb−Free)
369C
2,500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
IPAK
CASE 369D−01
ISSUE C
SCALE 1:1
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
R
4
Z
A
S
1
2
3
−T−
SEATING
PLANE
K
J
F
D
G
DATE 15 DEC 2010
H
3 PL
0.13 (0.005)
M
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
T
MARKING
DIAGRAMS
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
Discrete
YWW
xxxxxxxx
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
xxxxxxxxx
A
lL
Y
WW
DOCUMENT NUMBER:
DESCRIPTION:
98AON10528D
Integrated
Circuits
xxxxx
ALYWW
x
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
IPAK (DPAK INSERTION MOUNT)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
4
1 2
DATE 21 JUL 2015
3
SCALE 1:1
A
E
b3
C
A
B
c2
4
L3
Z
D
1
L4
2
3
NOTE 7
b2
e
c
SIDE VIEW
b
0.005 (0.13)
TOP VIEW
H
DETAIL A
M
BOTTOM VIEW
C
Z
H
L2
GAUGE
PLANE
C
L
L1
DETAIL A
Z
SEATING
PLANE
BOTTOM VIEW
A1
ALTERNATE
CONSTRUCTIONS
ROTATED 905 CW
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 8:
PIN 1. N/C
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
STYLE 9:
STYLE 10:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
3. RESISTOR ADJUST
3. CATHODE
4. CATHODE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.102
5.80
0.228
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.028 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.114 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.72
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.90 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
6.17
0.243
SCALE 3:1
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
XXXXXX
A
L
Y
WW
G
3.00
0.118
1.60
0.063
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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