MJD41CT4G

MJD41C(NPN), MJD42C(PNP) Complementary Power Transistors DPAK for Surface Mount Applications www.onsemi.com Designed for general purpose amplifier and low speed switching applications. Features • Lead Formed for Surface Mount Applications in Plastic Sleeves • • • • • (No Suffix) Straight Lead Version in Plastic Sleeves (“1” Suffix) Electrically Similar to Popular TIP41 and TIP42 Series Epoxy Meets UL 94 V−0 @ 0.125 in NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant SILICON POWER TRANSISTORS 6 AMPERES 100 VOLTS, 20 WATTS COMPLEMENTARY COLLECTOR 2, 4 1 BASE 1 BASE MAXIMUM RATINGS Rating 3 EMITTER Symbol Max Unit VCEO 100 Vdc Collector−Base Voltage VCB 100 Vdc Emitter−Base Voltage VEB 5 Vdc IC 6 Adc ICM 10 Adc 1 2 Base Current IB 2 Adc Total Power Dissipation @ TC = 25°C Derate above 25°C PD DPAK CASE 369C STYLE 1 Total Power Dissipation (Note 1) @ TA = 25°C Derate above 25°C PD Operating and Storage Junction Temperature Range Collector−Emitter Voltage Collector Current − Continuous Collector Current − Peak 20 0.16 W W/°C W 1.75 0.014 W/°C TJ, Tstg −65 to +150 °C ESD − Human Body Model HBM 3B V ESD − Machine Model MM C V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. These ratings are applicable when surface mounted on the minimum pad sizes recommended. COLLECTOR 2, 4 3 EMITTER 4 4 1 3 2 3 IPAK CASE 369D STYLE 1 MARKING DIAGRAMS AYWW J4xCG AYWW J4xCG DPAK A Y WW J4xC G IPAK = = = = Assembly Location Year Work Week Device Code x = 1 or 2 = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. 13 1 Publication Order Number: MJD41C/D MJD41C (NPN), MJD42C (PNP) THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case RqJC 6.25 °C/W Thermal Resistance, Junction−to−Ambient (Note 2) RqJA 71.4 °C/W Min Max Unit 100 − − 50 − 10 − 0.5 30 15 − 75 − 1.5 − 2 3 − 20 − 2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) Characteristic Symbol OFF CHARACTERISTICS VCEO(sus) Collector−Emitter Sustaining Voltage (Note 3) (IC = 30 mAdc, IB = 0) Collector Cutoff Current (VCE = 60 Vdc, IB = 0) ICEO Collector Cutoff Current (VCE = 100 Vdc, VEB = 0) ICES Emitter Cutoff Current (VBE = 5 Vdc, IC = 0) IEBO Vdc mAdc mAdc mAdc ON CHARACTERISTICS (Note 3) hFE DC Current Gain (IC = 0.3 Adc, VCE = 4 Vdc) (IC = 3 Adc, VCE = 4 Vdc) Collector−Emitter Saturation Voltage (IC = 6 Adc, IB = 600 mAdc) VCE(sat) Base−Emitter On Voltage (IC = 6 Adc, VCE = 4 Vdc) VBE(on) − Vdc Vdc DYNAMIC CHARACTERISTICS Current Gain − Bandwidth Product (Note 4) (IC = 500 mAdc, VCE = 10 Vdc, ftest = 1 MHz) fT Small−Signal Current Gain (IC = 0.5 Adc, VCE = 10 Vdc, f = 1 kHz) hfe MHz − Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 4. fT = ⎪hfe⎪• ftest. www.onsemi.com 2 MJD41C (NPN), MJD42C (PNP) PD, POWER DISSIPATION (WATTS) TYPICAL CHARACTERISTICS TA 2.5 TC 25 2 20 VCC +30 V +11 V 1.5 0 15 TC TA SURFACE MOUNT 10 0.5 5 0 0 25 50 tr, tf ≤ 10 ns DUTY CYCLE = 1% 75 100 125 150 Figure 2. Switching Time Test Circuit 2 500 300 200 VCE = 2 V TJ = 150°C 100 70 50 0.7 0.5 t, TIME (s) μ 25°C 30 20 0.3 0.2 tr 0.1 0.07 -55°C 10 7 5 0.06 TJ = 25°C VCC = 30 V IC/IB = 10 1 td @ VBE(off) ≈ 5 V 0.05 0.1 0.2 0.3 0.4 0.6 1 2 4 0.03 0.02 0.06 0.1 6 0.2 0.4 0.6 1 2 IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP) Figure 3. DC Current Gain Figure 4. Turn−On Time 1.4 4 6 1.4 IC/IB = 10 VCE = 4 V 1.2 VBE(sat), BASE−EMITTER SATURATION VOLTAGE (V) hFE, DC CURRENT GAIN -4 V RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS D1 MUST BE FAST RECOVERY TYPE, e.g.: MSB5300 USED ABOVE IB ≈ 100 mA MSD6100 USED BELOW IB ≈ 100 mA REVERSE ALL POLARITIES FOR PNP. Figure 1. Power Derating 1.0 0.8 −55°C −40°C 0.6 D1 51 -9 V 1 SCOPE RB T, TEMPERATURE (°C) VBE(ON), BASE−EMITTER VOLTAGE (V) RC 25 ms 25°C 0.4 80°C 0.2 TA = 150°C 0 1.2 1.0 −55°C 0.8 −40°C 0.6 25°C 80°C 0.4 TA = 150°C 0.2 0 0.01 0.1 1 10 0.01 0.1 1 IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A) Figure 5. Base Emitter Voltage vs. Collector Current Figure 6. Base Emitter Saturation Voltage vs. Collector Current www.onsemi.com 3 10 MJD41C (NPN), MJD42C (PNP) TYPICAL CHARACTERISTICS 5 1.0 VCE(sat), BASE−EMITTER SATURATION VOLTAGE (V) 0.9 TA = 150°C IC/IB = 10 0.8 ts 25°C 1 0.7 0.5 t, TIME (s) μ 0.7 0.6 0.5 0.4 0.3 0.2 0.3 tf 0.2 −40°C and −55°C 0.1 0 0.01 0.1 1 10 0.1 0.07 0.05 0.06 0.1 0.2 0.4 0.6 1 2 IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (A) 6 300 2 TJ = 25°C TJ = 25°C 200 1.6 IC = 1 A 2.5 A 5A 1.2 0.8 Cib 100 70 Cob 50 0.4 0 10 20 30 50 100 200 300 IB, BASE CURRENT (mA) 500 1000 30 0.5 1 1 0.7 0.5 3 10 2 5 20 VR, REVERSE VOLTAGE (VOLTS) 30 50 Figure 10. Capacitance Figure 9. Collector Saturation Region D = 0.5 0.3 0.2 0.2 0.05 0.02 0.03 0.02 0.01 0.01 P(pk) RqJC(t) = r(t) RqJC RqJC = 6.25°C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) qJC(t) 0.1 0.1 0.07 0.05 4 Figure 8. Turn−Off Time C, CAPACITANCE (pF) VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 7. Collector Emitter Saturation Voltage vs. Collector Current r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) TJ = 25°C VCC = 30 V IC/IB = 10 IB1 = IB2 3 2 80°C 0.01 t1 t2 DUTY CYCLE, D = t1/t2 SINGLE PULSE 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 t, TIME (ms) 10 Figure 11. Thermal Response www.onsemi.com 4 20 30 50 100 200 300 500 1000 MJD41C (NPN), MJD42C (PNP) IC, COLLECTOR CURRENT (AMP) 10 500ms 5 3 2 1ms dc 5ms 1 0.5 0.3 WIRE BOND LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT CURVES APPLY BELOW RATED VCEO 0.1 0.05 0.03 0.01 There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 12 is based on TJ(pk) = 150_C; TC is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) v 150_C. TJ(pk) may be calculated from the data in Figure 11. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 100ms TC = 25°C SINGLE PULSE TJ = 150°C 1 MJD41C, 42C 2 3 5 7 10 20 30 50 70 100 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 12. Maximum Forward Bias Safe Operating Area ORDERING INFORMATION Package Type Package Shipping† MJD41CRLG DPAK (Pb−Free) 369C 1,800 / Tape & Reel MJD41CT4G DPAK (Pb−Free) 369C 2,500 / Tape & Reel NJVMJD41CT4G* DPAK (Pb−Free) 369C 2,500 / Tape & Reel MJD42CG DPAK (Pb−Free) 369C 75 Units / Rail MJD42C1G IPAK (Pb−Free) 369D 75 Units / Rail MJD42CRLG DPAK (Pb−Free) 369C 1,800 / Tape & Reel NJVMJD42CRLG* DPAK (Pb−Free) 369C 1,800 / Tape & Reel MJD42CT4G DPAK (Pb−Free) 369C 2,500 / Tape & Reel NJVMJD42CT4G* DPAK (Pb−Free) 369C 2,500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable www.onsemi.com 5 MJD41C (NPN), MJD42C (PNP) PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C A A E b3 c2 B 4 L3 Z D 1 2 H DETAIL A 3 L4 b2 e c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR SOLDERING FOOTPRINT* 6.20 0.244 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− MJD41C (NPN), MJD42C (PNP) PACKAGE DIMENSIONS IPAK CASE 369D ISSUE C C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F H D G DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− 3 PL 0.13 (0.005) M STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. 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