MJE340G
Plastic Medium-Power
NPN Silicon Transistor
This device is useful for high−voltage general purpose applications.
Features
•
•
•
•
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Suitable for Transformerless, Line−Operated Equipment
High Power Dissipation Rating for High Reliability
These Devices are Pb−Free and are RoHS Compliant*
Complementary to MJE350
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCEO
300
Vdc
VEB
3.0
Vdc
Collector Current − Continuous
IC
500
mAdc
Total Power Dissipation
@ TC = 25_C
Derate above 25_C
PD
20
0.16
W
mW/_C
–65 to +150
_C
Collector−Emitter Voltage
Emitter−Base Voltage
Operating and Storage Junction
Temperature Range
TJ, Tstg
0.5 AMPERE
POWER TRANSISTOR
NPN SILICON
300 VOLTS, 20 WATTS
SCHEMATIC
COLLECTOR
2, 4
3
BASE
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1
EMITTER
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
qJC
6.25
_C/W
TO−225
CASE 77−09
STYLE 1
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
300
−
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
(IC = 1.0 mAdc, IB = 0)
VCEO(sus)
Collector Cutoff Current
(VCB = 300 Vdc, IE = 0)
ICBO
Emitter Cutoff Current
(VEB = 3.0 Vdc, IC = 0)
IEBO
−
100
−
100
30
240
1 2
3
Vdc
MARKING DIAGRAM
mAdc
YWW
JE340G
mAdc
ON CHARACTERISTICS
DC Current Gain
(IC = 50 mAdc, VCE = 10 Vdc)
hFE
−
Y
WW
JE340
G
Product parametric performance is indicated in the Electrical Characteristics for
the listed test conditions, unless otherwise noted. Product performance may not
be indicated by the Electrical Characteristics if operated under different
conditions.
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
February, 2017 − Rev. 14
1
Device
Package
Shipping
MJE340G
TO−225
(Pb−Free)
500 Units/Box
Publication Order Number:
MJE340/D
MJE340G
1.0
28
0.8
24
V, VOLTAGE (VOLTS)
PD, POWER DISSIPATION (WATTS)
32
20
16
12
0.4
VCE(sat) @ IC/IB = 10
0.2
4.0
0
IC/IB = 5.0
0
20
40
80
120
60
100
TC, CASE TEMPERATURE (°C)
140
0
10
160
ACTIVE−REGION SAFE OPERATING AREA
10 ms
0.3
500 ms
TJ = 150°C
1.0ms
dc
0.2
0.1
0.05
SECOND BREAKDOWN LIMIT
BONDING WIRE LIMIT
THERMAL LIMIT TC = 25°C
SINGLE PULSE
0.03
0.02
0.01
10
20
30
50
70
100
200
30
50
100
200
IC, COLLECTOR CURRENT (mA)
300
500
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.The data of Figure 3 is
based on TJ(pk) = 150_C; TC is variable depending on
conditions. Second breakdown pulse limits are valid for
duty cycles to 10% provided TJ(pk) ≤ 150_C. At high case
temperatures, thermal limitations will reduce the power that
can be handled to values less than the limitations imposed by
second breakdown.
1.0
0.5
20
Figure 2. “On” Voltages
Figure 1. Power Temperature Derating
IC, COLLECTOR CURRENT (AMP)
VBE(sat) @ IC/IB = 10
VBE @ VCE = 10 V
0.6
MJE340
8.0
TJ = 25°C
300
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 3. MJE340
www.onsemi.com
2
10
7.0
5.0
2.0
TJ = 25°C
150°C
1.6
VCE = 1.0 Vdc
3.0
VOLTAGE (VOLTS)
hFE, DC CURRENT GAIN, NORMALIZED
MJE340G
2.0
-55°C
1.0
0.7
0.5
0.3
TJ = 25°C
1.2
0.8
VBE(sat) @ IC/IB = 10
VBE(on) @ VCE = 1.0 V
0.4
0.2
VCE(sat) @ IC/IB = 10
0.1
0.01
0.02 0.03 0.05 0.1
0.2 0.3 0.5
1.0
IC, COLLECTOR CURRENT (AMP)
0
0.005 0.01 0.02 0.03 0.05 0.1
0.2 0.3 0.5
1.0
IC, COLLECTOR CURRENT (AMP)
2.0 3.0 4.0
r(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE (NORMALIZED)
Figure 4. DC Current Gain
1.0
0.7
0.5
0.3
Figure 5. “On” Voltage
D = 0.5
0.2
0.2
0.05
0.02
0.03
P(pk)
qJC(t) = r(t) qJC
qJC = 3.12°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
0.1
0.1
0.07
0.05
2.0 3.0 4.0
0.01
t1
t2
DUTY CYCLE, D = t1/t2
0.02
SINGLE PULSE
0.01
0.01
0.02 0.03
0.05
0.1
0.2 0.3
1.0
2.0 3.0 5.0
10
t, TIME OR PULSE WIDTH (ms)
0.5
20
50
100
500
200
1000
Figure 6. Thermal Response
300
hFE , DC CURRENT GAIN
200
VCE = 10 V
VCE = 2.0 V
TJ = 150°C
100
70
+100°C
50
+25°C
30
20
10
-55°C
1.0
2.0
3.0
5.0
7.0
10
20
30
50
IC, COLLECTOR CURRENT (mAdc)
Figure 7. DC Current Gain
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3
70
100
200
300
500
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−225
CASE 77−09
ISSUE AD
4
DATE 25 MAR 2015
3 2
1
1 2
3
FRONT VIEW
BACK VIEW
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. NUMBER AND SHAPE OF LUGS OPTIONAL.
E
A1
Q
A
PIN 4
BACKSIDE TAB
DIM
A
A1
b
b2
c
D
E
e
L
L1
P
Q
D
P
1
2
3
L1
MILLIMETERS
MIN
MAX
2.40
3.00
1.00
1.50
0.60
0.90
0.51
0.88
0.39
0.63
10.60
11.10
7.40
7.80
2.04
2.54
14.50
16.63
1.27
2.54
2.90
3.30
3.80
4.20
GENERIC
MARKING DIAGRAM*
L
YWW
XX
XXXXXG
2X
b2
2X
e
b
FRONT VIEW
Y
= Year
WW
= Work Week
XXXXX = Device Code
G
= Pb−Free Package
c
SIDE VIEW
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN 1. EMITTER
2., 4. COLLECTOR
3. BASE
STYLE 2:
PIN 1. CATHODE
2., 4. ANODE
3. GATE
STYLE 3:
PIN 1. BASE
2., 4. COLLECTOR
3. EMITTER
STYLE 4:
PIN 1. ANODE 1
2., 4. ANODE 2
3. GATE
STYLE 5:
PIN 1. MT 1
2., 4. MT 2
3. GATE
STYLE 6:
PIN 1. CATHODE
2., 4. GATE
3. ANODE
STYLE 7:
PIN 1. MT 1
2., 4. GATE
3. MT 2
STYLE 8:
PIN 1. SOURCE
2., 4. GATE
3. DRAIN
STYLE 9:
PIN 1. GATE
2., 4. DRAIN
3. SOURCE
STYLE 10:
PIN 1. SOURCE
2., 4. DRAIN
3. GATE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42049B
TO−225
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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