MJF15031

MJF15030 (NPN), MJF15031 (PNP) Complementary Power Transistors For Isolated Package Applications Designed for general−purpose amplifier and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis. http://onsemi.com COMPLEMENTARY SILICON POWER TRANSISTORS 8 AMPERES 150 VOLTS, 36 WATTS Features • • • • • Electrically Similar to the Popular MJE15030 and MJE15031 No Isolating Washers Required, Reduced System Cost High Current Gain−Bandwidth Product UL Recognized, File #E69369, to 3500 VRMS Isolation These Devices are Pb−Free and are RoHS Compliant* NPN PNP COLLECTOR 2, 4 COLLECTOR 2, 4 MAXIMUM RATINGS Rating Symbol Value Unit VCEO 150 Vdc Collector−Base Voltage VCB 150 Vdc Emitter−Base Voltage VEB 5 Vdc Collector−Emitter Voltage RMS Isolation Voltage (Note 1) (t = 0.3 sec, R.H. ≤ 30%, TA = 25_C) Per Figure 11 Collector Current − Continuous Collector Current − Peak VISOL 1 BASE EMITTER 3 EMITTER 3 VRMS 4500 IC 8 Adc ICM 16 Adc Base Current IB 2 Adc Total Power Dissipation (Note 2) @ TC = 25_C Derate above 25_C PD 36 0.286 W W/_C Total Power Dissipation @ TA = 25_C Derate above 25_C PD 2.0 0.016 W W/_C TJ, Tstg –65 to +150 _C Operating and Storage Temperature Range 1 BASE MARKING DIAGRAM 1 2 TO−220 FULLPACK CASE 221D STYLE 2 3 MJF1503xG AYWW THERMAL CHARACTERISTICS Symbol Max Unit Thermal Resistance, Junction−to−Ambient Characteristic RqJA 62.5 _C/W Thermal Resistance, Junction−to−Case (Note 2) RqJC 3.5 _C/W Lead Temperature for Soldering Purposes TL 260 _C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Proper strike and creepage distance must be provided. 2. Measurement made with thermocouple contacting the bottom insulated surface (in a location beneath the die), the devices mounted on a heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs. MJF1503x = Specific Device Code x = 0 or 1 G = Pb−Free Package A = Assembly Location Y = Year WW = Work Week ORDERING INFORMATION Device *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2013 September, 2013 − Rev. 8 1 Package Shipping MJF15030G TO−220 FULLPACK 50 Units/Rail (Pb−Free) MJF15031G TO−220 FULLPACK (Pb−Free) 50 Units/Rail Publication Order Number: MJF15030/D MJF15030 (NPN), MJF15031 (PNP) ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) Symbol Min Max Unit VCEO(sus) 150 − Vdc Collector Cutoff Current (VCE = 150 Vdc, IB = 0) ICEO − 10 mAdc Collector Cutoff Current (VCB = 150 Vdc, IE = 0) ICBO − 10 mAdc Emitter Cutoff Current (VBE = 5 Vdc, IC = 0) IEBO − 10 mAdc DC Current Gain (IC = 0.1 Adc, VCE = 2 Vdc) (IC = 2 Adc, VCE = 2 Vdc) (IC = 3 Adc, VCE = 2 Vdc) (IC = 4 Adc, VCE = 2 Vdc) hFE 40 40 40 20 − − − − − DC Current Gain Linearity (VCE from 2 V to 20 V, IC from 0.1 A to 3 A) (NPN to PNP) hFE Characteristic OFF CHARACTERISTICS Collector−Emitter Sustaining Voltage (Note 3) (IC = 10 mAdc, IB = 0) ON CHARACTERISTICS (Note 3) Typ 2 3 Collector−Emitter Saturation Voltage (IC = 1 Adc, IB = 0.1 Adc) VCE(sat) − 0.5 Vdc Base−Emitter On Voltage (IC = 1 Adc, VCE = 2 Vdc) VBE(on) − 1 Vdc fT 30 − MHz DYNAMIC CHARACTERISTICS Current Gain − Bandwidth Product (Note 4) (IC = 500 mAdc, VCE = 10 Vdc, ftest = 10 MHz) r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 4. fT = ⎪hfe⎪• ftest. 1 0.5 0.3 0.2 SINGLE PULSE RqJC(t) = r(t) RqJC TJ(pk) - TC = P(pk) RqJC(t) 0.1 0.05 0.03 0.02 0.01 0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 t, TIME (ms) 100 Figure 1. Thermal Response http://onsemi.com 2 200 300 500 1K 2K 3K 5K 10K MJF15030 (NPN), MJF15031 (PNP) There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figures 2 and 3 is based on TJ(pk) = 150_C; TC is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) < 150_C. TJ(pk) may be calculated from the data in Figure 1. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 20 IC, COLLECTOR CURRENT (AMP) 10 100 ms 5 3 2 5 ms dc 1 0.5 0.3 0.2 WIREBOND LIMIT THERMAL LIMIT SECONDARY BREAKDOWN LIMIT @ TC = 25°C 0.1 0.05 0.03 0.02 3 2 50 70 100 150 200 5 7 10 20 30 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 2. Forward Bias Safe Operating Area 1000 Cib (NPN) 500 C, CAPACITANCE (pF) IC, COLLECTOR CURRENT (AMP) 8 5 3 VBE(off) = 9 V IC/IB = 10 TC = 25°C 2 1 0 0 Cib (PNP) 200 100 Cob (PNP) 50 30 5V 3V 1.5 V 0V 100 110 120 130 140 150 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Cob (NPN) 20 10 1.5 3 hfe , SMALL-SIGNAL CURRENT GAIN 100 50 30 PNP VCE = 10 V IC = 0.5 A TC = 25°C 20 NPN 10 5 0.5 0.7 1 2 3 5 7 100 150 Figure 4. Capacitances f T, CURRENT GAIN — BANDWIDTH PRODUCT (MHz) Figure 3. Reverse Bias Switching Safe Operating Area 5 7 10 30 50 VR, REVERSE VOLTAGE (VOLTS) 10 100 90 (PNP) 60 (NPN) 50 20 10 0 0.1 0.2 0.5 1 2 5 f, FREQUENCY (MHz) IC, COLLECTOR CURRENT (AMP) Figure 5. Small−Signal Current Gain Figure 6. Current Gain — Bandwidth Product http://onsemi.com 3 10 MJF15030 (NPN), MJF15031 (PNP) DC CURRENT GAIN 1K 1K VCE = 2 V 500 hFE, DC CURRENT GAIN hFE, DC CURRENT GAIN 500 TJ = 150°C 200 150 TJ = 25°C 100 70 50 TJ = -55°C 30 VCE = 2 V TJ = 150°C 200 TJ = 25°C 100 TJ = -55°C 50 20 20 10 0.1 0.2 0.5 2 1 5 10 0.1 10 0.2 0.5 1 2 IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP) Figure 7a. MJF15030 NPN 5 10 Figure 7b. MJF15031 PNP “ON” VOLTAGE 1.8 TJ = 25°C V, VOLTAGE (VOLTS) V, VOLTAGE (VOLTS) 1.6 1.2 1 VBE(sat) @ IC/IB = 10 0.6 VBE(on) @ VCE = 2 V 1.4 1 0.8 VBE(sat) @ IC/IB = 10 VCE(sat) @ IC/IB = 20 0.4 VCE(sat) @ IC/IB = 20 0.2 0.1 0.2 0.5 VBE(sat) @ IC/IB = 20 IC/IB = 10 1 2 5 0 0.1 10 2 5 10 Figure 8b. MJF15031 PNP 1 10 VCC = 80 V IC/IB = 10 TJ = 25°C 0.5 3 td (NPN, PNP) 0.2 tr (PNP) 0.1 VCC = 80 V IC/IB = 10, IB1 = IB2 ts (NPN) TJ = 25°C 5 t, TIME (s) μ t, TIME (s) μ 1 IC, COLLECTOR CURRENT (AMP) Figure 8a. MJF15030 NPN 0.05 2 ts (PNP) 1 0.5 tf (PNP) tr (NPN) 0.03 0.2 0.02 0.01 0.1 0.5 0.2 IC, COLLECTOR CURRENT (AMP) IC/IB = 10 0.2 0.5 1 2 5 0.1 0.1 10 IC, COLLECTOR CURRENT (AMP) tf (NPN) 0.2 0.3 0.5 1 2 IC, COLLECTOR CURRENT (AMP) Figure 9. Turn−On Times Figure 10. Turn−Off Times http://onsemi.com 4 5 10 MJF15030 (NPN), MJF15031 (PNP) TEST CONDITIONS FOR ISOLATION TESTS* FULLY ISOLATED PACKAGE LEADS HEATSINK 0.110, MIN Figure 11. Mounting Position *Measurement made between leads and heatsink with all leads shorted together. MOUNTING INFORMATION 4-40 SCREW CLIP PLAIN WASHER HEATSINK COMPRESSION WASHER HEATSINK NUT Figure 12. Typical Mounting Techniques* Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions. Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in . lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability. Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 10 in . lbs of mounting torque under any mounting conditions. ** For more information about mounting power semiconductors see Application Note AN1040. http://onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220 FULLPAK CASE 221D−03 ISSUE K −T− −B− F C S Q SCALE 1:1 SEATING PLANE U 1 2 3 −Y− K G N L D STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE STYLE 2: PIN 1. BASE 2. COLLECTOR 3. EMITTER STYLE 4: PIN 1. CATHODE 2. ANODE 3. CATHODE STYLE 5: PIN 1. CATHODE 2. ANODE 3. GATE J R 3 PL 0.25 (0.010) M B M Y DESCRIPTION: INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 MARKING DIAGRAMS STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE STYLE 6: PIN 1. MT 1 2. MT 2 3. GATE xxxxxx G A Y WW DOCUMENT NUMBER: NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. DIM A B C D F G H J K L N Q R S U A H DATE 27 FEB 2009 98ASB42514B TO−220 FULLPAK xxxxxxG AYWW AYWW xxxxxxG AKA Bipolar Rectifier = Specific Device Code = Pb−Free Package = Assembly Location = Year = Work Week A Y WW xxxxxx G AKA = Assembly Location = Year = Work Week = Device Code = Pb−Free Package = Polarity Designator Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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