MM74C74MX

Revised May 2002 MM74C74 Dual D-Type Flip-Flop General Description Features The MM74C74 dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input. ■ Supply voltage range: 3V to 15V ■ Tenth power TTL compatible: Drive 2 LPT2L loads ■ High noise immunity: 0.45 VCC (typ.) ■ Low power: 50 nW (typ.) ■ Medium speed operation: 10 MHz (typ.) with 10V supply Applications • Automotive • Data terminals • Instrumentation • Medical electronics • Alarm system • Industrial electronics • Remote metering • Computers Ordering Code: Order Number Package Number Package Description MM74C74M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74C74N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Preset Clear Qn Qn 0 0 0 0 0 1 1 0 1 0 0 1 1 1 Qn (Note 1) Qn (Note 1) Note 1: No change in output from previous state. Note: A logic “0” on clear sets Q to logic “0”. A logic “0” on preset sets Q to logic “1”. Top View © 2002 Fairchild Semiconductor Corporation DS005885 www.fairchildsemi.com MM74C74 Dual D-Type Flip-Flop October 1987 MM74C74 Logic Diagram www.fairchildsemi.com 2 MM74C74 Absolute Maximum Ratings(Note 2) Voltage at Any Pin (Note 2) −0.3V to VCC +0.3V Operating Temperature Range −55°C to +125°C Storage Temperature Range −65°C to +150°C Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Lead Temperature 260°C (Soldering, 10 seconds) Operating VCC Range 3V to 15V VCC (Max) 18V DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Output Voltage Logical “0” Output Voltage VCC = 5V 3.5 VCC = 10V 80 V VCC = 5V 1.5 VCC = 10V 2.0 VCC = 5V 4.5 VCC = 10V 9.0 V VCC = 5V 0.5 VCC = 10V 1.0 IIN(1) Logical “1” Input Current VCC = 15V IIN(0) Logical “0” Input Current VCC = 15V ICC Supply Current VCC = 15V V 1.0 −1.0 V µA µA 0.05 60 µA 0.8 V 0.4 V CMOS/LPTTL INTERFACE VIN(1) Logical “1” Input Voltage VCC = 4.75V VIN(0) Logical “0” Input Voltage VCC = 4.75V VCC− 1.5 VOUT(1) Logical “1” Output Voltage VCC = 4.75V, ID = −360 µA VOUT(0) Logical “0” Output Voltage VCC = 4.75V, ID = 360 µA 2.4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) ISOURCE Output Source Current VCC = 5V, VIN(0) = 0V ISOURCE Output Source Current VCC = 10V, VIN(0) = 0V ISINK Output Sink Current ISINK Output Sink Current TA = 25°C, VOUT = 0V TA = 25°C, VOUT = 0V VCC = 5V, VIN(1) = 5V TA = 25°C, VOUT = V CC VCC = 10V, VIN(1) = 10V TA = 25°C, VOUT = V CC 3 −1.75 mA −8.0 mA 1.75 mA 8.0 mA www.fairchildsemi.com MM74C74 AC Electrical Characteristics (Note 3) TA = 25°C, CL = 50 pF, unless otherwise noted Symbol Parameter Conditions Min Typ Max CIN Input Capacitance Any Input (Note 4) 5.0 tpd Propagation Delay Time to a VCC = 5V 180 300 Logical “0” tpd0 or Logical “1” VCC = 10V 70 110 Propagation Delay Time to a VCC = 5V 180 300 Logical “0” from Preset or Clear VCC = 10V 70 110 Propagation Delay Time to a VCC = 5V 250 400 Logical “1” from Preset or Clear VCC = 10V 100 150 Units pF ns tpd1 from Clock to Q or Q tpd tpd tS0, tS1 tH0, tH1 tPW1 tPW2 tr, tf fMAX CPD Time Prior to Clock Pulse that VCC = 5V 100 50 Data Must be Present tSETUP VCC = 10V 40 20 VCC = 5V −20 0 Data Must be Held VCC = 10V −8.0 0 Minimum Clock Pulse VCC = 5V 100 250 Width (tWL = tWH) VCC = 10V 40 100 Minimum Preset and VCC = 5V 100 160 Clear Pulse Width VCC = 10V 40 70 VCC = 5V 15.0 and Fall Time VCC = 10V 5.0 Maximum Clock Frequency VCC = 5V 2.0 3.5 VCC = 10V 5.0 8.0 Power Dissipation Capacitance (Note 5) ns ns Time after Clock Pulse that Maximum Clock Rise ns ns ns ns µs 40 MHz pF Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: Capacitance is guaranteed by periodic testing. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note— AN-90. Typical Applications Ripple Counter (Divide by 2n) 74C Compatibility Shift Register Guaranteed Noise Margin as a Function of VCC www.fairchildsemi.com 4 MM74C74 Switching Time Waveform CMOS to CMOS tr = tf = 20 ns AC Test Circuit 5 www.fairchildsemi.com MM74C74 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 6 MM74C74 Dual D-Type Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com