MM74HC244WMX

Revised August 2000 MM74HC244 Octal 3-STATE Buffer General Description Features The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not have Schmitt trigger inputs. ■ Typical propagation delay: 14 ns These 3-STATE buffers utilize advanced silicon-gate CMOS technology and are general purpose high speed non-inverting buffers. They possess high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low power Schottky devices, while retaining the advantage of CMOS circuitry, i.e., high noise immunity, and low power consumption. All three devices have a fanout of 15 LS-TTL equivalent inputs. ■ 3-STATE outputs for connection to system buses ■ Wide power supply range: 2–6V ■ Low quiescent supply current: 80 µA ■ Output current: 6 mA All inputs are protected from damage due to static discharge by diodes to VCC and ground. Ordering Code: Order Number Package Number MM74HC244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC244SJ MM74HC244MTC MM74HC244N MTC20 N20A Package Description 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table 1G 1A 1Y 2G 2A 2Y L L L L L L L H H L H H H L Z H L Z H H Z H H Z H = HIGH Level L = LOW Level Z = High Impedance Top View © 2000 Fairchild Semiconductor Corporation DS005327 www.fairchildsemi.com MM74HC244 Octal 3-STATE Buffer September 1983 MM74HC244 Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) −0.5 to +7.0V Supply Voltage (VCC) DC Input Voltage (VIN) −1.5 to VCC +1.5V DC Output Voltage (VOUT) −0.5 to VCC +0.5V Clamp Diode Current (IIK, IOK) ± 20 mA DC Output Current, per pin (IOUT) ± 35 mA Units 6 V 0 VCC V −40 +85 °C (tr, tf) VCC = 2.0V 1000 ns VCC = 4.5V 500 ns VCC = 6.0V 400 ns (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times −65°C to +150°C Storage Temperature Range (TSTG) Max 2 DC Input or Output Voltage ± 70 mA DC VCC or GND Current, per pin (ICC) Min Supply Voltage (VCC) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Lead Temperature (TL) DC Electrical Characteristics Symbol VIH VIL Parameter Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C. (Note 4) Conditions VCC TA = 25°C Typ TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V 6.0V 4.2 4.2 4.2 V Maximum LOW Level 2.0V 0.5 0.5 0.5 V 4.5V 1.35 1.35 1.35 V 6.0V 1.8 1.8 1.8 V Minimum HIGH Level VIN = VIH or VIL Output Voltage |IOUT | ≤ 20 µA 2.0V 2.0 1.9 1.9 1.9 V 4.5V 4.5 4.4 4.4 4.4 V 6.0V 6.0 5.9 5.9 5.9 VIN = VIH or VIL VOL Units Minimum HIGH Level Input Voltage VOH Note 2: Unless otherwise specified all voltages are referenced to ground. 260°C (Soldering 10 seconds) V V |IOUT | ≤ 6.0 mA 4.5V 4.2 3.98 3.84 3.7 V |IOUT | ≤ 7.8 mA 6.0V 5.7 5.4 5.34 5.2 V Maximum LOW Level VIN = VIH or VIL Output Voltage |IOUT | ≤ 20 µA 2.0V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 V 6.0V 0 0.1 0.1 0.1 V V VIN = VIH or VIL IIN |IOUT | ≤ 6.0 mA 4.5V 0.2 0.26 0.33 0.4 |IOUT | ≤ 7.8 mA 6.0V 0.2 0.26 0.33 0.4 V VIN = VCC or GND 6.0V ± 0.1 ± 1.0 ±1.0 µA Maximum 3-STATE VIN = VIH, or VIL 6.0V ± 0.5 ±5 ±10 µA Output Leakage VOUT = VCC or GND 6.0V 8.0 80 160 µA Maximum Input Current IOZ ICC Current G = VIH Maximum Quiescent VIN = VCC or GND Supply Current IOUT = 0 µA Note 4: For a power supply of 5V ± 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. 3 www.fairchildsemi.com MM74HC244 Absolute Maximum Ratings(Note 1) MM74HC244 AC Electrical Characteristics VCC = 5V, TA = 25°C, tr = tf = 6 ns Symbol tPHL, tPLH Parameter Conditions Typ Guaranteed Limit Units CL = 45 pF 14 20 ns Maximum Enable Delay RL = 1 kΩ 17 28 ns to Active Output CL = 45 pF Maximum Disable Delay RL = 1 kΩ 15 25 ns from Active Output CL = 5 pF Maximum Propagation Delay tPZH, tPZL tPHZ, tPLZ AC Electrical Characteristics VCC = 2.0V-6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol Parameter tPHL, tPLH Maximum Propagation Delay tPZH, tPZL Maximum Output Enable Time tPHZ, tPLZ Maximum Output Disable Time Conditions VCC TA = 25°C Typ 2.0V 58 115 145 171 2.0V 83 165 208 246 ns CL = 50 pF 4.5V 14 23 29 34 ns CL = 150 pF 4.5V 17 33 42 49 ns CL = 50 pF 6.0V 10 20 25 29 ns CL = 150 pF 6.0V 14 28 35 42 ns ns CIN ns RL = 1 kΩ CL = 50 pF 2.0V 75 150 189 224 CL = 150 pF 2.0V 100 200 252 298 ns CL = 50 pF 4.5V 15 30 38 45 ns CL = 150 pF 4.5V 30 40 50 60 ns CL = 50 pF 6.0V 13 26 32 38 ns CL = 150 pF 6.0V 17 34 43 51 ns RL = 1 kΩ 2.0V 75 150 189 224 ns CL = 50 pF 4.5V 15 30 38 45 ns 6.0V 13 2.0V 4.5V 6.0V Capacitance (Note 5) Units CL = 50 pF Rise and Fall Time Power Dissipation Guaranteed Limits CL = 150 pF tTLH, tTHL Maximum Output CPD TA = −40 to 85°C TA = −55 to 125°C 26 32 38 ns 60 75 90 ns 12 15 18 ns 10 13 15 ns (per buffer) G = VIH 12 G = VIL 50 Maximum Input pF pF 5 10 10 10 pF 10 20 20 20 pF Capacitance COUT Maximum Output Capacitance Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. www.fairchildsemi.com 4 MM74HC244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com MM74HC244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 MM74HC244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com MM74HC244 Octal 3-STATE Buffer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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