Revised August 2000
MM74HC4538
Dual Retriggerable Monostable Multivibrator
General Description
The MM74HC4538 high speed monostable multivibrator
(one shots) is implemented in advanced silicon-gate
CMOS technology. They feature speeds comparable to low
power Schottky TTL circuitry while retaining the low power
and high noise immunity characteristic of CMOS circuits.
Each multivibrator features both a negative, A, and a positive, B, transition triggered input, either of which can be
used as an inhibit input. Also included is a clear input that
when taken low resets the one shot. The MM74HC4538 is
retriggerable. That is, it may be triggered repeatedly while
their outputs are generating a pulse and the pulse will be
extended.
Pulse width stability over a wide range of temperature and
supply is achieved using linear CMOS techniques. The output pulse equation is simply: PW = 0.7(R)(C) where PW is
in seconds, R is in ohms, and C is in farads. This device is
pin compatible with the CD4528, and the CD4538 one
shots. All inputs are protected from damage due to static
discharge by diodes to VCC and ground.
Features
■ Schmitt trigger on A and B inputs
■ Wide power supply range: 2–6V
■ Typical trigger propagation delay: 32 ns
■ Fanout of 10 LS-TTL loads
■ Low input current: 1 µA max
Ordering Code:
Order Number
Package Number
Package Description
MM74HC4538M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
MM74HC4538SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4538N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Inputs
Outputs
Clear
A
B
Q
Q
L
X
X
L
H
X
H
X
L
H
X
X
L
H
L
↓
H
↑
H
H = HIGH Level
L = LOW Level
↑ = Transition from LOW-to-HIGH
↓ = Transition from HIGH-to-LOW
= One HIGH Level Pulse
= One LOW Level Pulse
X = Irrelevant
L
H
© 2000 Fairchild Semiconductor Corporation
DS005217
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MM74HC4538 Dual Retriggerable Monostable Multivibrator
February 1984
MM74HC4538
Block Diagrams
Note: Pin 1 and Pin 15 must be hard-wired to GND.
Logic Diagram
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2
MM74HC4538
Timing Diagram
Circuit Operation
TRIGGER OPERATION
The MM74HC4538 operates as follows (refer to logic diagram). In the quiescent state, the external timing capacitor,
CX, is charged to VCC. When a trigger occurs, the Q output
goes HIGH and CX discharges quickly to the lower refer-
The MM74HC4538 is triggered by either a rising-edge signal at input A (#7) or a falling-edge signal at input B (#8),
with the unused trigger input and the Reset input held at
the voltage levels shown in the Truth Table. Either trigger
signal will cause the output of the trigger-control circuit to
go HIGH (#9).
ence voltage (VREF Lower = 1/3 VCC ). CX then charges,
through RX, back up to the upper reference voltage (VREF
The trigger-control circuit going HIGH simultaneously initiates three events. First, the output latch goes LOW, thus
taking the Q output of the HC4538 to a HIGH State (#10).
Second, transistor M3 is turned on, which allows the external timing capacitor, CX, to rapidly discharge toward
ground (#11). (Note that the voltage across CXappears at
the input of the upper reference circuit comparator.) Third,
transistor M4 is turned off and transmission gate T1 is
turned ON, thus allowing the voltage across CX to also
appear at the input of the lower reference circuit comparator.
Upper = 2/3 VCC), at which point the one-shot has timed out
and the Q output goes LOW.
The following, more detailed description of the circuit operation refers to both the logic diagram and the timing diagram.
QUIESCENT STATE
In the quiescent state, before an input trigger appears, the
output latch is HIGH and the reset latch is HIGH (#1 in logic
diagram).
When CX discharges to the reference voltage of the lower
reference circuit (#12), the outputs of both reference circuits will be HIGH (#13). The trigger-control reset circuit
goes HIGH, resetting the trigger-control circuit flip-flop to a
LOW State (#14). This turns transistor M3 OFF again,
allowing CX to begin to charge back up toward VCC, with a
time constant t = RXCX (#15). In addition, transistor M4 is
turned ON and transmission gate T1 is turned OFF. Thus a
high voltage level is applied to the input of the lower reference circuit comparator, causing its output to go LOW
(#16). The monostable multivibrator may be retriggered at
any time after the trigger-control circuit goes LOW.
Thus the Q output (pin 6 or 10) of the monostable multivibrator is LOW (#2, timing diagram).
The output of the trigger-control circuit is LOW (#3), and
transistors M1, M2, and M3 are turned off. The external
timing capacitor, CX, is charged to VCC (#4), and the upper
reference circuit has a LOW output (#5). Transistor M4 is
turned ON and transmission gate T1 is turned OFF. Thus
the lower reference circuit has VCC at the noninverting
input and a resulting LOW output (#6).
In addition, the output of the trigger-control reset circuit is
LOW.
When CX charges up to the reference voltage of the upper
reference circuit (#17), the output of the upper reference
circuit goes LOW (#18). This causes the output latch to
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MM74HC4538
Circuit Operation
(Continued)
toggle, taking the Q output of the HC4538 to a LOW State
(#19), and completing the time-out cycle.
device is powered down, the capacitor may discharge from
VCC through the input protection diodes at pin 2 or pin 14.
Current through the protection diodes must be limited to 30
mA; therefore, the turn-off time of the VCC power supply
must not be faster than t = VCC•CX/(30 mA). For example, if
VCC = 5V and CX = 15 µF, the VCC supply must turn OFF
no faster than t = (15V)•(15 µF)/30 mA = 2.5 ms. This is
usually not a problem because power supplies are heavily
filtered and cannot discharge at this rate.
RESET OPERATION
A low voltage applied to the Reset pin always forces the Q
output of the HC4538 to a LOW State.
The timing diagram illustrates the case in which reset
occurs (#20) while CX is charging up toward the reference
voltage of the upper reference circuit (#21). When a reset
occurs, the output of the reset latch goes LOW (#22), turning ON transistor M1. Thus CX is allowed to quickly charge
up to VCC (#23) to await the next trigger signal.
When a more rapid decrease of VCC to zero volts occurs,
the MM74HC4538 may sustain damage. To avoid this possibility, use an external clamping diode, DX, connected
from VCC to the CX pin.
Recovery time is the required delay after reset goes inactive to a new trigger rising edge. On the diagram it is shown
as (#26) to (#27).
SET UP RECOMMENDATIONS
RETRIGGER OPERATION
In the retriggerable mode, the HC4538 may be retriggered
during timing out of the output pulse at any time after the
trigger-control circuit flip-flop has been reset (#24).
Because the trigger-control circuit flip-flop resets shortly
after CX has discharged to the reference voltage of the
lower reference circuit (#25), the minimum retrigger time, trr
is a function of internal propagation delays and the discharge time of CX:
at room temperature
POWER-DOWN CONSIDERATIONS
Large values of CX may cause problems when powering
down the MM74HC4538 because of the amount of energy
stored in the capacitor. When a system containing this
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4
Minimum
R X = 1 kΩ
Minimum
CX = 0 pF.
Recommended Operating
Conditions
(Note 2)
−0.5 to +7.0V
Supply Voltage (VCC )
DC Input Voltage (VIN)
−1.5 to VCC +1.5V
DC Output Voltage (VOUT)
−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)
±20 mA
DC Output Current, per pin (IOUT)
±25 mA
DC VCC or GND Current, per pin (ICC)
±50 mA
Storage Temperature Range (TSTG)
Min
Max
Units
Supply Voltage (VCC)
2
6
V
DC Input or Output Voltage
0
VCC
V
−40
+85
°C
(VIN, VOUT)
Operating Temperature Range (TA)
Input Rise or Fall Times
−65°C to +150°C
(Reset only)
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (TL)
1000
ns
VCC = 4.5V
500
ns
VCC = 6.0V
400
ns
Note 1: Maximum Ratings are those values beyond which damage to the
device may occur.
260°C
(Soldering 10 seconds)
(tr, tf) VCC = 2.0V
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation Temperature Derating: Plastic “N” Package: −
12mW/°C from 65°C to 85°C.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
Parameter
(Note 4)
Conditions
VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −55 to 125°C
Guaranteed Limits
Units
Minimum HIGH Level Input
2.0V
1.5
1.5
1.5
Voltage
4.5V
3.15
3.15
3.15
V
V
6.0V
4.2
4.2
4.2
V
V
Maximum LOW Level Input
2.0V
0.5
0.5
0.5
Voltage
4.5V
1.35
1.35
1.35
V
6.0V
1.8
1.8
1.8
V
Minimum HIGH Level Output VIN = VIH or VIL
Voltage
|IOUT| ≤ 20 µA
2.0V
2.0
1.9
1.9
1.9
V
4.5V
4.5
4.4
4.4
4.4
V
6.0V
6.0
5.9
5.9
5.9
V
V
VIN = VIH or VIL
VOL
|IOUT| ≤ 4.0 mA
4.5V
3.98
3.84
3.7
|IOUT| ≤ 5.2 mA
6.0V
5.48
5.34
5.2
V
Maximum LOW Level Output VIN = VIH or VIL
2.0V
0.1
0.1
0.1
V
Voltage
|IOUT| ≤ 20 µA
0
4.5V
0
0.1
0.1
0.1
V
6.0V
0
0.1
0.1
0.1
V
V
VIN = VIH or VIL
IIN
Maximum Input Current
|IOUT| ≤ 4.0 mA
4.5V
0.26
0.33
0.4
|IOUT| ≤ 5.2 mA
6.0V
0.26
0.33
0.4
V
VIN = VCC or GND
6.0V
±0.1
±1.0
±1.0
µA
VIN = VCC or GND
6.0V
±0.1
±1.0
±1.0
µA
6.0V
150
250
400
µA
6.0V
130
220
350
µA
(Pins 2, 14) (Note 5)
IIN
Maximum Input Current
(all other pins)
ICC
Maximum Active Supply
Active
Current
Pins 2, 14 = 0.5 VCC
Q1, Q2 = HIGH
VIN = V CC or GND
ICC
Maximum Quiescent Supply
Quiescent Current
Pins 2, 14 = OPEN
Q1, Q2 = LOW
VIN = V CC or GND
Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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MM74HC4538
Absolute Maximum Ratings(Note 1)
MM74HC4538
DC Electrical Characteristics
(Continued)
Note 5: The device must be set up with 3 steps before measuring IIN:
Clear
A
B
1.
H
L
H
2.
H
H
H
3.
H
L
H
AC Electrical Characteristics
VCC = 5V, TA = 25° C, CL = 15 pF, tr = tf = 6 ns
Symbol
Parameter
Conditions
tPLH
Maximum Propagation Delay A, or B to Q
Typ
Limit
Units
23
45
ns
tPHL
Maximum Propagation Delay A, or B to Q
26
50
ns
tPHL
Maximum Propagation Delay Clear to Q
23
45
ns
tPLH
Maximum Propagation Delay Clear to Q
26
50
ns
tW
Minimum Pulse Width A, B or Clear
10
16
ns
AC Electrical Characteristics
CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
tPLH
tPHL
tPHL
Parameter
VCC
Conditions
tTLH, tTHL
tr , tf
tW
tWQ
2.0V
100
250
315
373
ns
4.5V
25
50
63
75
ns
6.0V
21
43
54
63
ns
Maximum Propagation
2.0V
110
275
347
410
ns
Delay A, or B to Q
4.5V
28
55
69
82
ns
6.0V
23
47
59
70
ns
Maximum Propagation
2.0V
100
250
315
373
ns
4.5V
25
50
63
75
ns
6.0V
21
43
54
63
ns
Maximum Propagation
2.0V
110
275
347
410
ns
Delay Clear to Q
4.5V
28
55
69
82
ns
6.0V
23
47
59
70
ns
Maximum Output
2.0V
30
75
95
110
ns
Rise and Fall
4.5V
10
15
19
22
ns
Time
6.0V
8
13
16
19
ns
Maximum Input
2.0V
1000
1000
1000
ns
Rise and Fall
4.5V
500
500
500
ns
Time (Reset only)
6.0V
400
400
400
ns
Minimum Pulse Width
2.0V
80
101
119
ns
A, B, Clear
4.5V
16
20
24
ns
14
17
20
ns
Minimum Recovery
2.0V
0
0
0
ns
Time, Clear
4.5V
0
0
0
ns
Inactive to A or B
6.0V
0
0
0
Output Pulse Width
CX = 12 pF
Min
RX = 1 kΩ
tWQ
Units
Delay A, or B to Q
6.0V
tREC
TA=−40 to 85°C TA = −55 to 125°C
Guaranteed Limits
Maximum Propagation
Delay Clear to Q
tPLH
TA=25°C
Typ
Output Pulse Width
CX = 100 pF
3.0V
283
190
ns
ns
5.0V
147
120
ns
Max
3.0V
283
400
ns
5.0V
147
185
Min
3.0V
1.2
µs
5.0V
1.0
µs
3.0V
1.2
µs
5.0V
1.0
µs
RX = 10 kΩ
Max
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−5
6
ns
Symbol
tWQ
Parameter
Output Pulse Width
(Continued)
VCC
Conditions
CX = 1000 pF
Min
RX = 10 kΩ
Max
tWQ
Output Pulse Width
CIN
Maximum Input
TA=25°C
TA=−40 to 85°C TA = −55 to 125°C
Units
Typ
Guaranteed Limits
3.0V
10.5
9.4
µs
5.0V
10.0
9.3
µs
3.0V
10.5
11.6
µs
5.0V
10.0
10.7
CX = 0.1µF
Min
5.0V
RX = 10k
Max
5.0V
µs
0.63
0.602
0.595
ms
0.77
0.798
0.805
ms
25
pF
Capacitance (Pins 2 & 14)
CIN
Maximum Input
5
10
10
10
pF
Capacitance (other inputs)
CPD
Power Dissipation
(per one shot)
150
pF
±1
%
Capacitance (Note 6)
∆tWQ
Pulse Width Match
Between Circuits in
Same Package
Note 6: CPD determines the no load dynamic consumption, PD = CPD VCC2f+ICC VCC, and the no load dynamic current consumption, IS = VCC f + ICC.
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MM74HC4538
AC Electrical Characteristics
MM74HC4538
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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MM74HC4538
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
9
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MM74HC4538 Dual Retriggerable Monostable Multivibrator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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