MM74HCT05MTCX

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This literature is subject to all applicable copyright laws and is not for resale in any manner. MM74HCT05 Hex Inverter (Open Drain) Features General Description ■ Open drain for wire-NOR function The MM74HCT05 is a logic function fabricated by using advanced silicon-gate CMOS technology, which provides the inherent benefits of CMOS—low quiescent power and wide power supply range. The device is also input and output characteristic and pinout compatible with standard DM74LS logic families. The MM74HCT05 open drain Hex Inverter requires the addition of an external resistor to perform a wire-NOR function. ■ LS-TTL pinout and threshold compatible ■ Fanout of 10 LS-TTL loads ■ Typical propagation delays: – tPZL (with 1kΩ resistor) 10ns – tPLZ (with 1kΩ resistor) 8ns All inputs are protected from static discharge damage by internal diodes to VCC and ground. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering Information Order Number Package Number Package Description MM74HCT05M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HCT05SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT05MTC MM74HCT05N MTC14 N14A 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1984 Fairchild Semiconductor Corporation MM74HCT05 Rev. 1.5.0 www.fairchildsemi.com MM74HCT05 — Hex Inverter (Open Drain) March 2008 MM74HCT05 — Hex Inverter (Open Drain) Connection Diagram Top View Logic Diagram ©1984 Fairchild Semiconductor Corporation MM74HCT05 Rev. 1.5.0 Typical Application www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating VCC Supply Voltage VIN DC Input Voltage –1.5 to VCC+1.5V DC Output Voltage –0.5 to VCC+0.5V VOUT IIK, IOK –0.5 to +7.0V Clamp Diode Current ±20mA IOUT DC Output Current, per pin ±25mA ICC DC VCC or GND Current, per pin ±50mA TSTG PD Storage Temperature Range –65°C to +150°C Power Dissipation Note 2 600mW S.O. Package only TL 500mW Lead Temperature (Soldering 10 seconds) 260°C Notes: 1. Unless otherwise specified all voltages are referenced to ground. 2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter VCC Supply Voltage VIN DC Input Voltage VOUT TA t r, t f DC Output Voltage Operating Temperature Range Input Rise or Fall Times ©1984 Fairchild Semiconductor Corporation MM74HCT05 Rev. 1.5.0 Min. Max. Units 4.5 5.5 V 0 VCC V 0 5.5 V –40 +85 °C 500 ns www.fairchildsemi.com 3 MM74HCT05 — Hex Inverter (Open Drain) Absolute Maximum Ratings(1) TA = –40°C to 85°C TA = 25°C Symbol Parameter Conditions Typ. Guaranteed Limits Units VIH Minimum HIGH Level Input Voltage 2.0 2.0 V VIL Maximum LOW Level Input Voltage 0.8 0.8 V VOL Maximum LOW Level Voltage 0 0.1 0.1 V VIN = VIH, |IOUT| = 4.0mA, VCC = 4.5V 0.2 0.26 0.33 VIN = VIH, |IOUT| = 4.8mA, VCC = 5.5V 0.2 0.26 0.33 ± 0.1 ± 1.0 µA VIN = VIH, |IOUT| = 20µA Maximum Input Current VIN = VCC or GND, VIH or VIL ILKG Maximum HIGH Level Output Leakage Current VIN = VIH or VIL, VOUT = VCC 0.5 5.0 µA ICC Maximum Quiescent Supply Current VIN = VCC or GND, IOUT = 0µA 2.0 20 µA VIN = 2.4V or 0.5V(3) 0.3 0.4 mA 10 µA IIN IOHZ Off State Current VCC = 4.5V–5.5V, VO = 5.5V Note: 3. This is measured per input with all other inputs held at VCC or ground. AC Electrical Characteristics VCC = 5V, TA = 25°C,CL = 15pF, tr = tf = 6ns unless otherwise noted. Symbol Parameter Conditions Typ. Guaranteed Limit Units tPZL Maximum Propagation Delay RL = 1kΩ 8 15 ns tPLZ Maximum Propagation Delay RL = 1kΩ 9 16 ns AC Electrical Characteristics VCC = 5V, ± 10%, CL = 50pF, tr = tf = 6ns unless otherwise specified. TA=25°C Symbol Parameter Conditions Typ. TA = –40°C to 85°C Guaranteed Limits Units tPZL Maximum Propagation Delay RL = 1kΩ 10 22 28 ns tPLZ Maximum Propagation Delay RL = 1kΩ 12 20 25 ns tTHL Maximum Output Fall Time 10 15 19 ns CPD Power Dissipation Capacitance CIN Maximum Input Capacitance (per gate), RL = ∞, (4) 20 5 pF 10 pF Note: 4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f+ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. ©1984 Fairchild Semiconductor Corporation MM74HCT05 Rev. 1.5.0 www.fairchildsemi.com 4 MM74HCT05 — Hex Inverter (Open Drain) DC Electrical Characteristics (VCC = 5V ± 10% unless otherwise specified) 0.65 A 0.43TYP 14 8 B 6.4 6.10 3.2 1 PIN#1 IDENT 0.2 C B A 7 TOP VIEW 1.65 ALL LEAD TIPS 0.45 RECOMMENDED LAND PATTERN 1.2 MAX 0.30 0.19 ALL LEAD TIPS 0.1 C 0.65 SEE DETAIL A 0.90+0.15 -0.10 0.13 A B 0.20 0.09 C C FRONT VIEW 0.09 MIN NOTES: A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 2009. E. LANDPATTERN STANDARD: SOP65P640X110-14M. F. DRAWING FILE NAME: MKT-MTC14rev7. GAGE PLANE 0.09 MIN 1.00 0.25 SEATING PLANE DETAIL A 8.75 8.50 A 7.62 14 8 14 B 0.65 8 4.00 3.80 6.00 1 PIN #1 IDENT. 1.27 (0.33) TOP VIEW 5.60 7 0.51 0.35 0.25 M C B A 1.75 MAX 1.70 1 1.27 LAND PATTERN RECOMMENDATION A C 1.50 1.25 FRONT VIEW 0.25 0.10 0.50 0.25 x 45 R0.10 GAGE PLANE R0.10 0.36 8° 0° 0.90 0.50 (1.04) 0.10 C 0.25 0.19 SIDE VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS D. LAND PATTERN STANDARD: SOIC127P600X145-14M E. CONFORMS TO ASME Y14.5M, 2009 D. DRAWING FILENAME: MKT-M14Arev14 SEATING PLANE DETAIL A SCALE 16 : 1 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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