MM74HCT05N

DATA SHEET www.onsemi.com Hex Inverter (Open Drain) 14 MM74HCT05 1 SOIC−14 CASE 751EF General Description The MM74HCT05 is a logic function fabricated by using advanced silicon−gate CMOS technology, which provides the inherent benefits of CMOS—low quiescent power and wide power supply range. The device is also input and output characteristic and pinout compatible with standard DM74LS logic families. The MM74HCT05 open drain Hex Inverter requires the addition of an external resistor to perform a wire−NOR function. All inputs are protected from static discharge damage by internal diodes to VCC and ground. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug−in replacements for LS−TTL devices and can be used to reduce power consumption in existing designs. • 1 TSSOP−14 WB CASE 948G MARKING DIAGRAMS 14 14 Open Drain for Wire−NOR Function LS−TTL Pinout and Threshold Compatible Fanout of 10 LS−TTL Loads Typical Propagation Delays: ♦ tPZL (with 1 kW Resistor) 10 ns ♦ tPLZ (with 1 kW Resistor) 12 ns These are Pb−Free Devices XXX XXX ALYW XXXXX AWLYWW 1 SOIC−14 Features • • • • 14 XXXXX A WL, L Y WW, W 1 TSSOP−14 WB = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week LOGIC DIAGRAM Connection Diagram TYPICAL APPLICATION Top View ORDERING INFORMATION Figure 1. Connection Diagram See detailed ordering and shipping information on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 1984 November, 2022 − Rev. 2 1 Publication Order Number: MM74HCT05/D MM74HCT05 ABSOLUTE MAXIMUM RATINGS (Note 1) Symbol Parameter Rating VCC Supply Voltage VIN DC Input Voltage –0.5 to VCC + 0.5 V DC Output Voltage –0.5 to VCC + 0.5 V VOUT IIK, IOK –0.5 to +7.0 V Clamp Diode Current ±20 mA IOUT DC Output Current, per Pin ±25 mA ICC DC VCC or GND Current, per Pin TSTG PD TL ±50 mA Storage Temperature Range Power Dissipation –65°C to +150°C Note 2 600 mW S.O. Package Only 500 mW Lead Temperature (Soldering 10 Seconds) 260°C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Unless otherwise specified all voltages are referenced to ground. 2. Power Dissipation temperature derating − plastic “N” package: –12 mW/°C from 65°C to 85°C. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 4.5 5.5 V DC Input Voltage 0 VCC V DC Output Voltage 0 5.5 V –40 +85 °C − 500 ns VCC Supply Voltage VIN VOUT TA Operating Temperature Range tr, tf Input Rise or Fall Times Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2 MM74HCT05 DC ELECTRICAL CHARACTERISTICS (VCC = 5 V ±10% unless otherwise specified) TA = 25°C Symbol Parameter Conditions Typ TA = −40°C to 85°C Guaranteed Limits Unit VIH Minimum HIGH Level Input Voltage − 2.0 2.0 V VIL Maximum LOW Level Input Voltage − 0.8 0.8 V VOL Maximum LOW Level Output Voltage 0 0.1 0.1 V VIN = VIH or VIL, |IOUT| = 4.0 mA, VCC = 4.5 V 0.2 0.26 0.33 VIN = VIH or VIL, |IOUT| = 4.8 mA, VCC = 5.5 V 0.2 0.26 0.33 IIN VIN = VIH or VIL, |IOUT| ≤ 20 mA Maximum Input Current VIN = VCC or GND, VIH or VIL − ±0.1 ±1.0 mA ILKG Maximum HIGH Level Output Leakage Current VIN = VIH or VIL, VOUT = VCC − 0.5 5.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND, IOUT = 0 mA − 2.0 20 mA VIN = 2.4 V or 0.5 V (Note 3) − 0.3 0.4 mA VCC = 4.5 V−5.5 V, VO = 5.5 V − − 10 mA IOHZ Off State Current Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. This is measured per input with all other inputs held at VCC or ground. AC ELECTRICAL CHARACTERISTICS (VCC = 5 V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns unless otherwise specified) Typ Guaranteed Limit Unit tPZL Maximum Propagation Delay RL = 1 kW 8 15 ns tPLZ Maximum Propagation Delay RL = 1 kW 9 16 ns Symbol Parameter Conditions AC ELECTRICAL CHARACTERISTICS (VCC = 5 V ±10%, CL = 50 pF, tr = tf = 6 ns unless otherwise specified) TA = 25°C Symbol Parameter Conditions Typ TA = −40°C to 85°C Guaranteed Limits Unit tPZL Maximum Propagation Delay RL = 1 kW 10 22 28 ns tPLZ Maximum Propagation Delay RL = 1 kW 12 20 25 ns tTHL Maximum Output Fall Time 10 15 19 ns CPD Power Dissipation Capacitance − 20 − pF CIN Maximum Input Capacitance − 5 10 pF (per gate) RL = ∞ (Note 4) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. www.onsemi.com 3 MM74HCT05 ORDERING INFORMATION Package Shipping† MM74HCT05M SOIC−14, Case 751EF (Pb−Free, Halide−Free) 1100 Units / Tube MM74HCT05MX SOIC−14, Case 751EF (Pb−Free, Halide−Free) 2500 Units / Tape & Reel TSSOP−14 WB, Case 948G (Pb−Free, Halide Free) 2500 Units / Tape & Reel Part Number MM74HCT05MTCX †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 4 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC14 CASE 751EF ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13739G SOIC14 DATE 30 SEP 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−14 WB CASE 948G ISSUE C 14 DATE 17 FEB 2016 1 SCALE 2:1 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S S N 2X 14 L/2 0.25 (0.010) 8 M B −U− L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S DETAIL E K A −V− K1 J J1 ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE H G D DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 −−− 1.20 −−− 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_ GENERIC MARKING DIAGRAM* 14 SOLDERING FOOTPRINT XXXX XXXX ALYWG G 7.06 1 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS DOCUMENT NUMBER: 98ASH70246A DESCRIPTION: TSSOP−14 WB A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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