DATA SHEET
www.onsemi.com
Octal 3-State Transceiver
MM74HCT245
Description
The MM74HCT245 3−STATE bi−directional buffer utilizes
advanced silicon−gate CMOS technology and is intended for two−way
asynchronous communication between data buses. It has high drive
current outputs which enable high speed operation even when driving
large bus capacitances. This circuit possesses the low power
consumption of CMOS circuitry, yet has speeds comparable to low
power Schottky TTL circuits.
This device is TTL input compatible and can drive up to 15 LS−TTL
loads, and all inputs are protected from damage due to static discharge
by diodes to VCC and ground.
The MM74HCT245 has one active low enable input (G), and a
direction control (DIR). When the DIR input is HIGH, data flows from
the A inputs to the B outputs. When DIR is LOW, data flows from B to
A.
MM74HCT devices are intended to interface between TTL and
NMOS components and standard CMOS devices. These parts are also
plug−in replacements for LS−TTL devices and can be used to reduce
power consumption in existing designs.
SOIC−20 WB TSSOP−20 WB
CASE 751D−05
CASE 948E
TSSOP−20 WB
CASE 948AQ
MARKING DIAGRAMS
20
HCT
245A
ALYW
HCT245A
AWLYYWW
1
(TSSOP−WB)
(SOIC−20 WB)
HCT245A= Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
CONNECTION DIAGRAM
Features
•
•
•
•
•
TTL Input Compatible
3−STATE Outputs for connection to system busses
High Output Drive Current: 6 mA (min)
High Speed: 16 ns Typical propagation delay
Low Power: 160 mA (74HCT Series)
Top View
TRUTH TABLE
Control
Operation
Inputs
G
DIR
245
L
L
B data to A bus
L
L
A data to B bus
H
H
isolation
H = HIGH Level
L = LOW Level
X = Irrelevant
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
December, 2022 − Rev 1
1
Publication Order Number:
MM74HCT245/D
MM74HCT245
Figure 1. Logic Diagram
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2
MM74HCT245
ABSOLUTE MAXIMUM RATINGS (Note 1) (Note 2)
Parameter
Symbol
Rating
Unit
VCC
Supply Voltage
–0.5 to +7.0
V
VIN
DC Input Voltage
–0.5 to VCC+0.5
V
DC Output Voltage
VOUT
–0.5 to VCC+0.5
V
Clamp Diode Current
±20
mA
IOUT
DC Output Current, per pin
±35
mA
ICC
Maximum Junction Temperature
±70
mA
–65 to +150
°C
IIK, IOK
TSTG
Storage Temperature Range
PD
Power Dissipation
S.O. Package only
500
TL
Lead Temperature (Soldering 10 seconds)
260
mW
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Absolute Maximum Ratings are those values beyond which damage to the device may occur.
2. Unless otherwise specified all voltages are referenced to ground.
RECOMMENDED OPERATING RANGES
Symbol
VCC
VIN, VOUT
Parameter
Min.
Supply Voltage
DC Input or Output Voltage
TA
Operating Temperature Range
tr, tf
Input Rise or Fall Times
Max.
Unit
4.5
5.5
V
0
VCC
V
−55
+125
°C
−
500
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
MM74HCT245
DC ELECTRICAL CHARACTERISTICS (VCC = 5 V ±10%, unless otherwise specified.)
TA = 25°C
TA = –40°C
to 85°C
TA = –55°C
to 125°C
Test Conditions
Typ.
VIH
Minimum HIGH Level Input
Voltage
−
−
2.0
2.0
2.0
V
VIL
Maximum LOW Level Input
Voltage
−
−
0.8
0.8
0.8
V
VOH
Minimum HIGH Level Output
Voltage
VIN = VIH or VIL,
|IOUT| = 20 mA
|IOUT| = 6.0 mA,VCC = 4.5 V
|IOUT| = 7.2 mA,VCC = 5.5 V
VCC
4.2
5.2
VCC− 0.1
3.98
4.98
VCC− 0.1
3.84
4.84
VCC− 0.1
3.7
4.7
VOL
Maximum LOW Level Output
Voltage
VIN = VIH or VIL,
|IOUT| = 20 mA
|IOUT| = 6.0 mA,VCC = 4.5 V
|IOUT| = 7.2 mA,VCC = 5.5 V
0
0.2
0.2
0.1
0.26
0.26
0.1
0.33
0.33
0.1
0.4
0.4
IIN
Maximum Input Current
VIN = VCC or GND
VIH or VIL, Pin 1or 19
−
±0.1
±1.0
±1.0
mA
IOZ
Maximum 3−STATE Output
Leakage Current
Vout = VCC or GND
G = VIH
−
±0.5
±5.0
±10
mA
ICC
Maximum Quiescent Supply
Current
VIN = VCC or GND,
IOUT = 0 mA
−
8
80
160
mA
0.6
1.0
1.3
1.5
mA
Symbol
Parameter
VIN = 2.4 V or 0.5 V (Note 4)
Guaranteed Limits
Unit
V
V
3. Measured per input. All other inputs at VCC or ground.
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, tr = tf = 6 ns, TA = 25°C unless otherwise specified)
Symbol
Test Conditions
Parameter
Typ.
Guaranteed
Limit
Unit
tPHL, tPLH
Maximum Output Propagation
Delay
CL = 45 pF
16
20
ns
tPZL, tPZH
Maximum Output Enable Time
CL = 45 pF
RL = 1 kQ
29
40
ns
tPLZ, tPHZ
Maximum Output Disable Time
CL = 5 pF
RL = 1 kQ
20
25
ns
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4
MM74HCT245
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±10%, tr = tf = 6 ns, unless otherwise specified)
TA = 25°C
Typ.
TA = –40°C
to 85°C
TA = –55°C
to 125°C
Guaranteed Limits
Symbol
Parameter
tPHL, tPLH
Maximum Output Propagation Delay
CL = 50 pF
17
23
29
34
CL = 150 pF
24
30
38
45
tPZL
Maximum Output Enable Time
RL = 1 kQ
CL = 50 pF
31
42
53
63
ns
tPZH
Maximum Output Enable Time
RL = 1 kQ
CL = 50 pF
23
33
41
49
ns
tPHZ, tPLZ
Maximum Output Disable Time
RL = 1 kQ
CL = 50 pF
21
30
38
45
ns
tTHL, tTLH
Maximum Output Rise and Fall
Time
CL = 50 pF
8
12
15 NIL
18
ns
Maximum Input Capacitance
−
10
15
15
15
pF
COUT
Maximum Output/Input Capacitance
−
20
25
25
25
pF
CPD
Power Dissipation Capacitance
G = VCC (Note 5)
G = GND
7
100
−
−
−
pF
pF
CIN
Test Conditions
Unit
ns
4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
ORDERING INFORMATION
Package
Shipping†
TSSOP−20 WB,Case, 948E
(Pb−Free)
75 Units / Tube
TSSOP−20 WB, 948AQ
(Pb−Free)
2500 Units / Tape and Reel
MM74HCT245WM
SOIC−20 WB
(Pb−Free)
38 Units / Tube
MM74HCT245WMX
SOIC−20 WB
(Pb−Free)
1000 Units / Tape and Reel
Product Number
MM74HCT245MTC
MM74HCT245MTCX
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−20 WB
CASE 751D−05
ISSUE H
DATE 22 APR 2015
SCALE 1:1
A
20
q
X 45 _
M
E
h
0.25
H
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
11
B
M
D
1
10
20X
B
b
0.25
M
T A
S
B
DIM
A
A1
b
c
D
E
e
H
h
L
q
S
L
A
18X
e
SEATING
PLANE
A1
c
T
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
20
20X
20X
1.30
0.52
20
XXXXXXXXXXX
XXXXXXXXXXX
AWLYYWWG
11
1
11.00
1
XXXXX
A
WL
YY
WW
G
10
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
MILLIMETERS
MIN
MAX
2.35
2.65
0.10
0.25
0.35
0.49
0.23
0.32
12.65
12.95
7.40
7.60
1.27 BSC
10.05
10.55
0.25
0.75
0.50
0.90
0_
7_
98ASB42343B
SOIC−20 WB
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−20 WB
CASE 948E
ISSUE D
DATE 17 FEB 2016
SCALE 2:1
20X
0.15 (0.006) T U
2X
L
K REF
0.10 (0.004)
S
L/2
20
M
T U
S
V
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
K
K1
S
J J1
11
B
SECTION N−N
−U−
PIN 1
IDENT
0.25 (0.010)
N
1
10
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
G
D
H
DETAIL E
0.100 (0.004)
−T− SEATING
PLANE
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
--1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
--0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
7.06
XXXX
XXXX
ALYWG
G
1
0.65
PITCH
16X
0.36
16X
1.26
DOCUMENT NUMBER:
98ASH70169A
DESCRIPTION:
TSSOP−20 WB
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP20, 4.4x6.5
CASE 948AQ−01
ISSUE A
DATE 19 MAR 2009
b
SYMBOL
MIN
NOM
MAX
A
E1
E
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
6.50
6.60
E
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.65 BSC
e
L
0.45
0.75
1.00 REF
L1
θ
0.60
0º
8º
e
TOP VIEW
D
c
A2
A θ1
L
A1
SIDE VIEW
END VIEW
L1
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34453E
TSSOP20, 4.4X6.5
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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