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MM74HCU04
Hex Inverter
Features
General Description
■ Typical propagation delay: 7ns
The MM74HCU04 inverters utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of standard CMOS integrated circuits.
■ Fanout of 15 LS-TTL loads
■ Quiescent power consumption: 10µA maximum at
room temperature
Low
input current: 1µA maximum
■
The MM74HCU04 is an unbuffered inverter. It has high
noise immunity and the ability to drive 15 LS-TTL loads.
The 74HCU logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by
internal diode clamps to VCC and ground.
Ordering Information
Package
Number
Package Description
MM74HCU04M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HCU04SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Order Number
MM74HCU04MTC
MM74HCU04N
MTC14
N14A
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1983 Fairchild Semiconductor Corporation
MM74HCU04 Rev. 1.4.0
www.fairchildsemi.com
MM74HCU04 — Hex Inverter
February 2008
MM74HCU04 — Hex Inverter
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Schematic Diagram
©1983 Fairchild Semiconductor Corporation
MM74HCU04 Rev. 1.4.0
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
VCC
Supply Voltage
VIN
DC Input Voltage
–1.5 to VCC+1.5V
DC Output Voltage
–0.5 to VCC+0.5V
VOUT
IIK, IOK
–0.5 to +7.0V
Clamp Diode Current
±20mA
IOUT
DC Output Current, per pin
±25mA
ICC
DC VCC or GND Current, per pin
±50mA
TSTG
PD
Storage Temperature Range
–65°C to +150°C
Power Dissipation
Note 2
600mW
S.O. Package only
TL
500mW
Lead Temperature (Soldering 10 seconds)
260°C
Notes:
1. Unless otherwise specified all voltages are referenced to ground.
2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC
VIN, VOUT
TA
Parameter
Min.
Max.
Units
Supply Voltage
2
6
V
DC Input or Output Voltage
0
VCC
V
–40
+85
°C
Operating Temperature Range
©1983 Fairchild Semiconductor Corporation
MM74HCU04 Rev. 1.4.0
www.fairchildsemi.com
3
MM74HCU04 — Hex Inverter
Absolute Maximum Ratings(1)
TA = –40°C
to 85°C
TA = 25°C
Symbol
VIH
VIL
VOH
VOL
Parameter
VCC (V)
Conditions
Typ.
TA = –55°C
to 125°C
Guaranteed Limits
Minimum HIGH
Level Input
Voltage
2.0
1.7
1.7
1.7
4.5
3.6
3.6
3.6
6.0
4.8
4.8
4.8
Maximum LOW
Level Input
Voltage
2.0
0.3
0.3
0.3
4.5
0.8
0.8
0.8
6.0
1.1
1.1
1.1
2.0
1.8
1.8
1.8
4.5
4.0
4.0
4.0
6.0
5.5
5.5
5.5
Minimum HIGH
Level Output
Voltage
Maximum LOW
Level Output
Voltage
2.0
4.5
VIN = VIL,
|IOUT| ≤ 20µA
6.0
4.5
VIN = GND,
|IOUT| ≤ 4.0mA
4.2
3.98
3.84
3.7
6.0
VIN = GND,
|IOUT| ≤ 5.2mA
5.7
5.48
5.34
5.2
2.0
VIN = VIH,
|IOUT| ≤ 20µA
0
0.2
0.2
0.2
0
0.5
0.5
0.5
0
0.5
0.5
0.5
4.5
6.0
4.5
VIN = VCC,
|IOUT| ≤ 6.0mA
0.2
0.26
0.33
0.4
6.0
VIN = VCC,
|IOUT| ≤ 7.8mA
0.2
0.26
0.33
0.4
Units
V
V
V
V
IIN
Maximum Input
Current
6.0
VIN = VCC or GND
±0.1
±1.0
±1.0
µA
ICC
Maximum
Quiescent
Supply Current
6.0
VIN = VCC or GND,
IOUT = 0µA
2.0
20
40
µA
Note:
3. For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V
values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V
respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at
the higher voltage and so the 6.0V values should be used.
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns
Symbol
Parameter
Conditions
tPHL, tPLH Maximum Propagation Delay
©1983 Fairchild Semiconductor Corporation
MM74HCU04 Rev. 1.4.0
Typ.
Guaranteed
Limit
Units
7
13
ns
www.fairchildsemi.com
4
MM74HCU04 — Hex Inverter
DC Electrical Characteristics
TA=25°C
Symbol
tPHL, tPLH
tTLH, tTHL
Parameter
Conditions VCC (V) Typ.
Maximum Propagation
Delay
Maximum Output Rise
and Fall Time
CPD
Power Dissipation
Capacitance(4)
CIN
Maximum Input
Capacitance
(per gate)
TA = –40°C
to 85°C
TA –55°C
to 125°C
Guaranteed Limits
Units
2.0
49
82
103
120
4.5
9.9
16
21
24
6.0
8.4
14
18
20
2.0
30
75
95
110
4.5
8
15
19
22
6.0
7
13
16
19
90
8
ns
ns
pF
15
15
15
pF
Note:
4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic
current consumption, IS = CPD VCC f + ICC.
Typical Applications
Figure 1. Crystal Oscillator
Figure 2. Stable RC Oscillator
Figure 3. Schmitt Trigger
©1983 Fairchild Semiconductor Corporation
MM74HCU04 Rev. 1.4.0
www.fairchildsemi.com
5
MM74HCU04 — Hex Inverter
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50pF, tr = tf = 6ns (unless otherwise specified)
0.65
A
0.43TYP
14
8
B
6.4
6.10
3.2
1
PIN#1 IDENT
0.2 C B A
7
TOP VIEW
1.65
ALL LEAD TIPS
0.45
RECOMMENDED LAND PATTERN
1.2 MAX
0.30
0.19
ALL LEAD TIPS
0.1 C
0.65
SEE DETAIL A
0.90+0.15
-0.10
0.13
A B
0.20
0.09
C
C
FRONT VIEW
0.09 MIN
NOTES:
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
GAGE PLANE
0.09 MIN
1.00
0.25
SEATING PLANE
DETAIL A
8.75
8.50
A
7.62
14
8
14
B
0.65
8
4.00
3.80
6.00
1
PIN #1
IDENT.
1.27
(0.33)
TOP VIEW
5.60
7
0.51
0.35
0.25 M C B A
1.75 MAX
1.70
1
1.27
LAND PATTERN RECOMMENDATION
A
C
1.50
1.25
FRONT VIEW
0.25
0.10
0.50
0.25 x 45
R0.10
GAGE
PLANE
R0.10
0.36
8°
0°
0.90
0.50
(1.04)
0.10 C
0.25
0.19
SIDE VIEW
NOTES:
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
SEATING PLANE
DETAIL A
SCALE 16 : 1
7
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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