MSD1819A- RT1 General Purpose Amplifier Transistor
NPN Silicon Surface Mount
This NPN Silicon Epitaxial Planar Transistor is designed for general purpose amplifier applications. This device is housed in the SC-70/SOT-323 package which is designed for low power surface mount applications.
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COLLECTOR 3
High hFE, 210 - 460 Low VCE(sat), < 0.5 V Moisture Sensitivity Level 1 ESD Protection: Human Body Model > 4000 V Machine Model > 400 V These Devices are Pb--Free, Halogen Free/BFR Free and are RoHS Compliant
MAXIMUM RATINGS (TA = 25C)
Rating Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current -- Continuous Collector Current -- Peak Symbol V(BR)CBO V(BR)CEO V(BR)EBO IC IC(P) Value 60 50 7.0 100 200 Unit Vdc Vdc Vdc mAdc mAdc
1 BASE
2 EMITTER
3 1 2 SC-70 (SOT-323) CASE 419 STYLE 3
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic Power Dissipation (Note 1) Junction Temperature Storage Temperature Range Symbol PD TJ Tstg Max 150 150 --55 to +150 Unit mW C C 1
ZR M G G
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum recommended footprint.
ZR = Device Code M = Date Code* G = Pb--Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location.
ORDERING INFORMATION
Device MSD1819A--RT1G Package SC--70/ SOT--323 (Pb--Free) Shipping† 3000/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2010
October, 2010 - Rev. 7 -
1
Publication Order Number: MSD1819A-RT1/D
MSD1819A-RT1
ELECTRICAL CHARACTERISTICS
Characteristic Collector-Emitter Breakdown Voltage (IC = 2.0 mAdc, IB = 0) Collector-Base Breakdown Voltage (IC = 10 mAdc, IE = 0) Emitter-Base Breakdown Voltage (IE = 10 mAdc, IE = 0) Collector-Base Cutoff Current (VCB = 20 Vdc, IE = 0) Collector-Emitter Cutoff Current (VCE = 10 Vdc, IB = 0) DC Current Gain (Note 2) (VCE = 10 Vdc, IC = 2.0 mAdc) (VCE = 2.0 Vdc, IC = 100 mAdc) Collector-Emitter Saturation Voltage (Note 2) (IC = 100 mAdc, IB = 10 mAdc) 2. Pulse Test: Pulse Width 300 ms, D.C. 2%. Symbol V(BR)CEO V(BR)CBO V(BR)EBO ICBO ICEO hFE1 hFE2 VCE(sat) Min 50 60 7.0 --210 90 -Max ---0.1 0.1 340 -0.5 Unit Vdc Vdc Vdc mA mA --
Vdc
250 VCE(sat), COLLECTOR--EMITTER SATURATION VOLTAGE (V) PD, POWER DISSIPATION (mW) 200 150 100 50 0 --50 RθJA = 833C/W
0.30 IC/IB = 10 0.25 0.20 0.15 0.10 0.05 0 25C 150C
--55C
0
50
100
150
0.0001
0.001
0.01
0.1
1
TA, AMBIENT TEMPERATURE (C)
IC, COLLECTOR CURRENT (A)
Figure 1. Derating Curve
450 400 hFE, DC CURRENT GAIN 350 300 250 200 150 100 50 0 0.0001 0.001 0.01 0.1 1 --55C (10 V) --55C (2 V)
Figure 2. Collector Emitter Saturation Voltage vs. Collector Current
VBE(sat), BASE--EMITTER SATURATION VOLTAGE (V) 0.95 0.85 0.75 0.65 0.55 0.45 0.35 0.25 0.0001 0.001 0.01 0.1 1 150C IC/IB = 10 --55C 25C
150C (10 V) 150C (2 V) 25C (10 V) 25C (2 V)
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 3. DC Current Gain vs. Collector Current
Figure 4. Base Emitter Saturation Voltage vs. Collector Current
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MSD1819A-RT1
VBE(on), BASE--EMITTER TURN ON VOLTAGE (V)
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.0001 0.001 0.01 0.1 1 150C 25C --55C
VCE, COLLECTOR--EMITTER VOLTAGE (V)
1.2 1.0
1 mA 10 mA 50 mA
TA = 25C IC = 100 mA
0.8 0.6 0.4 0.2 0 500 mA 0.000001 0.00001 0.0001 0.001 0.01 IB, BASE CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 5. Base Emitter Turn-On Voltage vs. Collector Current
Cobo, OUTPUT CAPACITANCE (pF) 18 17 16 15 14 13 12 11 10 9 8 7 Cibo (pF) 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0
Figure 6. Collector Saturation Region
Cibo, INPUT CAPACITANCE (pF)
Cobo (pF)
0
1
2
3
4
5
6
0
5
10
15
20
25
30
35
40
Veb, EMITTER BASE VOLTAGE (V)
Vcb, COLLECTOR BASE VOLTAGE (V)
Figure 7. Input Capacitance
Figure 8. Output Capacitance
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MSD1819A-RT1
PACKAGE DIMENSIONS
SC-70 (SOT-323) CASE 419--04 ISSUE N
D e1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A A1 A2 b c D E e e1 L HE MIN 0.80 0.00 0.30 0.10 1.80 1.15 1.20 0.20 2.00 MILLIMETERS NOM MAX 0.90 1.00 0.05 0.10 0.70 REF 0.35 0.40 0.18 0.25 2.10 2.20 1.24 1.35 1.30 1.40 0.65 BSC 0.38 0.56 2.10 2.40 MIN 0.032 0.000 0.012 0.004 0.071 0.045 0.047 0.008 0.079 INCHES NOM 0.035 0.002 0.028 REF 0.014 0.007 0.083 0.049 0.051 0.026 BSC 0.015 0.083 MAX 0.040 0.004 0.016 0.010 0.087 0.053 0.055 0.022 0.095
3
HE
1 2
E
b e
A 0.05 (0.002) A1
A2 L
c
STYLE 3: PIN 1. BASE 2. EMITTER 3. COLLECTOR
SOLDERING FOOTPRINT*
0.65 0.025 0.65 0.025
1.9 0.075 0.9 0.035 0.7 0.028
SCALE 10:1
mm inches
*For additional information on our Pb--Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MSD1819A-RT1/D