NBXSBB024LN1TAG

NBXSBA024, NBXSBB024, NBXMBA024 2.5 V / 3.3 V, 622.08 MHz LVPECL Clock Oscillator The single frequency, crystal oscillator (XO) is designed to meet today’s requirements for 2.5 V / 3.3 V LVPECL clock generation applications. The device uses a high Q fundamental crystal and Phase Lock Loop (PLL) multiplier to provide 622.08 MHz, ultra low jitter and phase noise LVPECL differential output. This device is a member of ON Semiconductor’s PureEdget clock family that provides accurate and precision clock solutions. Frequency stability options available as either ± 50 PPM NBXSBA024/NBXMBA024 (Industrial Temperature Range) or ±20 PPM NBXSBB024 (Commercial Temperature Range). Available in 5 mm x 7 mm SMD (CLCC) package on 16 mm tape and reel in quantities of 1,000 and 100. Features http://onsemi.com MARKING DIAGRAM NBXyBx024 622.0800 AAWLYYWWG 6 PIN CLCC LN SUFFIX CASE 848AB • • • • • • • • • LVPECL Differential Output Uses High Q Fundamental Mode Crystal and PLL Multiplier Ultra Low Jitter and Phase Noise − 0.5 ps (12 kHz − 20 MHz) Output Frequency − 622.08 MHz Hermetically Sealed Ceramic SMD Package RoHS Compliant Operating Range: 2.5 V ±5% or 3.3 V ±10% Total Frequency Stability − ±20 PPM; ±50 PPM This is a Pb−Free Device NBXSBx024 = Specific Device Code x = A or B y = S or M = NBXSBA024 (±50 PPM) = NBXSBB024 (±20 PPM) 622.0800 = Output Frequency (MHz) AA = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package ORDERING INFORMATION Device NBXSBA024LN1TAG NBXSBB024LN1TAG* NBXSBA024LNHTAG Package CLCC−6 (Pb−Free) CLCC−6 (Pb−Free) CLCC−6 (Pb−Free) CLCC−6 (Pb−Free) CLCC−6 (Pb−Free) Shipping† 1000/ Tape & Reel 1000/ Tape & Reel 100/ Tape & Reel 1000/ Tape & Reel 100/ Tape & Reel Applications • SONET Line Card • Networking • Optical Systems VDD 6 CLK CLK 54 NBXMBA024LN1TAG NBXMBA024LNHTAG Crystal PLL Clock Multiplier 1 OE NC* 2 NC OE* 3 GND †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. * Please contact sales office for availability *NBXMBA024 device pintout Figure 1. Simplified Logic Diagram © Semiconductor Components Industries, LLC, 2009 October, 2009 − Rev. 3 1 Publication Order Number: NBXSBA024/D NBXSBA024, NBXSBB024, NBXMBA024 OE NC GND 1 2 3 6 5 4 VDD CLK CLK NC OE GND 1 2 3 6 5 4 VDD CLK CLK NBXSxxxxx NBXMxxxxx Figure 2. Pin Connections (Top View) Table 1. PIN DESCRIPTION ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á Á Á Á Á ÁÁÁ ÁÁÁÁ ÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁ ÁÁÁÁ Á ÁÁ 1 2 3 4 5 6 OE/NC* NC/OE* GND CLK CLK VDD LVTTL/LVCMOS Control Input N/A Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. See OE pin description Table 2. No Connect. Ground 0 V Power Supply LVPECL Output LVPECL Output Power Supply Non−Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to VTT = VDD − 2 V. Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to VTT = VDD − 2 V. Positive power supply voltage. Voltage should not exceed 2.5 V ±5% or 3.3 V ±10%. *NBXMBA024 device pinout Pin No. Symbol I/O Description Table 2. OUTPUT ENABLE TRI−STATE FUNCTION OE Pin Open HIGH Level LOW Level Active Active High Z Output Pins Table 3. ATTRIBUTES Characteristic Internal Default State Resistor ESD Protection Human Body Model Machine Model Value 170 kW 2 kV 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol VDD Iout TA Tstg Tsol Parameter Positive Power Supply LVPECL Output Current Operating Temperature Range Storage Temperature Range Wave Solder See Figure 5 Condition 1 GND = 0 V Continuous Surge Condition 2 Rating 4.6 25 50 −40 to +85 −55 to +120 260 Units V mA °C °C °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 NBXSBA024, NBXSBB024, NBXMBA024 Table 5. DC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 2) Symbol IDD VIH VIL IIH IIL VOH VOL VOUTPP Characteristic Power Supply Current OE Input HIGH Voltage OE Input LOW Voltage Input HIGH Current Input LOW Current Output HIGH Voltage Output LOW Voltage Output Voltage Amplitude OE OE 2000 GND − 300 −100 −100 VDD−1195 VDD−1945 700 Conditions Min. Typ. 95 Max. 105 VDD 800 +100 +100 VDD−945 VDD−1600 Units mA mV mV mA mA mV mV mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 4. Table 6. AC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 3) Symbol fCLKOUT Df Characteristic Output Clock Frequency Frequency Stability NBXSBB024 NBXSBA024, NBXMBA024 Phase−Noise Performance fCLKout = 622.08 MHz (See Figure 3) 0°C to +70°C −40°C to +85°C (Note 4) 100 Hz of Carrier 1 kHz of Carrier 10 kHz of Carrier 100 kHz of Carrier 1 MHz of Carrier 10 MHz of Carrier tjit(F) tjitter RMS Phase Jitter Cycle to Cycle, RMS Cycle to Cycle, Peak−to−Peak Period, RMS Period, Peak−to−Peak tOE/OD tDUTY_CYCLE tR tF tstart Output Enable/Disable Time Output Clock Duty Cycle (Measured at Cross Point) Output Rise Time (20% and 80%) Output Fall Time (80% and 20%) Start−up Time Aging 1st Year 1st 45 50 250 250 1 12 kHz to 20 MHz 1000 Cycles 1000 Cycles 10,000 Cycles 10,000 Cycles −88 −108 −115 −116 −122 −149 0.5 1.5 15 1 10 0.7 8 30 4 20 200 55 400 400 5 3 1 Conditions Min. Typ. 622.08 ±20 ±50 Max. Units MHz ppm FNOISE dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz ps ps ps ps ps ns % ps ps ms ppm ppm Every Year After NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 4. 4. Parameter guarantee 10 years aging. Includes initial stability at 25°C, shock, vibration, and first year aging. http://onsemi.com 3 NBXSBA024, NBXSBB024, NBXMBA024 Figure 3. Typical Phase Noise Plot Table 7. RELIABILITY COMPLIANCE ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Shock Mechanical Mechanical Mechanical Mechanical MIL−STD−833, Method 2002, Condition B MIL−STD−833, Method 2003 MIL−STD−202, Method 215 MIL−STD−833, Method 2007, Condition A MIL−STD−833, Method 1011, Condition A Solderability Vibration Solvent Resistance Thermal Shock Environment Environment Moisture Level Sensitivity MSL1 260°C per IPC/JEDEC J−STD−020D Parameter Standard Method http://onsemi.com 4 NBXSBA024, NBXSBB024, NBXMBA024 NBXSBA024 Q Driver Device Q Zo = 50 W 50 W 50 W D Zo = 50 W D Receiver Device VTT VTT = VDD − 2.0 V Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) Temperature (°C) 260 217 temp. 260°C 20 − 40 sec. max. peak 3°C/sec. max. ramp−up 6°C/sec. max. cooling 175 150 pre−heat reflow 60180 sec. 60150 sec. Time Figure 5. Recommended Reflow Soldering Profile http://onsemi.com 5 NBXSBA024, NBXSBB024, NBXMBA024 PACKAGE DIMENSIONS 6 PIN CLCC, 7x5, 2.54P CASE 848AB−01 ISSUE C D 4X A 0.15 C D1 B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. DIM A A1 A2 A3 b D D1 D2 D3 E E1 E2 E3 e H L R SEATING PLANE MIN 1.70 0.08 1.30 6.17 6.66 4.37 4.65 MILLIMETERS NOM MAX 1.80 1.90 0.70 REF 0.36 REF 0.10 0.12 1.40 1.50 7.00 BSC 6.20 6.23 6.81 6.96 5.08 BSC 5.00 BSC 4.40 4.43 4.80 4.95 3.49 BSC 2.54 BSC 1.80 REF 1.27 1.37 0.70 REF TERMINAL 1 INDICATOR E2 H E1 E D2 TOP VIEW A3 0.10 C A A1 SIDE VIEW D3 1 2 3 A2 1.17 C SOLDERING FOOTPRINT* e R E3 1.50 6X 5.06 0.10 C A B 0.05 C 6X b 6 5 4 6X L 2.54 PITCH 1.50 DIMENSION: MILLIMETERS 6X BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PureEdge is a trademark of Semiconductor Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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