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www.onsemi.com
onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
TinyLogic ULP-A Universal
Configurable Logic Gates
NC7SP57, NC7SP58
The NC7SP57 and NC7SP58 are universal configurable logic gates
in tiny footprint packages. The devices are designed to operate
for VCC = 0.9 V to 3.6 V.
www.onsemi.com
Features
•
•
•
•
•
•
•
Designed for 0.9 V to 3.6 V VCC Operation
3.4 ns tPD at 3.3 V (Typ)
Inputs/Outputs Over−Voltage Tolerant up to 3.6 V
IOFF Supports Partial Power Down Protection
Source/Sink 2.6 mA at 3.3 V
Available in SC−88 and MicroPak™ Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
I1
1
6
I2
GND
2
5
VCC
I0
4
3
Y
I1
1
6
I2
GND
2
5
VCC
I0
3
SC−88
4
PIN ASSIGNMENT
CCKK
XYZ
Pin 1
CC
KK
XY
Z
= Specific Device Code
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code
= Assembly Plant Code
MARKING
DIAGRAM
SC−88
DF SUFFIX
CASE 419B−02
XXXMG
G
Y
ORDERING INFORMATION
Pin
SC−88
MicroPak
1
I1
I1
2
GND
GND
3
I0
I0
4
Y
Y
5
VCC
VCC
6
I2
I2
February, 2021 − Rev. 1
SIP6 1.45X1.0
MicroPak
CASE 127EB
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
MicroPak
Figure 1. Pinout Diagrams (Top Views)
© Semiconductor Components Industries, LLC, 2004
MARKING
DIAGRAM
See detailed ordering, marking and shipping information on
page 9 of this data sheet.
1
Publication Order Number:
NC7SP58/D
NC7SP57, NC7SP58
FUNCTION TABLE
NC7SP57
NC7SP58
I2
Inputs
I1
I0
Y = (I0) w (I2) + (I1) w (I2)
Y = (I0) w (I2) + (I1) w (I2)
L
L
L
H
L
L
L
H
L
H
L
H
L
H
L
L
H
H
L
H
H
L
L
L
H
H
L
H
L
H
H
H
L
H
L
H
H
H
H
L
FUNCTION SELECTION TABLE
2−Input Logic Function
Device Selection
Connection Configuration
2−Input AND
NC7SP57
Figure 2
2−Input AND with inverted input
NC7SP58
Figure 8, 9
2−Input AND with both inputs inverted
NC7SP57
Figure 5
2−Input NAND
NC7SP58
Figure 7
2−Input NAND with inverted input
NC7SP57
Figure 3, 4
2−Input NAND with both inputs inverted
NC7SP58
Figure 10
2−Input OR
NC7SP58
Figure 10
2−Input OR with inverted input
NC7SP57
Figure 3, 4
2−Input OR with both inputs inverted
NC7SP58
Figure 7
2−Input NOR
NC7SP57
Figure 5
2−Input NOR with inverted input
NC7SP58
Figure 8, 9
2−Input NOR with both inputs inverted
NC7SP57
Figure 2
2−Input XOR
NC7SP58
Figure 11
2−Input XNOR
NC7SP57
Figure 6
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2
NC7SP57, NC7SP58
Logic Configurations NC7SP57
Figure 2. 2−Input AND Gate
Figure 3. 2−Input NAND with Inverted A Input
Figure 4. 2−Input NAND with Inverted B Input
Figure 5. 2−Input NOR Gate
Figure 6. 2−Input XNOR Gate
NOTE:
Figure 2 through Figure 6 show the logical functions that can be implemented using the NC7SP57. The diagrams show the
DeMorgan’s equivalent logic duals for a given 2−input function. Next to the logical implementation is the board level physical
implementation of how the pins of the function should be connected.
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3
NC7SP57, NC7SP58
Logic Configurations NC7SP58
Figure 8. 2−Input AND with Inverted A Input
Figure 7. 2−Input NAND Gate
Figure 10. 2−Input OR Gate
Figure 9. 2−Input AND with Inverted B Input
Figure 11. 2−Input XOR Gate
NOTE:
Figure 7 through Figure 11 show the logical functions that can be implemented using the NC7SP58. The diagrams show the
DeMorgan’s equivalent logic duals for a given 2−input function. Next to the logical implementation is the board level physical
implementation of how the pins of the function should be connected.
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4
NC7SP57, NC7SP58
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
−0.5 to +4.3
V
VIN
DC Input Voltage
−0.5 to +4.3
V
−0.5 to VCC + 0.5
−0.5 to +4.3
−0.5 to +4.3
V
VIN < GND
−50
mA
VOUT < GND
−50
mA
VOUT
Characteristics
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 11)
Power−Down Mode (VCC = 0 V)
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IOUT
DC Output Source/Sink Current
±50
mA
DC Supply Current per Supply Pin or Ground Pin
±50
mA
ICC or IGND
TSTG
−65 to +150
°C
TL
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
+150
°C
qJA
Thermal Resistance (Note 12)
SC−88
MicroPak
377
154
°C/W
PD
Power Dissipation in Still Air
SC−88
MicroPak
332
812
mW
Level 1
−
MSL
Moisture Sensitivity
FR
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
−
ESD Withstand Voltage (Note 3)
Human Body Model
Charged Device Model
2000
1000
V
±100
mA
VESD
ILatchup
Latchup Performance (Note 4)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow per JESD51−7.
3. HBM tested to EIA / JESD22−A114−A. CDM tested to JESD22−C101−A. JEDEC recommends that ESD qualification to EIA/JESD22−A115A
(Machine Model) be discontinued.
4. Tested to EIA/JESD78 Class II.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Positive DC Supply Voltage
VIN
DC Input Voltage
VOUT
TA
tr , tf
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 11)
Power−Down Mode (VCC = 0 V)
Operating Temperature Range
Input Transition Rise and Fall Time
Min
Max
Unit
0.9
3.6
V
0
3.6
V
0
0
0
VCC
3.6
3.6
−40
+85
°C
0
No Limit
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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5
NC7SP57, NC7SP58
DC ELECTRICAL CHARACTERISTICS
TA = 255C
Symbol
Parameter
VP
Positive Threshold
Voltage
VN
VH
VOH
Condition
Negative Threshold
Voltage
Hysteresis Voltage
High−Level Output
Voltage
IOH = −20 mA
IOH = −1 mA
Low−Level Output
Voltage
Typ
Max
0.9
−
0.62
1.1
−
1.4
VCC (V)
Min
Max
Unit
−
−
−
V
−
1.0
−
1.0
−
−
1.2
−
1.2
1.65
−
−
1.5
−
1.5
3.0
−
−
1.9
−
1.9
3.0 to 3.6
−
−
2.6
−
2.6
0.9
−
0.34
−
−
−
1.1
0.15
−
−
0.15
−
1.4
0.2
−
−
0.2
−
1.65
0.25
−
−
0.25
−
2.3
0.4
−
−
0.4
−
3.0
0.6
−
−
0.6
−
0.9
−
0.29
−
−
−
1.1
0.08
−
0.6
0.08
0.6
1.4
0.09
−
0.8
0.09
0.8
1.65
0.1
−
1.0
0.1
1.0
2.3
0.25
−
1.1
0.25
1.1
3.0
0.6
−
1.8
0.6
1.8
VIN = VIH or VIL
IOH = −0.5 mA
VOL
TA = −405C to +855C
Min
0.9
−
VCC −
0.1
−
−
−
1.1 to 1.3
VCC − 0.1
−
−
VCC − 0.1
−
1.4 to 1.6
VCC − 0.1
−
−
VCC − 0.1
−
1.65 to 1.95
VCC − 0.1
−
−
VCC − 0.1
−
2.3 to 2.7
VCC − 0.1
−
−
VCC − 0.1
−
3.0 to 3.6
VCC − 0.1
−
−
VCC − 0.1
−
1.1 to 1.3
0.75 x VCC
−
−
0.70 x VCC
−
1.4 to 1.6
1.07
−
−
0.99
−
1.65 to 1.95
1.24
−
−
1.22
−
IOH = −2.1 mA
2.3 to 2.7
1.95
−
−
1.87
−
IOH = −2.6 mA
3.0 to 3.6
2.61
−
−
2.55
−
VIN = VIH or VIL
IOL = 0.5 mA
IOL = 1 mA
V
V
IOH = −1.5 mA
IOL = 20 mA
V
V
0.9
−
0.1
−
−
−
1.1 to 1.3
−
−
0.1
−
0.1
1.4 to 1.6
−
−
0.1
−
0.1
1.65 to 1.95
−
−
0.1
−
0.1
2.3 to 2.7
−
−
0.1
−
0.1
3.0 to 3.6
−
−
0.1
−
0.1
1.1 to 1.3
−
−
0.3 x VCC
−
0.3 x VCC
1.4 to 1.6
−
−
0.31
−
0.37
IOL = 1.5 mA
1.65 to 1.95
−
−
0.31
−
0.35
IOL = 2.1 mA
2.3 to 2.7
−
−
0.31
−
0.33
IOL = 2.6 mA
3.0 to 3.6
−
−
0.31
−
0.33
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6
NC7SP57, NC7SP58
DC ELECTRICAL CHARACTERISTICS (continued)
TA = −405C to +855C
TA = 255C
Symbol
IIN
Parameter
Condition
Input Leakage
Current
VIN = 0 V to 3.6 V
IOFF
Power Off Leakage
Current
VIN = 0 V to 3.6 V or
VOUT = 0 V to 3.6 V
ICC
Quiescent Supply
Current
VIN = VCC or GND
VCC (V)
Min
Typ
Max
Min
Max
Unit
0.9 to 3.6
−
−
±0.1
−
±0.5
mA
0
−
−
0.5
−
0.5
mA
0.9 to 3.6
−
−
0.9
−
0.9
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
TA = 25°C
Symbol
Condition
VCC (V)
RL = 1 MW, CL = 10 pF
0.9
−
54.3
−
−
−
1.10 to 1.30
−
15.1
30.8
−
51.0
1.40 to 1.60
−
8.2
17.0
−
21.0
1.65 to 1.95
−
5.9
14.0
−
17.0
2.3 to 2.7
−
4.0
10.0
−
13.0
3.0 to 3.6
−
3.4
8.0
−
12.0
Parameter
tPLH, tPHL Propagation Delay,
(I0 or I1 or I2) to Y
(Figures 12 and 13)
tPLH, tPHL Propagation Delay,
(I0 or I1 or I2) to Y
(Figures 12 and 13)
tPLH, tPHL Propagation Delay,
(I0 or I1 or I2) to Y
(Figures 12 and 13)
TA = −405C to +855C
Min
RL = 1 MW, CL = 15 pF
Typ
Max
Min
Max
Unit
ns
0.9
−
55.8
−
−
−
1.10 to 1.30
−
15.6
32.1
−
52.0
1.40 to 1.60
−
8.6
18.0
−
22.0
1.65 to 1.95
−
6.3
15.0
−
18.0
2.3 to 2.7
−
4.2
11.0
−
14.0
3.0 to 3.6
−
3.6
9.0
−
12.0
0.9
−
60.2
−
−
−
1.10 to 1.30
−
17.2
33.6
−
55.0
1.40 to 1.60
−
9.9
20.0
−
24.0
1.65 to 1.95
−
7.4
17.0
−
20.0
2.3 to 2.7
−
5.0
12.0
−
15.0
3.0 to 3.6
−
4.1
11.0
−
14.0
RL = 1 MW, CL = 30 pF
ns
ns
CAPACITIVE CHARACTERISTICS
Symbol
CIN
Parameter
Test Condition
Typical (TA = 25°C)
Unit
Input Capacitance
VCC = 0 V
2.0
pF
COUT
Output Capacitance
VCC = 0 V
4.0
pF
CPD
Power Dissipation Capacitance (Note 5)
f = 10 MHz, VCC = 0.9 to 3.6 V, VIN = 0 V or VCC
8.0
pF
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption: PD = CPD VCC2 fin + ICC VCC.
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7
NC7SP57, NC7SP58
OPEN
2 x VCC
GND
R1
INPUT
OUTPUT
DUT
RL
RT
Test
Switch Position
tPLH / tPHL
Open
tPLZ / tPZL
2 x VCC
tPHZ / tPZH
GND
CL *
CL includes probe and jig capacitance
RT is ZOUT of pulse generator (typically 50 W)
f = 1 MHz
Figure 12. Test Circuit
tr = 3 ns
tf = 3 ns
90%
90%
Vmi
INPUT
Vmi
INPUT
Vmi
10%
10%
tPHL
Vmi
GND
GND
tPZL
tPLH
Vmo
OUTPUT
VCC
VCC
tPLZ
VOH
Vmo
OUTPUT
Vmo
VOL + VY
VOL
VOL
tPLH
tPHL
Vmo
OUTPUT
tPZH
VOH
Vmo
~VCC
tPHZ
VOH
VOH − VY
Vmo
OUTPUT
VOL
~0 V
VCC, V
Vmi, V
Vmo, V
VY, V
0.9
VCC / 2
VCC / 2
0.1
1.1 to 1.3
VCC / 2
VCC / 2
0.1
1.4 to 1.6
VCC / 2
VCC / 2
0.1
1.65 to 1.95
VCC / 2
VCC / 2
0.15
2.3 to 2.7
VCC / 2
VCC / 2
0.15
3.0 to 3.6
1.5
1.5
0.3
Figure 13. Switching Waveforms
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8
NC7SP57, NC7SP58
ORDERING INFORMATION
Package
Marking
Pin 1 Orientation
(See below)
Shipping†
NC7SP57P6X
SC−88
P57
Q4
3000 / Tape & Reel
NC7SP57L6X
MicroPak
K9
Q4
5000 / Tape & Reel
NC7SP58P6X
SC−88
P58
Q4
3000 / Tape & Reel
NC7SP58L6X
MicroPak
L3
Q4
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Pin 1 Orientation in Tape and Reel
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9
NC7SP57, NC7SP58
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
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10
NC7SP57, NC7SP58
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H D
D
H
A
D
6
5
GAGE
PLANE
4
1
2
L
L2
E1
E
DETAIL A
3
aaa C
2X
bbb H D
2X 3 TIPS
e
B
6X
b
ddd
TOP VIEW
C A-B D
M
A2
DETAIL A
A
6X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
ccc C
A1
SIDE VIEW
C
SEATING
PLANE
END VIEW
c
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
MILLIMETERS
MIN
NOM MAX
−−−
−−−
1.10
0.00
−−−
0.10
0.70
0.90
1.00
0.15
0.20
0.25
0.08
0.15
0.22
1.80
2.00
2.20
2.00
2.10
2.20
1.15
1.25
1.35
0.65 BSC
0.26
0.36
0.46
0.15 BSC
0.15
0.30
0.10
0.10
INCHES
NOM MAX
−−− 0.043
−−− 0.004
0.035 0.039
0.008 0.010
0.006 0.009
0.078 0.086
0.082 0.086
0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
MIN
−−−
0.000
0.027
0.006
0.003
0.070
0.078
0.045
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
6X
0.66
1
2.50
0.65
PITCH
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
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11
NC7SP57, NC7SP58
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 8:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
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