NC7SVL32L6X

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This literature is subject to all applicable copyright laws and is not for resale in any manner. NC7SVL32 TinyLogic® Low-ICCT Two-Input OR Gate Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ ƒ Power-Off High-Impedance Inputs and Outputs ƒ ƒ Ultra-Small MicroPak™ Packages The NC7SVL32 is a single two-input OR gate with a Low-ICCT input design from Fairchild’s Ultra-Low Power ® (ULP-A) series of TinyLogic . The NC7SVL32 features very low quiescent current, even when the input voltage is lower than the VCC supply. This feature services mobile handset applications very well, allowing for direct interface with baseband processor general-purpose I/Os. Since mobile devices rely on a battery supply, the NC7SVL32 facilitates lower power consumption in mixed-voltage rail environments. 3.6V Over-Voltage Tolerant I/Os at VCC from 0.9V to 3.6V Proprietary Quiet Series™ Noise / EMI Reduction Circuitry Ultra-Low Dynamic Power This product is designed on an advanced CMOS technology for a wide low-voltage operating range (0.9V to 3.6V VCC), high drive needs (up to 24mA), and speed (maximum propagation delay of 3.5ns, VCC=3.3V). It achieves this performance while maintaining low CMOS power dissipation. Ordering Information Part Number Top Mark NC7SVL32P5X L32 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on Tape & Reel NC7SVL32L6X CF 6-Lead MicroPak™, 1.00mm Wide 5000 Units on Tape & Reel NC7SVL32FHX CF 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch 5000 Units on Tape & Reel © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 Package Packing Method www.fairchildsemi.com NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate December 2010 IEEE/IEC A ≥1 B Figure 1. Y Logic Symbol Pin Configurations A 1 B 2 GND 3 5 4 Figure 2. VCC Y SC70 (Top View) A 1 6 VCC B 2 5 NC GND 3 4 Y Figure 3. MicroPak™ (Top Through View) NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate Connection Diagram Pin Definitions Pin # SC70 Pin # MicroPak™ Name 1 1 A Input 2 2 B Input 3 3 GND Ground 4 4 Y Output 5 NC No Connect 6 VCC Supply Voltage 5 Description Function Table Y = A+B Inputs A Output B Y L L L L H H H L H H H H H = HIGH Logic Level L = LOW Logic Level © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 4.6 V VIN DC Input Voltage -0.5 4.6 V -0.5 VCC + 0.5 -0.5 4.6 VOUT IIK DC Input Diode Current IOK DC Output Diode Current IOH / IOL ICC or IGND TSTG HIGH or LOW State DC Output Voltage (1) VCC = 0V VIN < 0V -50 VOUT < 0V -50 VOUT > VCC +50 V mA mA DC Output Source/Sink Current ±50 mA DC VCC or Ground Current per Supply Pin ±50 mA +150 °C TJ Storage Temperature Range Junction Temperature Under Bias -65 +150 °C TL Junction Lead Temperature, Soldering 10 Seconds +260 °C SC70-5 PD ESD Power Dissipation at +85°C 150 MicroPak™-6 130 MicroPak2™-6 120 Human Body Model, JEDEC:JESD22-A114 4000 Charge Device Model, JEDEC:JESD22-C101 2000 mW NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate Absolute Maximum Ratings V Note: 1. IO absolute maximum ratings must be observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter VCC Supply Voltage VIN Input Voltage VOUT IOH/IOL TA Δt/ΔV θJA Output Voltage Output Current in IOH/IOL Conditions Thermal Resistance Max. Unit 0.9 3.6 V V 0 3.6 VCC=0V 0 3.6 HIGH or LOW State 0 VCC VCC=3.0V to 3.6V ±24.0 VCC=2.3V to 2.7V ±18.0 VCC=1.65V to 1.95V ±6.0 VCC=1.4V to 1.6V ±4.0 VCC=1.1V to 1.3V ±2.0 VCC=0.9V ±0.1 Operating Temperature, Free Air Minimum Input Edge Rate Min. -40 V mA +85 °C VIN=0.8V to 2.0, VCC=3.0V 10 ns/V SC70-5 425 MicroPak™-6 500 MicroPak2™-6 560 °C/W Note: 2. Unused inputs must be held HIGH or LOW. They may not float. © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 www.fairchildsemi.com 3 Symbol VIH VIL Parameter HIGH Level Input Voltage LOW Level Input Voltage VCC Conditions TA=25°C Min. Min. .65 x VCC .65 x VCC 1.10 ≤ VCC ≤ 1.30 .65 x VCC .65 x VCC 1.40 ≤ VCC ≤ 1.60 .65 x VCC .65 x VCC 1.65 ≤ VCC ≤ 1.95 0.90 0.90 2.30 ≤ VCC ≤ 2.70 1.50 1.50 2.70 ≤ VCC ≤ 3.60 1.50 1.50 Max. 0.90 .25 x VCC .25 x VCC .25 x VCC .25 x VCC 1.40 ≤ VCC ≤ 1.60 .25 x VCC .25 x VCC 1.65 ≤ VCC ≤ 1.95 .25 x VCC .25 x VCC 2.30 ≤ VCC ≤ 2.70 0.70 0.80 0.80 VCC-0.10 VCC-0.10 1.10 ≤ VCC ≤ 1.30 VCC-0.10 VCC-0.10 1.40 ≤ VCC ≤ 1.60 VCC-0.20 VCC-0.20 VCC-0.20 VCC-0.20 2.30 ≤ VCC ≤ 2.70 VCC-0.20 VCC-0.20 2.70 ≤ VCC ≤ 3.60 VCC-0.20 VCC-0.20 1.10 ≤ VCC ≤ 1.30 IOH=-2mA .75 x VCC .75 x VCC 1.40 ≤ VCC ≤ 1.60 IOH=-4mA .75 x VCC .75 x VCC 1.65 ≤ VCC ≤ 1.95 2.30 ≤ VCC ≤ 2.70 2.30 ≤ VCC ≤ 2.70 2.70 ≤ VCC ≤ 3.60 2.30 ≤ VCC ≤ 2.70 2.70 ≤ VCC ≤ 3.60 2.70 ≤ VCC ≤ 3.60 IOH=-6mA IOH=-12mA IOH=-18mA IOH=-24mA 1.25 1.25 2.00 2.00 1.80 1.80 2.20 2.20 1.70 1.70 2.40 2.40 2.20 V 0.70 0.90 IOH=-100µA Units V 1.10 ≤ VCC ≤ 1.30 1.65 ≤ VCC ≤ 1.95 HIGH Level Output Voltage Max. 0.90 2.70 ≤ VCC ≤ 3.60 VOH TA=-40 to +85°C NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate DC Electrical Characteristics V 2.20 Continued on the following page… © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 www.fairchildsemi.com 4 Symbol Parameter VCC LOW Level Output Voltage Min. Max. 0.1 0.1 1.40 ≤ VCC ≤ 1.60 0.2 0.2 0.2 0.2 2.30 ≤ VCC ≤ 2.70 0.2 0.2 2.70 ≤ VCC ≤ 3.60 0.2 0.2 1.10 ≤ VCC ≤ 1.30 IOL=2mA 0.25 x VCC 0.25 x VCC 1.40 ≤ VCC ≤ 1.60 IOL=4mA 0.25 x VCC 0.25 x VCC 1.65 ≤ VCC ≤ 1.95 IOL=6mA 0.30 0.3 2.30 ≤ VCC ≤ 2.70 0.40 0.40 0.40 0.40 0.60 0.60 0.40 0.40 0.55 0.55 0 ≤ VIN ≤ 3.60V ±0.1 ±0.5 µA 0 ≤ (VIN, VO) ≤ 3.60V 0.5 0.5 µA VIN=VCC, or GND 0.9 0.9 IOL=100µA IOL=12mA IOL=18mA 2.70 ≤ VCC ≤ 3.60 IOL=24mA Power Off Leakage Current ICC Quiescent Supply Current ICCT Increase in ICC per Input Units 1.10 ≤ VCC ≤ 1.30 2.70 ≤ VCC ≤ 3.60 IOFF Max. 0.1 2.30 ≤ VCC ≤ 2.70 IIN Min. 0.1 2.70 ≤ VCC ≤ 3.60 Input Leakage Current TA=-40 to +85°C 0.90 1.65 ≤ VCC ≤ 1.95 VOL TA=25°C Conditions 0.90 to 3.60 0 0.90 to 3.60 VCC ≤ VIN ≤ 3.60V ±0.9 1.95 VIN=0.9V 6 8 3.60 VIN=1.5V 6 8 V NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate DC Electrical Characteristics (Continued) µA µA AC Electrical Characteristics Symbol Parameter Conditions 0.90 CL=15pF, RL=1MΩ 1.10 ≤ VCC ≤ 1.30 tPHL, tPLH Propagation Delay TA=25°C VCC 1.40 ≤ VCC ≤ 1.60 Min. 1.65 ≤ VCC ≤ 1.95 2.30 ≤ VCC ≤ 2.70 CL=30pF, RL=500Ω 2.70 ≤ VCC ≤ 3.60 CIN Input Capacitance 0 CPD Power Dissipation Capacitance 0.90 to 3.60 © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 VIN=0V or VCC, f=10MHz Max. Min. Max. 17.0 3.0 30.5 Units Figure 42.0 3.5 CL=15pF, RL=2kΩ Typ. TA=-40 to 85°C 8.2 1.5 4.0 7.0 1.5 7.5 1.1 3.2 5.5 1.0 6.0 0.6 2.3 4.0 0.6 4.5 0.5 1.9 3.5 0.5 4.0 ns 3 pF 5 pF Figure 4 Figure 5 www.fairchildsemi.com 5 NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate AC Loadings and Waveforms Figure 4. AC Test Circuit Figure 5. AC Waveforms VCC Symbol 3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V 1.5V ± 0.1V 1.2V ± 0.1V 0.9V Vmi 1.5V VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 Vmo 1.5V VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 www.fairchildsemi.com 6 NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate Physical Dimensions Figure 6. 5-Lead, SC70, EIAJ SC-88a, 1.25mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf. Package Designator P5X © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 7 NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.254) (0.49) 5X 1.00 (0.75) PIN 1 IDENTIFIER 5 (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 0.25 0.15 6X 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER (0.13) 4X BOTTOM VIEW Notes: 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 4. FILENAME AND REVISION: MAC06AREV4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. Figure 7. 6-Lead, MicroPak™, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator L6X © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 8 NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate Physical Dimensions 0.89 0.35 0.05 C 1.00 2X B A 5X 0.40 PIN 1 MIN 250uM 0.66 1.00 1X 0.45 6X 0.19 0.05 C TOP VIEW RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 2X 0.90 0.05 C 0.35 0.55MAX C 5X 0.52 SIDE VIEW 0.73 (0.08) 4X 1 DETAIL A 2 1X 0.57 0.09 0.19 6X 3 0.20 6X ALTERNATIVE LAND PATTERN FOR UNIVERSAL APPLICATION (0.05) 6X 5X 0.35 0.25 6 5 4 0.35 0.60 (0.08) 4X 0.10 .05 C C B A 0.40 0.30 BOTTOM VIEW NOTES: A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REVISION: MGF06AREV3 Figure 8. 0.075X45° CHAMFER DETAIL A PIN 1 LEAD SCALE: 2X 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf. Package Designator FHX © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 9 NC7SVL32 — TinyLogic® Low-ICCT Two-Input OR Gate © 2008 Fairchild Semiconductor Corporation NC7SVL32 • Rev. 1.0.4 www.fairchildsemi.com 10 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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