NC7WZ02
TinyLogic UHS Dual
2-Input NOR Gate
Description
T h e N C 7 W Z 0 2 i s a d u a l 2 −I n p u t N O R G a t e f r o m
ON Semicoductor’s Ultra High Speed Series of TinyLogic. The
device is fabricated with advanced CMOS technology to achieve ultra
high speed with high output drive while maintaining low static power
dissipation over a very broad VCC operating range. The device is
specified to operate over the 1.65 V to 5.5 V VCC range. The inputs
and output are high impedance when VCC is 0 V. Inputs tolerate
voltages up to 6.5 V independent of VCC operating voltage.
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MARKING
DIAGRAMS
UQFN8
1.6X1.6, 0.5P
CASE 523AY
Features
•
•
•
•
•
•
•
•
•
•
Space Saving US8 Surface Mount Package
MicroPak™ Pb−Free Leadless Package
Ultra High Speed: tPD 2.4 ns Typ. into 50 pF at 5 V VCC
High Output Drive: ±24 mA at 3 V VCC
Broad VCC Operating Range: 1.65 V to 5.5 V
Matches the Performance of LCX when Operated at 3.3 V VCC
Power Down High Impedance Inputs / Output
Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation
Proprietary Noise / EMI Reduction Circuitry Implemented
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
US8
CASE 846AN
P5, WZ02
KK
XY
Z
P5KK
XYZ
XYKK
WZ02
ON Z
= Specific Device Code
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
IEEE/IEC
A1
B1
≥1
A2
B2
Y1
Y2
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 2006
August, 2019 − Rev. 2
1
Publication Order Number:
NC7WZ02/D
NC7WZ02
Connection Diagrams
A1
1
8
VCC
A1
7
B1
2
7
Y1
Y2
3
6
B2
GND
4
5
A2
Y2
5
VCC 8
4 GND
1
Y1
2
B2
3
A2
Figure 4. Pad Assignments for MicroPak
(Top Through View)
Figure 2. Pin Assignment for US8
(Top View)
(Top View)
B1
6
AAA
Pin One
AAA represents Product Code Top Mark − see ordering code
NOTE:
Orientation of Top Mark determines Pin One location.
Read the top product code mark left to right, Pin One
is the lower left pin (see diagram).
Figure 3. US8 Pin One Orientation Diagram
PIN DESCRIPTION
FUNCTION TABLE (Y = A + B)
Pin Names
Description
Output
Inputs
An, Bn
Inputs
A
B
Y
Yn
Output
L
L
H
L
H
L
H
L
L
H
H
L
H = HIGH Logic Level
L = LOW Logic Level
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2
NC7WZ02
ABSOLUTE MAXIMUM RATINGS
Symbol
Min
Max
Unit
VCC
Supply Voltage
−0.5
6.5
V
VIN
DC Input Voltage
−0.5
6.5
V
DC Output Voltage
−0.5
6.5
V
VOUT
Parameter
IIK
DC Input Diode Current
VIN ≤ −0.5 V
−
−50
mA
IOK
DC Output Diode Current
VOUT ≤ −0.5 V
−
−50
mA
IOUT
DC Output Current
−
±50
mA
DC VCC / GND Current
−
±100
mA
−65
+150
°C
ICC / IGND
TSTG
Storage Temperature
TJ
Junction Temperature under Bias
−
150
°C
TL
Junction Lead Temperature (Soldering, 10 Seconds)
−
260
°C
PD
Power Dissipation @ +85°C
−
250
mW
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VIN
VOUT
Parameter
Min
Max
Unit
Supply Voltage Operating
1.65
5.5
V
Supply Voltage Data Retention
1.5
5.5
Input Voltage
0
5.5
V
Output Voltage
0
VCC
V
−40
+85
°C
VCC @ 1.8 V ±0.15 V, 2.5 V ±0.2 V
0
20
ns/V
VCC @ 3.3 V ±0.3 V
0
10
VCC @ 5.0 V ±0.5 V
0
5
−
250
TA
Operating Temperature
tr, tf
Input Rise and Fall Time
qJA
Thermal Resistance
°C/W
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
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3
NC7WZ02
DC ELECTICAL CHARACTERISTICS
TA = +25°C
Symbol
VIH
Parameter
Conditions
HIGH Level Input Voltage
VCC (V)
Min
1.65 to 1.95 0.65 VCC
TA = −40 to +85°C
Typ
Max
Min
Max
Unit
−
−
0.65 VCC
−
V
2.3 to 5.5
0.70 VCC
−
−
0.70 VCC
−
1.65 to 1.95
−
−
0.35 VCC
−
0.35 VCC
2.3 to 5.5
−
−
0.30 VCC
−
0.30 VCC
1.65
1.55
1.65
−
1.55
−
2.3
2.2
2.3
−
2.2
−
3.0
2.9
3.0
−
2.9
−
4.5
4.4
4.5
−
4.4
−
IOH = −4 mA
1.65
1.29
1.52
−
1.29
−
IOH = −8 mA
2.3
1.9
2.15
−
1.9
−
IOH = −16 mA
3.0
2.4
2.80
−
2.4
−
IOH = −24 mA
3.0
2.3
2.68
−
2.3
−
IOH = −32 mA
4.5
3.8
4.20
−
3.8
−
VIN = VIH,
IOL = 100 mA
1.65
−
0.0
0.1
−
0.1
2.3
−
0.0
0.1
−
0.1
3.0
−
0.0
0.1
−
0.1
4.5
−
0.0
0.1
−
0.1
IOL = 4 mA
1.65
−
0.08
0.24
−
0.24
IOL = 8 mA
2.3
−
0.10
0.3
−
0.3
IOL = 16 mA
3.0
−
0.15
0.4
−
0.4
IOL = 24 mA
3.0
−
0.22
0.55
−
0.55
IOL = 32 mA
4.5
−
0.22
0.55
−
0.55
Input Leakage Current
VIN = 5.5 V,
GND
1.65 to 5.5
−
−
±0.1
−
±1.0
mA
IOFF
Power Off Leakage Current
VIN or
VOUT = 5.5 V
0.0
−
−
1
−
10
mA
ICC
Quiescent Supply Current
VIN = 5.5 V,
GND
1.65 to 5.5
−
−
1
−
10
mA
VIL
VOH
VOL
IIN
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
VIN = VIL,
IOH = −100 mA
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4
V
V
V
NC7WZ02
AC ELECTRICAL CHARACTERISTICS
TA = +25°C
Symbol
Parameter
tPLH, tPHL Propagation Delay
(Figure 5, 7)
RL = 1 MW,
CL = 15 pF
Min
Typ
Max
Min
Max
Unit
1.8 ±0.15
−
5.4
9.8
−
10
ns
2.5 ±0.2
−
3.3
5.4
−
5.8
3.3 ±0.3
−
2.5
3.8
−
4.1
5.0 ±0.5
−
2.0
3.0
−
3.3
3.3 ±0.3
−
3.1
4.6
−
5.0
5.0 ±0.5
−
2.4
3.7
−
4.0
0
−
2.5
−
−
−
pF
3.3
−
13.5
−
−
−
pF
5.0
−
17.5
−
−
−
RL = 500 W,
CL = 50 pF
CIN
Input Capacitance
CPD
Power Dissipation Capacitance
(Figure 6)
TA = −40 to +85°C
VCC (V)
Conditions
(Note 2)
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at
no output loading and operating at 50% duty cycle. (see Figure 6) CPD is related to ICCD dynamic operating current by the expression:
CPD = ICCD / (VCC) (F).
AC Loading and Waveforms
VCC
VCC
A
INPUT
OUTPUT
CL *
INPUT
RL
* CL includes load and stray capacitance
Input PRR = 1.0 MHz, tW = 500 ns
Input = AC Waveform; tr = tf = 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%.
Figure 6. ICCD Test Circuit
Figure 5. AC Test Circuit
tFALL = 3 ns
tRISE = 3 ns
VCC
90%
INPUT
90%
50%
GND
50%
10%
10%
tPLH
tPHL
VOH
OUTPUT
50%
50%
VOL
Figure 7. AC Waveforms
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5
NC7WZ02
ORDERING INFORMATION
Top Mark
Package
Shipping†
NC7WZ02K8X
WZ02
8−Lead US8, JEDEC MO−187, Variation CA
3.1 mm Wide
3000 / Tape & Reel
NC7WZ02L8X
P5
8−Lead MicroPak, 1.6 mm Wide
5000 / Tape & Reel
Order Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
3. Pb−Free package per JEDEC J−STD−020B.
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UQFN8 1.6X1.6, 0.5P
CASE 523AY
ISSUE O
0.05
C
A
1.60
DATE 31 AUG 2016
0.40
(6X)
1.60
B
0.45
(2X)
2X
1.60
TOP VIEW
PIN#1 IDENT
0.05
1.61
C
0.50
RECOMMENDED
LAND PATTERN
0.50±0.05
0.05
C
0.05
C
0.25
(8X)
NOTES:
SEATING
PLANE
0.025±0.025
A. PACKAGE CONFORMS TO JEDEC MO−255
VARIATION UAAD.
C
B. DIMENSIONS ARE IN MILLIMETERS.
SIDE VIEW
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
1.60±0.05
(0.10)
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
(0.20)3X
DETAIL A
1
2
3
(0.20)
(0.09)
4
8
1.60±0.05
0.30±0.05
0.30±0.05 (7X)
7
6
5
0.50
1.00±0.05
(0.15)
0.20±0.05 (8X)
BOTTOM VIEW
DOCUMENT NUMBER:
DESCRIPTION:
98AON13591G
UQFN8 1.6X1.6, 0.5P
0.30±0.05
0.10
C
0.05
C
A
B
DETAIL A
SCALE : 2X
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
US8
CASE 846AN
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13778G
US8
DATE 31 DEC 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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1
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