NCP1203GEVB

NCP1200 PWM Current-Mode Controller for Low-Power Universal Off-Line Supplies Housed in SOIC−8 or PDIP−8 package, the NCP1200 represents a major leap toward ultra−compact Switchmode Power Supplies. Due to a novel concept, the circuit allows the implementation of a complete offline battery charger or a standby SMPS with few external components. Furthermore, an integrated output short−circuit protection lets the designer build an extremely low−cost AC−DC wall adapter associated with a simplified feedback scheme. With an internal structure operating at a fixed 40 kHz, 60 kHz or 100 kHz, the controller drives low gate−charge switching devices like an IGBT or a MOSFET thus requiring a very small operating power. Due to current−mode control, the NCP1200 drastically simplifies the design of reliable and cheap offline converters with extremely low acoustic generation and inherent pulse−by−pulse control. When the current setpoint falls below a given value, e.g. the output power demand diminishes, the IC automatically enters the skip cycle mode and provides excellent efficiency at light loads. Because this occurs at low peak current, no acoustic noise takes place. Finally, the IC is self−supplied from the DC rail, eliminating the need of an auxiliary winding. This feature ensures operation in presence of low output voltage or shorts. Features • • • • • • • • • • • • No Auxiliary Winding Operation Internal Output Short−Circuit Protection Extremely Low No−Load Standby Power Current−Mode with Skip−Cycle Capability Internal Leading Edge Blanking 250 mA Peak Current Source/Sink Capability Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHz Direct Optocoupler Connection Built−in Frequency Jittering for Lower EMI SPICE Models Available for TRANsient and AC Analysis Internal Temperature Shutdown These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Typical Applications • AC−DC Adapters • Offline Battery Chargers • Auxiliary/Ancillary Power Supplies (USB, Appliances, TVs, etc.) © Semiconductor Components Industries, LLC, 2015 April, 2015 − Rev. 19 1 www.onsemi.com MARKING DIAGRAMS 8 200Dy ALYW G SOIC−8 D SUFFIX CASE 751 8 1 1 8 PDIP−8 P SUFFIX CASE 626 8 1200Pxxx AWL YYWWG 1 1 xxx y = Device Code: 40, 60 or 100 = Device Code: 4 for 40 6 for 60 1 for 100 A = Assembly Location L = Wafer Lot Y, YY = Year W, WW = Work Week G, G = Pb−Free Package PIN CONNECTIONS Adj 1 8 HV FB 2 7 NC CS 3 6 VCC GND 4 5 Drv (Top View) ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. Publication Order Number: NCP1200/D NCP1200 C3 10 mF 400 V + * 1 D2 1N5819 HV 8 Adj 2 FB NC 7 3 CS VCC 6 M1 MTD1N60E 4 GND Drv 5 + 6.5 V @ 600 mA C2 470 mF/10 V Rf 470 EMI Filter C5 10 mF + Rsense D8 5 V1 Universal Input *Please refer to the application information section Figure 1. Typical Application ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION Pin No. Pin Name Function Description 1 Adj Adjust the Skipping Peak Current This pin lets you adjust the level at which the cycle skipping process takes place. 2 FB Sets the Peak Current Setpoint By connecting an Optocoupler to this pin, the peak current setpoint is adjusted accordingly to the output power demand. 3 CS Current Sense Input This pin senses the primary current and routes it to the internal comparator via an L.E.B. 4 GND The IC Ground 5 Drv Driving Pulses The driver’s output to an external MOSFET. 6 VCC Supplies the IC This pin is connected to an external bulk capacitor of typically 10 mF. 7 NC No Connection This un−connected pin ensures adequate creepage distance. 8 HV Generates the VCC from the Line Connected to the high−voltage rail, this pin injects a constant current into the VCC bulk capacitor. www.onsemi.com 2 NCP1200 Adj 1 HV Current Source 75.5 k FB 1.4 V 2 + 8 HV Skip Cycle Comparator UVLO High and Low Internal Regulator Internal VCC - 7 NC 29 k Current Sense Ground 8k 4 + - Vref 5.2 V Set 40, 60 or 100 kHz Clock 250 ns L.E.B. 3 Q Flip−Flop DCmax = 80% Q 6 Reset VCC + 60 k 5 1V 20 k Drv ±250 mA Overload? Fault Duration Figure 2. Internal Circuit Architecture ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ MAXIMUM RATINGS Rating Symbol Value Units Power Supply Voltage VCC 16 V Thermal Resistance Junction−to−Air, PDIP−8 version Thermal Resistance Junction−to−Air, SOIC version Thermal Resistance Junction−to−Case RqJA RqJA RqJC 100 178 57 °C/W Maximum Junction Temperature Typical Temperature Shutdown TJmax °C − 150 140 Tstg −60 to +150 °C ESD Capability, HBM Model (All Pins except VCC and HV) − 2.0 kV ESD Capability, Machine Model − 200 V Maximum Voltage on Pin 8 (HV), pin 6 (VCC) Grounded − 450 V Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Decoupled to Ground with 10 mF − 500 V Minimum Operating Voltage on Pin 8 (HV) − 30 V Storage Temperature Range Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. This device series contains ESD protection rated using the following tests: Human Body Model (HBM) 2000 V per JEDEC Standard JESD22, Method A114E. Machine Model (MM) 200 V per JEDEC Standard JESD22, Method A115A. www.onsemi.com 3 NCP1200 ELECTRICAL CHARACTERISTICS (For typical values TJ = +25°C, for min/max values TJ = −25°C to +125°C, Max TJ = 150°C, VCC= 11 V unless otherwise noted) Rating Pin Symbol Min Typ Max Unit VCC Increasing Level at Which the Current Source Turns−off 6 VCCOFF 10.3 11.4 12.5 V VCC Decreasing Level at Which the Current Source Turns−on 6 VCCON 8.8 9.8 11 V VCC Decreasing Level at Which the Latchoff Phase Ends 6 VCClatch − 6.3 − V Internal IC Consumption, No Output Load on Pin 5 6 ICC1 − 710 880 Note 1 mA Internal IC Consumption, 1 nF Output Load on Pin 5, FSW = 40 kHz 6 ICC2 − 1.2 1.4 Note 2 mA Internal IC Consumption, 1 nF Output Load on Pin 5, FSW = 60 kHz 6 ICC2 − 1.4 1.6 Note 2 mA Internal IC Consumption, 1 nF Output Load on Pin 5, FSW = 100 kHz 6 ICC2 − 1.9 2.2 Note 2 mA Internal IC Consumption, Latchoff Phase 6 ICC3 − 350 − mA High−voltage Current Source, VCC = 10 V 8 IC1 2.8 4.0 − mA High−voltage Current Source, VCC = 0 V 8 IC2 − 4.9 − mA Output Voltage Rise−time @ CL = 1 nF, 10−90% of Output Signal 5 Tr − 67 − ns Output Voltage Fall−time @ CL = 1 nF, 10−90% of Output Signal 5 Tf − 28 − ns Source Resistance (drive = 0, Vgate = VCCHMAX − 1 V) 5 ROH 27 40 61 W Sink Resistance (drive = 11 V, Vgate = 1 V) 5 ROL 5 12 25 W Input Bias Current @ 1 V Input Level on Pin 3 3 IIB − 0.02 − mA Maximum internal Current Setpoint 3 ILimit 0.8 0.9 1.0 V Default Internal Current Setpoint for Skip Cycle Operation 3 ILskip − 350 − mV Propagation Delay from Current Detection to Gate OFF State 3 TDEL − 100 160 ns Leading Edge Blanking Duration 3 TLEB − 230 − ns Oscillation Frequency, 40 kHz Version − fOSC 36 42 48 kHz Oscillation Frequency, 60 kHz Version − fOSC 52 61 70 kHz Oscillation Frequency, 100 kHz Version − fOSC 86 103 116 kHz Built−in Frequency Jittering, FSW = 40 kHz − fjitter − 300 − Hz/V Built−in Frequency Jittering, FSW = 60 kHz − fjitter − 450 − Hz/V Built−in Frequency Jittering, FSW = 100 kHz − fjitter − 620 − Hz/V Maximum Duty Cycle − Dmax 74 80 87 % DYNAMIC SELF−SUPPLY (All Frequency Versions, Otherwise Noted) INTERNAL CURRENT SOURCE DRIVE OUTPUT CURRENT COMPARATOR (Pin 5 Un−loaded) INTERNAL OSCILLATOR (VCC = 11 V, Pin 5 Loaded by 1 kW) FEEDBACK SECTION (VCC = 11 V, Pin 5 Loaded by 1 kW) Internal Pullup Resistor 2 Rup − 8.0 − kW Pin 3 to Current Setpoint Division Ratio − Iratio − 4.0 − − Default skip mode level 1 Vskip 1.1 1.4 1.6 V Pin 1 internal output impedance 1 Zout − 25 − kW SKIP CYCLE GENERATION Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. Max value @ TJ = −25°C. 2. Max value @ TJ = 25°C, please see characterization curves. www.onsemi.com 4 60 11.70 50 11.60 40 11.50 VCCOFF (V) LEAKAGE (mA) NCP1200 30 20 10 0 −25 0 25 11.40 40 kHz 11.30 50 75 100 11.10 −25 125 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 3. HV Pin Leakage Current vs. Temperature Figure 4. VCC OFF vs. Temperature 125 900 100 kHz 9.80 850 9.75 60 kHz 800 9.70 ICC1 (mA) VCCON (V) 60 kHz 11.20 9.85 9.65 9.60 40 kHz 750 100 kHz 700 9.55 650 9.50 9.45 −25 100 kHz 60 kHz 40 kHz 0 25 50 75 100 600 −25 125 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 5. VCC ON vs. Temperature Figure 6. ICC1 vs. Temperature 2.10 110 104 100 kHz 1.90 125 100 kHz 98 92 1.50 FSW (kHz) ICC2 (mA) 1.70 60 kHz 1.30 86 80 74 68 60 kHz 62 56 40 kHz 1.10 50 40 kHz 44 0.90 −25 0 25 50 75 100 38 −25 125 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 7. ICC2 vs. Temperature Figure 8. Switching Frequency vs. TJ www.onsemi.com 5 125 NCP1200 6.50 460 430 400 6.40 370 ICC3 (mA) VCCLATCHOFF (V) 6.45 6.35 6.30 250 220 0 25 50 75 100 190 −25 125 75 100 Figure 10. ICC3 vs. Temperature 125 1.00 Source CURRENT SETPOINT (V) W 50 Figure 9. VCC Latchoff vs. Temperature 40 30 20 Sink 10 0 25 50 75 100 0.96 0.92 0.88 0.84 0.80 −25 125 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 11. DRV Source/Sink Resistances Figure 12. Current Sense Limit vs. Temperature 1.34 86.0 1.33 84.0 1.32 82.0 DUTY−MAX (%) Vskip (V) 25 TEMPERATURE (°C) 50 1.31 1.30 1.29 1.28 −25 0 TEMPERATURE (°C) 60 0 −25 310 280 6.25 6.20 −25 340 80.0 78.0 76.0 0 25 50 75 100 74.0 −25 125 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 13. Vskip vs. Temperature Figure 14. Max Duty Cycle vs. Temperature www.onsemi.com 6 125 NCP1200 APPLICATIONS INFORMATION INTRODUCTION The NCP1200 implements a standard current mode architecture where the switch−off time is dictated by the peak current setpoint. This component represents the ideal candidate where low part−count is the key parameter, particularly in low−cost AC−DC adapters, auxiliary supplies etc. Due to its high−performance High−Voltage technology, the NCP1200 incorporates all the necessary components normally needed in UC384X based supplies: timing components, feedback devices, low−pass filter and self−supply. This later point emphasizes the fact that ON Semiconductor’s NCP1200 does NOT need an auxiliary winding to operate: the product is naturally supplied from the high−voltage rail and delivers a VCC to the IC. This system is called the Dynamic Self−Supply (DSS). Dynamic Self−Supply The DSS principle is based on the charge/discharge of the VCC bulk capacitor from a low level up to a higher level. We can easily describe the current source operation with a bunch of simple logical equations: POWER−ON: IF VCC < VCCOFF THEN Current Source is ON, no output pulses IF VCC decreasing > VCCON THEN Current Source is OFF, output is pulsing IF VCC increasing < VCCOFF THEN Current Source is ON, output is pulsing Typical values are: VCCOFF = 11.4 V, VCCON = 9.8 V To better understand the operational principle, Figure 15’s sketch offers the necessary light: VCCOFF = 11.4 V VCC 10.6 V Avg. VCCON = 9.8 V ON OFF Current Source Output Pulses 10.00M 30.00M 50.00M 70.00M 90.00M Figure 15. The Charge/Discharge Cycle Over a 10 mF VCC Capacitor . 0.16 = 256 mW. If for design reasons this contribution is still too high, several solutions exist to diminish it: 1. Use a MOSFET with lower gate charge Qg 2. Connect pin through a diode (1N4007 typically) to one of the mains input. The average value on pin 8 The DSS behavior actually depends on the internal IC consumption and the MOSFET’s gate charge, Qg. If we select a MOSFET like the MTD1N60E, Qg equals 11 nC (max). With a maximum switching frequency of 48 kHz (for the P40 version), the average power necessary to drive the MOSFET (excluding the driver efficiency and neglecting various voltage drops) is: Fsw @ Qg @ V cc 2 * Vmains PEAK becomes . Our power contribution p example drops to: 160 mW. with Fsw = maximum switching frequency Qg = MOSFET’s gate charge VCC = VGS level applied to the gate To obtain the final driver contribution to the IC consumption, simply divide this result by VCC: Idriver = Fsw @ Qg = 530 mA. The total standby power consumption at no−load will therefore heavily rely on the internal IC consumption plus the above driving current (altered by the driver’s efficiency). Suppose that the IC is supplied from a 400 V DC line. To fully supply the integrated circuit, let’s imagine the 4 mA source is ON during 8 ms and OFF during 50 ms. The IC power contribution is therefore: 400 V . 4 mA Dstart 1N4007 C3 4.7 mF 400 V EMI Filter + NCP1200 1 HV 8 Adj 2 FB NC 7 3 CS VCC 6 4 GND Drv 5 Figure 16. A simple diode naturally reduces the average voltage on pin 8 www.onsemi.com 7 NCP1200 3. Permanently force the VCC level above VCCH with an auxiliary winding. It will automatically disconnect the internal startup source and the IC will be fully self−supplied from this winding. Again, the total power drawn from the mains will significantly decrease. Make sure the auxiliary voltage never exceeds the 16 V limit. When FB is above the skip cycle threshold (1.4 V by default), the peak current cannot exceed 1 V/Rsense. When the IC enters the skip cycle mode, the peak current cannot go below Vpin1 / 4 (Figure 19). The user still has the flexibility to alter this 1.4 V by either shunting pin 1 to ground through a resistor or raising it through a resistor up to the desired level. Skipping Cycle Mode The NCP1200 automatically skips switching cycles when the output power demand drops below a given level. This is accomplished by monitoring the FB pin. In normal operation, pin 2 imposes a peak current accordingly to the load value. If the load demand decreases, the internal loop asks for less peak current. When this setpoint reaches a determined level, the IC prevents the current from decreasing further down and starts to blank the output pulses: the IC enters the so−called skip cycle mode, also named controlled burst operation. The power transfer now depends upon the width of the pulse bunches (Figure 18 ). Suppose we have the following component values: Lp, primary inductance = 1 mH FSW, switching frequency = 48 kHz Ip skip = 300 mA (or 350 mV / Rsense) The theoretical power transfer is therefore: P1 P2 P3 Figure 18. Output pulses at various power levels (X = 5 ms/div) P1