NCP133AMX115TCG

DATA SHEET www.onsemi.com 500 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator XDFN6 CASE 711AT NCP133 MARKING DIAGRAM The NCP133 is a 500 mA VLDO equipped with NMOS pass transistor and a separate bias supply voltage (VBIAS). The device provides very stable, accurate output voltage with low noise suitable for space constrained, noise sensitive applications. In order to optimize performance for battery operated portable applications, the NCP133 features low IQ consumption. The XDFN6 1.2 mm x 1.2 mm package is optimized for use in space constrained applications. XX M T XX = Specific Device Code M = Date Code Features • • • • • • • • • • • • • Input Voltage Range: 0.8 V to 5.5 V Bias Voltage Range: 2.4 V to 5.5 V Adjustable and Fixed Voltage Versions Available Output Voltage Range: 0.8 V to 2.1 V (Fixed) and 0.8 V to 3.6 V (Adjustable) ±1.5% Accuracy over Temperature, 0.5% VOUT @ 25°C Ultra−Low Dropout: Typ. 140 mV at 500 mA Very Low Bias Input Current of Typ. 80 mA Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA Logic Level Enable Input for ON/OFF Control Output Active Discharge Option Available Stable with a 2.2 mF Ceramic Capacitor Available in XDFN6 − 1.2 mm x 1.2 mm x 0.4 mm Package These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant PIN CONNECTIONS OUT 1 ADJ/NC 2 EN 3 GND 6 IN 5 GND 4 BIAS (Top VIew) ORDERING INFORMATION See detailed ordering and shipping information on page 9 of this data sheet. Typical Applications • Battery−powered Equipment • Smartphones, Tablets • Cameras, DVRs, STB and Camcorders VBIAS >2.7 V VBIAS >2.7 V NCP133 100 nF BIAS VIN 1.5 V EN VOUT 1 V up to 500 mA OUT IN 1 mF NCP133 − ADJ 100 nF 2.2 mF BIAS VIN 1.5 V GND VEN R1 IN 1 mF EN VOUT 1 V up to 500 mA OUT ADJ GND 2.2 mF R2 VEN Figure 1. Typical Application Schematics © Semiconductor Components Industries, LLC, 2015 September, 2022 − Rev. 6 1 Publication Order Number: NCP133/D NCP133 CURRENT LIMIT IN EN BIAS OUT ENABLE BLOCK UVLO 150 W VOLTAGE REFERENCE + THERMAL LIMIT − *Active DISCHARGE GND *Active output discharge function is present only in NCP133AMXyyyTCG devices. yyy denotes the particular output voltage option. Figure 2. Simplified Schematic Block Diagram − Fixed Version CURRENT LIMIT IN EN BIAS OUT ENABLE BLOCK 150 W *Active DISCHARGE UVLO 0.80 V VOLTAGE REFERENCE + − THERMAL LIMIT ADJ GND *Active output discharge function is present only in NCP133AMXADJTCG devices. Figure 3. Simplified Schematic Block Diagram − Adjustable Version www.onsemi.com 2 NCP133 PIN FUNCTION DESCRIPTION Pin No. XDFN6 Pin Name 1 OUT Regulated Output Voltage pin 2 (Fixed) N/C Not internally connected (Note 1) 2 (Adj) ADJ Adjustable Regulator Feedback Input. Connect to output voltage resistor divider central node. 3 EN Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. 4 BIAS Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage Lockout Circuit. 5 GND Ground 6 IN Description Input Voltage Supply pin Pad Should be soldered to the ground plane for increased thermal performance. 1. True no connect. Printed circuit board traces are allowable ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 to 6 V VOUT −0.3 to (VIN+0.3) ≤ 6 V Input Voltage (Note 2) Output Voltage Chip Enable, Bias and Adj Input VEN, VBIAS, VADJ −0.3 to 6 V Output Short Circuit Duration tSC unlimited s Maximum Junction Temperature TJ 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 3) ESDHBM 2000 V ESD Capability, Machine Model (Note 3) ESDMM 200 V Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 3. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22−A114 ESD Machine Model tested per EIA/JESD22−A115 Latchup Current Maximum Rating tested per JEDEC standard: JESD78. THERMAL CHARACTERISTICS Rating Thermal Characteristics, XDFN6 1.2 mm x 1.2 mm Thermal Resistance, Junction−to−Air www.onsemi.com 3 Symbol Value Unit RqJA 170 °C/W NCP133 ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VBIAS = 2.7 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) + 0.3 V, IOUT = 1 mA, VEN = 1 V, unless otherwise noted. CIN = 1 mF, COUT = 2.2 mF. Typical values are at TJ = +25°C. Min/Max values are for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Note 5) Test Conditions Symbol Min Operating Input Voltage Range VIN Operating Bias Voltage Range VBIAS Parameter Typ Max Unit VOUT + VDO 5.5 V (VOUT + 1.40) ≥ 2.4 5.5 V Undervoltage Lock−out VBIAS Rising Hysteresis UVLO 1.6 0.2 V Reference Voltage (Adj devices only) TJ = +25°C VREF 0.800 V Output Voltage Accuracy (Note 4) VOUT ±0.5 % Output Voltage Accuracy (Note 4) −40°C ≤ TJ ≤ 85°C, VOUT(NOM) + 0.3 V ≤ VIN ≤ VOUT(NOM) + 1.0 V, 2.7 V or (VOUT(NOM) + 1.6 V), whichever is greater < VBIAS < 5.5 V, 1 mA < IOUT < 500 mA VOUT VIN Line Regulation VOUT(NOM) + 0.3 V ≤ VIN ≤ 5.0 V LineReg 0.01 %/V VBIAS Line Regulation 2.7 V or (VOUT(NOM) + 1.6 V), whichever is greater < VBIAS < 5.5 V LineReg 0.01 %/V Load Regulation IOUT = 1 mA to 500 mA LoadReg 1.5 mV VIN Dropout Voltage IOUT = 150 mA (Note 6) VDO 37 75 IOUT = 500 mA (Note 6) VDO 140 250 VBIAS Dropout Voltage IOUT = 500 mA, VIN = VBIAS (Notes 6, 7) VDO 1.1 1.5 V Output Current Limit VOUT = 90% VOUT(NOM) ICL ADJ Pin Operating Current (ADJ devices only) −1.5 550 +1.5 % mV 800 1000 mA IADJ 0.1 0.5 mA IBIAS 80 110 mA Bias Pin Operating Current VBIAS = 2.7 V Bias Pin Disable Current VEN ≤ 0.4 V IBIAS(DIS) 0.5 1 mA Vinput Pin Disable Current VEN ≤ 0.4 V IVIN(DIS) 0.5 1 mA EN Pin Threshold Voltage EN Input Voltage “H” VEN(H) EN Input Voltage “L” VEN(L) V 0.9 0.4 EN Pull Down Current VEN = 5.5 V IEN 0.3 Turn−On Time From assertion of VEN to VOUT = 98% VOUT(NOM). VOUT(NOM) = 1.0 V tON 150 ms Power Supply Rejection Ratio VIN to VOUT, f = 1 kHz, IOUT = 150 mA, VIN ≥ VOUT +0.5 V PSRR(VIN) 70 dB PSRR(VBIAS) 80 dB VBIAS to VOUT, f = 1 kHz, IOUT = 150 mA, VIN ≥ VOUT +0.5 V 1 mA Output Noise Voltage (Fixed Volt.) VIN = VOUT +0.5 V, VOUT(NOM) = 1 V, f = 10 Hz to 100 kHz VN 40 mVRMS Output Noise Voltage (Adj devices) VIN = VOUT +0.5 V, f = 10 Hz to 100 kHz VN 50 x VOUT mVRMS Thermal Shutdown Threshold Temperature increasing 160 °C Temperature decreasing 140 Output Discharge Pull−Down VEN ≤ 0.4 V, VOUT = 0.5 V, NCP133A options only RDISCH 150 W Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Adjustable devices tested at 0.8 V; external resistor tolerance is not taken into account. 5. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 6. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM). 7. For output voltages below 0.9 V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 2.4 V. www.onsemi.com 4 NCP133 TYPICAL CHARACTERISTICS VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) AT TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 MA, CIN = 1 MF, CBIAS = 0.1 MF, AND COUT = 2.2 MF (EFFECTIVE CAPACITANCE), UNLESS OTHERWISE NOTED. VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) 200 180 160 +125°C +85°C 140 120 100 −40°C 80 60 40 +25°C 20 0 100 200 400 300 150 +125°C +85°C 100 +25°C −40°C 50 VDO (VBIAS − VOUT) DROPOUT VOLTAGE (mV) 100 80 +125°C 60 +85°C 40 20 0 0.5 1.0 1.5 2.0 +25°C −40°C 2.5 3.0 3.5 4.0 Figure 5. VIN Dropout Voltage vs. (VBIAS − VOUT) and Temperature TJ 200 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 500 450 IOUT = 500 mA 400 350 300 +125°C 250 +85°C 200 +25°C 150 −40°C 100 50 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VBIAS − VOUT (V) VBIAS − VOUT (V) Figure 6. VIN Dropout Voltage vs. (VBIAS − VOUT) and Temperature TJ Figure 7. VIN Dropout Voltage vs. (VBIAS − VOUT) and Temperature TJ 4.5 140 1500 1400 120 +125°C 1300 +85°C +125°C 100 IBIAS (mA) −40°C 1200 +25°C 1100 80 60 −40°C +25°C 40 +85°C 1000 900 120 Figure 4. VIN Dropout Voltage vs. IOUT and Temperature TJ IOUT = 300 mA 0.5 160 140 VBIAS − VOUT (V) 250 0 IOUT = 100 mA 180 IOUT, OUTPUT CURRENT (mA) 300 VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) 500 VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) 0 200 20 0 50 100 150 200 250 300 0 0 50 100 150 200 250 300 350 400 450 500 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 8. VBIAS Dropout Voltage vs. IOUT and Temperature TJ Figure 9. BIAS Pin Current vs. IOUT and Temperature TJ www.onsemi.com 5 NCP133 TYPICAL CHARACTERISTICS (continued) AT TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 MA, CIN = 1 MF, CBIAS = 0.1 MF, AND COUT = 2.2 MF (EFFECTIVE CAPACITANCE), UNLESS OTHERWISE NOTED. 200 1000 180 900 ICL, CURRENT LIMIT (mA) 160 IBIAS (mA) 140 120 +125°C +85°C 100 80 60 40 20 0 2.0 +25°C −40°C +125°C 800 700 +85°C +25°C 600 −40°C 500 400 300 200 100 2.5 3.0 3.5 4.0 4.5 5.0 0 5.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VBIAS (V) VBIAS − VOUT (V) Figure 10. BIAS Pin Current vs. VBIAS and Temperature TJ Figure 11. Current Limit vs. (VBIAS − VOUT) www.onsemi.com 6 NCP133 APPLICATIONS INFORMATION VBAT NCP133 EN Switch−mode DC/DC VOUT = 1.5 V IN LX EN FB Processor BIAS 1.5 V OUT 1.0 V IN LOAD GND GND I/O I/O To other circuits Figure 12. Typical Application: Low−Voltage DC/DC Post−Regulator with ON/OFF Functionality Dropout Voltage The NCP133 dual−rail very low dropout voltage regulator is using NMOS pass transistor for output voltage regulation from VIN voltage. All the low current internal control circuitry is powered from the VBIAS voltage. The use of an NMOS pass transistor offers several advantages in applications. Unlike PMOS topology devices, the output capacitor has reduced impact on loop stability. Vin to Vout operating voltage difference can be very low compared with standard PMOS regulators in very low Vin applications. The NCP133 offers smooth monotonic start-up. The controlled voltage rising limits the inrush current. The Enable (EN) input is equipped with internal hysteresis. NCP133 Voltage linear regulator Fixed and Adjustable version is available. Because of two power supply inputs VIN and VBIAS and one VOUT regulator output, there are two Dropout voltages specified. The first, the VIN Dropout voltage is the voltage difference (VIN – VOUT) when VOUT starts to decrease by percent specified in the Electrical Characteristics table. VBIAS is high enough; specific value is published in the Electrical Characteristics table. The second, VBIAS dropout voltage is the voltage difference (VBIAS – VOUT) when VIN and VBIAS pins are joined together and VOUT starts to decrease. Input and Output Capacitors The device is designed to be stable for ceramic output capacitors with Effective capacitance in the range from 2.2 mF to 10 mF. The device is also stable with multiple capacitors in parallel, having the total effective capacitance in the specified range. In applications where no low input supplies impedance available (PCB inductance in VIN and/or VBIAS inputs as example), the recommended CIN = 1 mF and CBIAS = 0.1 mF or greater. Ceramic capacitors are recommended. For the best performance all the capacitors should be connected to the NCP133 respective pins directly in the device PCB copper layer, not through vias having not negligible impedance. When using small ceramic capacitor, their capacitance is not constant but varies with applied DC biasing voltage, temperature and tolerance. The effective capacitance can be much lower than their nominal capacitance value, most importantly in negative temperatures and higher LDO output voltages. That is why the recommended Output capacitor capacitance value is specified as Effective value in the specific application conditions. Output Voltage Adjust The required output voltage of Adjustable devices can be adjusted from 0.8 V to 3.6 V using two external resistors. Typical application schematics is shown in Figure 13. V BIAS CBIAS NCP133 ­ ADJ OUT BIAS V IN IN CIN V OUT R1 ADJ EN GND V EN V OUT + 0.8 2.2 μF R2 ǒ1 ) R1ńR2Ǔ Figure 13. Typical Application Schematics It is recommended to keep the total serial resistance of resistors (R1 + R2) no greater than 100 kW. Recommended resistor values for programming the frequently used voltages can be found in the Table 1. www.onsemi.com 7 NCP133 Enable Operation Thermal Protection The enable pin will turn the regulator on or off. The threshold limits are covered in the electrical characteristics table in this data sheet. If the enable function is not to be used then the pin should be connected to VIN or VBIAS. Internal thermal shutdown (TSD) circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When TSD activated , the regulator output turns off. When cooling down under the low temperature threshold, device output is activated again. This TSD feature is provided to prevent failures from accidental overheating. Activation of the thermal protection circuit indicates excessive power dissipation or inadequate heatsinking. For reliable operation, junction temperature should be limited to +125°C maximum. Current Limitation The internal Current Limitation circuitry allows the device to supply the full nominal current and surges but protects the device against Current Overload or Short. Table 1. RESISTOR VALUES FOR PROGRAMMING THE OUTPUT VOLTAGE NOTE: VOUT (V) R1 (kW) R2 (kW) 0.8 Short Open 0.9 10.0 80.6 1.0 19.6 78.7 1.05 24.3 78.7 1.1 24.9 66.5 1.2 33.2 66.5 1.5 43.2 49.9 1.8 41.2 33.2 2.5 42.2 20.0 3.3 61.9 20.0 VOUT = 0.8 x (1 + R1/R2) Resistors in the table are standard 1% types www.onsemi.com 8 NCP133 ORDERING INFORMATION Device Nominal Output Voltage Marking Marking Rotation Option Package Shipping† NCP133AMX090TAG 0.90 V D 90° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133AMX090TCG 0.90 V D 90° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133AMX100TCG 1.00 V 3 0° Output Active Discharge XDFN6 (Pb−Free) 3000 / Tape & Reel NCP133AMX105TCG 1.05 V 4 0° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133AMX110TCG 1.10 V 5 0° Output Active Discharge XDFN6 (Pb−Free) 3000 / Tape & Reel NCP133AMX115TCG 1.15 V T 90° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133AMX120TCG 1.20 V 6 0° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133AMX125TCG 1.25 V E 90° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133AMX130TCG 1.30 V F 90° Output Active Discharge XDFN6 (Pb−Free) 3000 / Tape & Reel NCP133AMX150TCG 1.50 V J 90° Output Active Discharge XDFN6 (Pb−Free) 3000 / Tape & Reel NCP133AMX180TCG 1.80 V Q 90° Output Active Discharge XDFN6 (Pb−Free) 3000 / Tape & Reel NCP133AMXADJTCG ADJ K 90° Output Active Discharge XDFN6 (Pb−Free) 3000 or 5000 / Tape & Reel (Note 8) NCP133BMXADJTCG ADJ P 90° Non−Active Discharge XDFN6 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. To order other package and voltage variants, please contact your onsemi sales representative 8. Product processed after October 1, 2022 are shipped with quantity 5000 units / Tape & Reel. www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS XDFN6 1.20x1.20, 0.40P CASE 711AT ISSUE C SCALE 4:1 D PIN ONE REFERENCE DATE 04 DEC 2015 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO THE PLATED TERMINALS. 4. COPLANARITY APPLIES TO THE PAD AS WELL AS THE TERMINALS. A B ÍÍÍ ÍÍÍ ÍÍÍ E L TOP VIEW DETAIL A OPTIONAL CONSTRUCTION A 0.05 C DIM A A1 b D D2 E E2 e L L1 A1 GENERIC MARKING DIAGRAM* 0.05 C C SIDE VIEW NOTE 4 MILLIMETERS TYP MAX 0.37 0.45 0.03 0.05 0.18 0.23 1.20 1.25 0.94 1.04 1.20 1.25 0.40 0.30 0.40 BSC 0.15 0.20 0.25 0.05 0.00 0.10 MIN 0.30 0.00 0.13 1.15 0.84 1.15 0.20 SEATING PLANE XX M D2 1 3 6X L1 XX = Specific Device Code M = Date Code E2 6X *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. L 6 DETAIL A 4 6X e b 0.10 BOTTOM VIEW M C A B NOTE 3 RECOMMENDED MOUNTING FOOTPRINT* 1.08 PACKAGE OUTLINE 6X 0.37 1.40 0.40 1 0.40 PITCH 6X 0.24 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON76141F XDFN6, 1.20 X 1.20, 0.40P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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