DATA SHEET
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500 mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
1
XDFN4
CASE 711BC
NCP134
The NCP134 is a 500 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (VBIAS). The device
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP134 features low IQ consumption. The XDFN4 1.2 mm x 1.2 mm
package is optimized for use in space constrained applications.
MARKING DIAGRAM
XX = Specific Device Code
M = Date Code
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Input Voltage Range: 0.8 V to 5.5 V
Bias Voltage Range: 2.4 V to 5.5 V
Fixed Voltage Versions Available
Output Voltage Range: 0.8 V to 2.1 V (Fixed)
±1.5% Accuracy over Temperature, 0.5% VOUT @ 25°C
Ultra−Low Dropout: Max. 150 mV at 500 mA, 1.1 V Output, 3.3 V
Bias, 85°C
Very Low Bias Input Current of Typ. 80 mA
Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
Logic Level Enable Input for ON/OFF Control
Output Active Discharge Option Available
Stable with a 2.2 mF Ceramic Capacitor
Available in XDFN4 − 1.2 mm x 1.2 mm x 0.4 mm Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
T
XXM
1
PIN CONNECTIONS
4
IN
3
EN
2
BIAS
GND
5
OUT
1
(Top View)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 10 of this data sheet.
Typical Applications
• Battery−powered Equipment
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
VBIAS
>2.7 V
NCP134
100 nF
BIAS
VIN
1.5 V
IN
1 mF
EN
VOUT
1 V up to 500 mA
OUT
2.2 mF
GND
VEN
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2017
September, 2022 − Rev. 8
1
Publication Order Number:
NCP134/D
NCP134
CURRENT
LIMIT
IN
EN
BIAS
OUT
ENABLE
BLOCK
UVLO
150 W
VOLTAGE
REFERENCE
+
−
THERMAL
LIMIT
*Active
DISCHARGE
GND
*Active output discharge function is present only in NCP134AMXyyyTCG devices.
yyy denotes the particular output voltage option.
Figure 2. Simplified Schematic Block Diagram − Fixed Version
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2
NCP134
PIN FUNCTION DESCRIPTION
Pin No.
XDFN4
Pin Name
1
OUT
Regulated Output Voltage pin
2
BIAS
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage
Lockout Circuit.
3
EN
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode.
4
IN
Input Voltage Supply pin
5
GND
Description
Ground
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 to 6
V
VOUT
−0.3 to (VIN+0.3) ≤ 6
V
VEN, VBIAS
−0.3 to 6
V
Output Short Circuit Duration
tSC
unlimited
s
Maximum Junction Temperature
TJ
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Input Voltage (Note 1)
Output Voltage
Chip Enable, Bias Input
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, XDFN4 1.2 mm x 1.2 mm
Thermal Resistance, Junction−to−Air (Note 3)
Symbol
Value
Unit
RqJA
170
°C/W
3. This data was derived by thermal simulations for a single device mounted on the 40 mm x 40 mm x 1.6 mm FR4 PCB with 2−ounce 800 sq
mm copper area on top and bottom.
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3
NCP134
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VBIAS = 2.7 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) +
0.3 V, IOUT = 1 mA, VEN = 1 V, unless otherwise noted. CIN = 1 mF, COUT = 2.2 mF. Typical values are at TJ = +25°C. Min/Max values are
for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Note 4)
Test Conditions
Symbol
Min
Operating Input Voltage
Range
VIN
Operating Bias Voltage
Range
VBIAS
Parameter
Undervoltage Lock−out
VBIAS Rising
Hysteresis
Output Voltage Accuracy
Typ
Max
Unit
VOUT +
VDO
5.5
V
(VOUT +
1.40) ≥ 2.4
5.5
V
UVLO
1.6
0.2
V
VOUT
±0.5
%
Output Voltage Accuracy
−40°C ≤ TJ ≤ 85°C, VOUT(NOM) + 0.3 V ≤ VIN ≤
VOUT(NOM) + 1.0 V, 2.7 V or (VOUT(NOM) +
1.6 V), whichever is greater < VBIAS < 5.5 V,
1 mA < IOUT < 500 mA
VOUT
VIN Line Regulation
VOUT(NOM) + 0.3 V ≤ VIN ≤ 5.0 V
LineReg
0.01
%/V
VBIAS Line Regulation
2.7 V or (VOUT(NOM) + 1.6 V), whichever is
greater < VBIAS < 5.5 V
LineReg
0.01
%/V
Load Regulation
IOUT = 1 mA to 500 mA
LoadReg
1.5
mV
VIN Dropout Voltage
IOUT = 150 mA (Note 5)
VDO
37
75
IOUT = 500 mA (Note 5)
VDO
140
250
VIN Dropout Voltage
NCP134AMX110TCG device, VOUT(NOM) =
1.1 V, VBIAS = 3.3 V, IOUT = 500 mA (Note 5)
VDO
100
150
VBIAS Dropout Voltage
IOUT = 500 mA, VIN = VBIAS (Notes 5, 6)
VDO
1.1
1.5
V
Output Current Limit
VOUT = 90% VOUT(NOM)
Bias Pin Operating Current
VBIAS = 2.7 V
Bias Pin Disable Current
ICL
−1.5
550
+1.5
%
mV
800
1000
mA
IBIAS
80
110
mA
VEN ≤ 0.4 V
IBIAS(DIS)
0.5
1
mA
Vinput Pin Disable Current
VEN ≤ 0.4 V
IVIN(DIS)
0.5
1
mA
EN Pin Threshold Voltage
EN Input Voltage “H”
VEN(H)
EN Input Voltage “L”
VEN(L)
V
0.9
0.4
EN Pull Down Current
VEN = 5.5 V
IEN
0.3
Turn−On Time
From assertion of VEN to VOUT =
98% VOUT(NOM). VOUT(NOM) = 1.0 V
tON
150
ms
Power Supply Rejection
Ratio
VIN to VOUT, f = 1 kHz, IOUT = 150 mA,
VIN ≥ VOUT +0.5 V
PSRR(VIN)
70
dB
PSRR(VBIAS)
80
dB
VN
40
mVRMS
°C
VBIAS to VOUT, f = 1 kHz, IOUT = 150 mA,
VIN ≥ VOUT +0.5 V
Output Noise Voltage
VIN = VOUT +0.5 V, VOUT(NOM) = 1 V,
f = 10 Hz to 100 kHz
Thermal Shutdown
Threshold
Temperature increasing
160
Temperature decreasing
140
Output Discharge
Pull−Down
VEN ≤ 0.4 V, VOUT = 0.5 V, NCP134A options
only
RDISCH
150
1
mA
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM).
6. For output voltages below 0.9 V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 2.4 V.
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NCP134
TYPICAL CHARACTERISTICS
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
AT TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 MA,
CIN = 1 MF, CBIAS = 0.1 MF, AND COUT = 2.2 MF (EFFECTIVE CAPACITANCE), UNLESS OTHERWISE NOTED.
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
200
180
160
+125°C
+85°C
140
120
100
−40°C
80
60
40
+25°C
20
0
100
200
400
300
150
+125°C
+85°C
100
+25°C
−40°C
50
VDO (VBIAS − VOUT) DROPOUT VOLTAGE (mV)
100
80
+125°C
60
+85°C
40
20
0
0.5
1.0
1.5
2.0
+25°C −40°C
2.5
3.0
3.5
4.0
Figure 4. VIN Dropout Voltage vs. (VBIAS −
VOUT) and Temperature TJ
200
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
4.5
500
450
IOUT = 500 mA
400
350
300
+125°C
250
+85°C
200
+25°C
150
−40°C
100
50
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VBIAS − VOUT (V)
VBIAS − VOUT (V)
Figure 5. VIN Dropout Voltage vs. (VBIAS −
VOUT) and Temperature TJ
Figure 6. VIN Dropout Voltage vs. (VBIAS −
VOUT) and Temperature TJ
4.5
140
1500
1400
120
+125°C
1300
+85°C
+125°C
100
IBIAS (mA)
−40°C
1200
+25°C
1100
80
60
−40°C
+25°C
40
+85°C
1000
900
120
Figure 3. VIN Dropout Voltage vs. IOUT and
Temperature TJ
IOUT = 300 mA
0.5
160
140
VBIAS − VOUT (V)
250
0
IOUT = 100 mA
180
IOUT, OUTPUT CURRENT (mA)
300
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
500
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
0
200
20
0
50
100
150
200
250
300
0
0
50
100 150 200
250 300 350 400 450 500
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 7. VBIAS Dropout Voltage vs. IOUT and
Temperature TJ
Figure 8. BIAS Pin Current vs. IOUT and
Temperature TJ
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NCP134
TYPICAL CHARACTERISTICS (continued)
AT TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 MA,
CIN = 1 MF, CBIAS = 0.1 MF, AND COUT = 2.2 MF (EFFECTIVE CAPACITANCE), UNLESS OTHERWISE NOTED.
200
1000
180
900
ICL, CURRENT LIMIT (mA)
160
120
+125°C
+85°C
100
80
60
40
20
0
2.0
+25°C
−40°C
700
+85°C
+25°C
600
−40°C
500
400
300
200
100
2.5
3.0
3.5
4.0
4.5
5.0
0
5.5
0
0.5
1.0
2.0
1.5
2.5
3.0
3.5
4.0
4.5 5.0
VBIAS (V)
VBIAS − VOUT (V)
Figure 9. BIAS Pin Current vs. VBIAS and
Temperature TJ
Figure 10. Current Limit vs. (VBIAS − VOUT)
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
IBIAS (mA)
140
+125°C
800
200
NCP134AMX110TCG device,
VOUT(NOM) = 1.1 V, VBIAS = 3.3 V
180
160
140
+85°C
120
100
80
+25°C
60
40
20
0
0
100
200
300
400
IOUT, OUTPUT CURRENT (mA)
Figure 11. VIN Dropout Voltage vs. IOUT and
Temperature TJ
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500
NCP134
50 mV/div
VOUT
200 mA/div
tR = tF = 1 ms
IOUT
VOUT
tR = tF = 1 ms
IOUT
50 ms/div
Figure 13. Load Transient Response,
IOUT = 50 mA to 500 mA, COUT = 2.2 mF
50 mV/div
50 ms/div
Figure 12. Load Transient Response,
IOUT = 50 mA to 500 mA, COUT = 10 mF
VOUT
200 mA/div
200 mA/div
50 mV/div
200 mA/div
50 mV/div
TYPICAL CHARACTERISTICS (continued)
AT TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 MA,
CIN = 1 MF, CBIAS = 0.1 MF, AND COUT = 2.2 MF (EFFECTIVE CAPACITANCE), UNLESS OTHERWISE NOTED.
tR = tF = 1 ms
IOUT
VOUT
tR = tF = 1 ms
IOUT
500 ms/div
500 ms/div
1 V/div
Figure 15. Load Transient Response,
IOUT = 1 mA to 500 mA, COUT = 2.2 mF
VENABLE
VENABLE
VOUT
200 mA/div 200 mV/div
VOUT
IOUT
200 mV/div
1 V/div
Figure 14. Load Transient Response,
IOUT = 1 mA to 500 mA, COUT = 10 mF
100 ms/div
100 ms/div
Figure 16. Enable Turn−on Response,
Output Resistive Load 500 mA, COUT = 10 mF
Figure 17. Enable Turn−on Response,
IOUT = 0 mA, COUT = 2.2 mF
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NCP134
10 mV/div
10 mV/div
TYPICAL CHARACTERISTICS (continued)
AT TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 MA,
CIN = 1 MF, CBIAS = 0.1 MF, AND COUT = 2.2 MF (EFFECTIVE CAPACITANCE), UNLESS OTHERWISE NOTED.
VOUT
VOUT
tR = tF = 5 ms
VIN
VIN
1 V/div
1 V/div
tR = tF = 5 ms
20 ms/div
20 ms/div
Figure 18. VIN Line Transient Response,
VIN = 1.3 V to 2.3 V, IOUT = 100 mA, COUT = 10 mF
Figure 19. VIN Line Transient Response,
VIN = 1.3 V to 2.3 V, IOUT = 100 mA, COUT = 2.2 mF
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NCP134
APPLICATIONS INFORMATION
NCP134
VBAT
EN
Switch−mode DC/DC
VOUT = 1.5 V
IN
LX
EN
FB
Processor
BIAS
1.5 V
OUT
1.0 V
IN
LOAD
GND
GND
I/O
I/O
To other circuits
Figure 20. Typical Application: Low−Voltage DC/DC Post−Regulator with ON/OFF Functionality
or greater. Ceramic capacitors are recommended. For the
best performance all the capacitors should be connected to
the NCP134 respective pins directly in the device PCB
copper layer, not through vias having not negligible
impedance.
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
The NCP134 dual−rail very low dropout voltage regulator
is using NMOS pass transistor for output voltage regulation
from VIN voltage. All the low current internal control
circuitry is powered from the VBIAS voltage.
The use of an NMOS pass transistor offers several
advantages in applications. Unlike PMOS topology devices,
the output capacitor has reduced impact on loop stability.
Vin to Vout operating voltage difference can be very low
compared with standard PMOS regulators in very low Vin
applications.
The NCP134 offers smooth monotonic start-up. The
controlled voltage rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis. NCP134 Voltage linear regulator Fixed version
is available.
Enable Operation
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet. If the enable function is not to be used
then the pin should be connected to VIN or VBIAS.
Dropout Voltage
Because of two power supply inputs VIN and VBIAS and
one VOUT regulator output, there are two Dropout voltages
specified.
The first, the VIN Dropout voltage is the voltage
difference (VIN – VOUT) when VOUT starts to decrease by
percent specified in the Electrical Characteristics table.
VBIAS is high enough; specific value is published in the
Electrical Characteristics table.
The second, VBIAS dropout voltage is the voltage
difference (VBIAS – VOUT) when VIN and VBIAS pins are
joined together and VOUT starts to decrease.
Current Limitation
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
Thermal Protection
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated , the
regulator output turns off. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to
+125°C maximum.
Input and Output Capacitors
The device is designed to be stable for ceramic output
capacitors with Effective capacitance in the range from
2.2 mF to 10 mF. The device is also stable with multiple
capacitors in parallel, having the total effective capacitance
in the specified range.
In applications where no low input supplies impedance
available (PCB inductance in VIN and/or VBIAS inputs as
example), the recommended CIN = 1 mF and CBIAS = 0.1 mF
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NCP134
ORDERING INFORMATION
Device
Nominal
Output
Voltage
Marking
Option
Package
Shipping†
NCP134AMX080TCG
0.80 V
GG
Output Active Discharge
XDFN4
(Pb−Free)
3000 / Tape & Reel
NCP134AMX085TCG
0.85 V
GL
Output Active Discharge
XDFN4
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 7)
NCP134AMX090TCG
0.90 V
GF
Output Active Discharge
XDFN4
(Pb−Free)
3000 / Tape & Reel
NCP134AMX100TCG
1.00 V
GA
Output Active Discharge
XDFN4
(Pb−Free)
3000 / Tape & Reel
NCP134AMX105TCG
1.05 V
GC
Output Active Discharge
XDFN4
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 7)
NCP134AMX110TCG
1.10 V
GD
Output Active Discharge
XDFN4
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 7)
NCP134AMX120TCG
1.20 V
GE
Output Active Discharge
XDFN4
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 7)
NCP134AMX135TCG
1.35 V
GJ
Output Active Discharge
XDFN4
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 7)
NCP134AMX150TCG
1.50 V
GH
Output Active Discharge
XDFN4
(Pb−Free)
3000 / Tape & Reel
NCP134AMX180TCG
1.80 V
GK
Output Active Discharge
XDFN4
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 7)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your onsemi sales representative
7. Product processed after October 1, 2022 are shipped with quantity 5000 units / Tape & Reel.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
XDFN4 1.2x1.2, 0.8P
CASE 711BC
ISSUE O
1
SCALE 4:1
A B
D
PIN ONE
REFERENCE
ÉÉ
ÉÉ
DATE 15 SEP 2015
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DETAIL B
E
DETAIL B
TOP VIEW
A3
SIDE VIEW
A
0.05 C
ALTERNATE
CONSTRUCTION
A1
4X
(0.12)
4X
0.05 C
NOTE 4
C
SIDE VIEW
SEATING
PLANE
4X
D2
1
e/2
0.05
b
C A B
NOTE 3
e
2
M
4X
DETAIL A
L
(0.12)
DIM
A
A1
A3
b
b1
D
D2
E
E2
e
L
L1
MILLIMETERS
MIN
MAX
0.35
0.45
0.00
0.05
0.13 REF
0.25
0.35
0.15
0.25
1.15
1.25
0.58
0.68
1.15
1.25
0.58
0.68
0.80 BSC
0.25
0.35
0.13
0.23
GENERIC
MARKING DIAGRAM*
E2
XXM
L1
DETAIL A
1
3
4
XX = Specific Device Code
M = Date Code
b1
BOTTOM VIEW
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
RECOMMENDED
MOUNTING FOOTPRINT*
PACKAGE
OUTLINE
4X
1.50
0.25
C 0.195
0.22
4X
0.80 PITCH
0.35
2X
0.63
1
4X
0.48
45 5
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON04908G
XDFN4, 1.2X1.2, 0.8P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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