NCP1396A_10

NCP1396A, NCP1396B High Performance Resonant Mode Controller featuring High- Voltage Drivers The NCP1396 A/B offers everything needed to build a reliable and rugged resonant mode power supply. Its unique architecture includes a 500 kHz Voltage Controlled Oscillator whose control mode brings flexibility when an ORing function is a necessity, e.g. in multiple feedback paths implementations. Thanks to its proprietary high- voltage technology, the controller welcomes a bootstrapped MOSFET driver for half- bridge applications accepting bulk voltages up to 600 V. Protections featuring various reaction times, e.g. immediate shutdown or timer- based event, brown- out, broken opto- coupler detection etc., contribute to a safer converter design, without engendering additional circuitry complexity. An adjustable deadtime also helps lowering the shoot- through current contribution as the switching frequency increases. Features http://onsemi.com MARKING DIAGRAMS 16 1 SO- 16, LESS PIN 13 D SUFFIX CASE 751AM 16 NCP1396xG AWLYWW 1                     High- frequency Operation from 50 kHz up to 500 kHz 600 V High- Voltage Floating Driver Selectable Minimum Switching Frequency with 3% Accuracy Adjustable Deadtime from 100 ns to 2 ms. Startup Sequence via an Adjustable Soft- start Brown- out Protection for a Simpler PFC Association Latched Input for Severe Fault Conditions, e.g. Over Temperature or OVP Timer- based Input with Auto- recovery Operation for Delayed Event Reaction Enable Input for Immediate Event Reaction or Simple ON/OFF Control VCC Operation up to 20 V Low Startup Current of 300 mA 1 A / 0.5 A Peak Current Sink / Source Drive Capability Common Collector Optocoupler Connection for Easier ORing Internal Temperature Shutdown B Version features 10 V VCC Startup Threshold These are Pb- Free Devices Flat Panel Display Power Converters High Power AC/DC Adapters for Notebooks Industrial and Medical Power Sources Offline Battery Chargers x A WL Y WW G = A or B = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package PIN CONNECTIONS CSS 1 Fmax 2 Ctimer 3 Rt 4 BO 5 FB 6 DT 7 Fast Fault 8 (Top View) 12 VCC 11 Mlower 10 GND 9 Slow Fault 16 Vboot 15 Mupper 14 HB Typical Applications ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 24 of this data sheet.  Semiconductor Components Industries, LLC, 2010 November, 2010 - Rev. 7 1 Publication Order Number: NCP1396/D NCP1396A, NCP1396B HV FB U2A U3A 1 2 3 4 OVP R17 R8 R24 R20 M1 R10 C12 D8 R21 R11 Slow Input D9 M2 L1 R23 + C6 D4 U5 16 15 14 Vout D1 + C2 R4 R12 Rt 5 6 7 12 11 10 R5 FB R1 OVP R7 8 9 Fmax C9 C8 Fast Input C10 D3 C11 + C7 C13 T1 D2 U2B C4 U3B D6 D7 C14 R22 R16 C1 U1 R3 C3 R2 R19 Softstart R9 R14 Timer R18 R13 BO R6 Skip Selection DT Figure 1. Typical Application Example PIN FUNCTION DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name CSS Fmax Ctimer Rt BO FB DT Fast Fault Slow Fault GND Mlower VCC HB Mupper Vboot Function Soft-start Frequency clamp Timer duration Timing resistor Brown-Out Feedback Dead-time Quick fault detection Slow fault detection Analog ground Low side output Supplies the controller Half-bridge connection High side output Bootstrap pin Select the soft-start duration A resistor sets the maximum frequency excursion Sets the timer duration in presence of a fault Connecting a resistor to this pin, sets the minimum oscillator frequency reached for VFB = 1 V Detects low input voltage conditions. When brought above Vlatch, it fully latches off the controller. Injecting current in this pin increases the oscillation frequency up to Fmax. A simple resistor adjusts the dead-time width Fast shut-down pin. Upon release, a clean startup sequence occurs. Can be used for skip cycle purposes. When asserted, the timer starts to countdown and shuts down the controller at the end of its time duration. Drives the lower side MOSFET The controller accepts up to 20 V Connects to the half-bridge output Drives the higher side MOSFET The floating VCC supply for the upper stage Pin Description http://onsemi.com 2 NCP1396A, NCP1396B Vdd Temperature Shutdown S D Q Clk R DT Adj. 50% DC FF VCC Management Mupper Q Vref VBOOT Imin Vfb  Vfb_off Vref Rt C I = Imax for Vfb = 5.3 V I = 0 for Vfb < Vfb_min Vdd IDT + + BO Reset Imax Vfb = 5 Vdd Vref Itimer Fmax If FAULT Itimer else 0 Timer PON Reset SS Fault Timeout Fault Fast Fault UVLO HB + + Vref Level Shifter Timeout Fault NC Vdd PON Reset Fault VCC Fault ISS SS FB G=1 + - Mlower > 0 only V = V(FB) - Vfb_min Vdd RFB + Vfb_fault + - + Vfb_min Vref + Deadtime Adjustment + Vref Fault 20 ns Noise Filter GND Fast Fault DT Vdd IDT IBO 20 ms Noise Filter Q S 20 ms Noise Filter Q R PON Reset BO + VBO + - + Vlatch + - Slow Fault + Vref Fault + - Figure 2. Internal Circuit Architecture http://onsemi.com 3 NCP1396A, NCP1396B MAXIMUM RATINGS Rating High Voltage bridge pin, pin 14 Floating supply voltage High side output voltage Low side output voltage Allowable output slew rate Power Supply voltage, pin 12 Maximum voltage, all pins (except pin 11 and 10) Thermal Resistance - Junction- -Air, SOIC version -toOperating Junction Temperature Range Maximum Junction Temperature Storage Temperature Range ESD Capability, Human Body Model (All pins except HV Pins) ESD Capability, Machine Model Symbol VBRIDGE VBOOTVBRIDGE VDRV_HI VDRV_LO dVBRIDGE/dt VCC RθJA TJ TJMAX TSTG Value - to 600 -1 0 to 20 VBRIDGE-0.3 to VBOOT+0.3 -0.3 to VCC + 0.3 50 20 -0.3 to 10 130 -40 to +125 +150 -60 to +150 2 200 Unit V V V V V/ns V V C/W C C C kV V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000V per JESD22-A114-B Machine Model Method 200V per JESD22-A115-A. 2. This device meets latch-up tests defined by JEDEC Standard JESD78. http://onsemi.com 4 NCP1396A, NCP1396B ELECTRICAL CHARACTERISTICS (For typical values TJ = 25C, for min/max values TJ = - C to +125C, Max TJ = 150C, VCC = 12 V, unless otherwise noted.) -40 Characteristic SUPPLY SECTION Turn-on threshold level, VCC going up – A version Turn-on threshold level, VCC going up – B version Minimum operating voltage after turn-on Startup voltage on the floating section Cutoff voltage on the floating section Startup current, VCC < VCCON VCC level at which the internal logic gets reset Internal IC consumption, no output load on pin 15/14 – 11/10, Fsw = 300 kHz Internal IC consumption, 1 nF output load on pin 15/14 – 11/10, Fsw = 300 kHz Consumption in fault mode (All drivers disabled, VCC > VCC(min) ) VOLTAGE CONTROL OSCILLATOR (VCO) Characteristic Minimum switching frequency, Rt = 18 kΩ on pin 4, Vpin 6 = 0.8 V, DT = 300 ns Maximum switching frequency, Rfmax = 1.3 kΩ on pin 2, Vpin 6 > 5.3 V, Rt = 18 kΩ, DT = 300 ns Feedback pin swing above which Δf = 0 Operating duty-cycle symmetry Delay before any driver re-start in fault mode FEEDBACK SECTION Characteristic Internal pull-down resistor Voltage on pin 6 below which the FB level has no VCO action Voltage on pin 6 below which the controller considers a fault DRIVE OUTPUT Characteristic Output voltage rise-time @ CL = 1 nF, 10-90% of output signal Output voltage fall-time @ CL = 1 nF, 10-90% of output signal Source resistance Sink resistance Dead time with RDT = 10 kΩ from pin 7 to GND Maximum dead-time with RDT = 82 kΩ from pin 7 to GND Minimum dead-time, RDT = 3 kΩ from pin 7 to GND Leakage current on high voltage pins to GND Pin 15-14/1 1-10 15-14/1 1-10 15-14/1 1-10 15-14/1 1-10 7 7 7 14, 15,16 Symbol Tr Tf ROH ROL T_dead T_dead-max T_dead-min IHV_LEAK Min 250 Typ 40 20 13 5.5 300 2 100 Max 340 5 Unit ns ns Ω Ω ns ms ns mA Pin 6 6 6 Symbol Rfb Vfb_min Vfb_off Min Typ 20 1.2 0.6 Max Unit kΩ V V Pin 4 2 6 11-15 Symbol Fsw min Fsw max FBSW DC Tdel Min 58.2 425 48 Typ 60 500 5.3 50 20 Max 61.8 575 52 Unit kHz kHz V % ms 0C < TJ < +125C - C < TJ < +125C -40 12 12 12 16-14 16-14 12 12 12 12 12 VCCON VCCON VCC(min) VbootON Vboot(min) Istartup VCCreset ICC1 ICC2 ICC3 12.3 9.5 8.5 8 7.4 13.4 10.5 9.5 9 8.4 6.5 4 11 1.2 14.3 11.5 10.5 10 9.4 300 350 V V V V V mA V mA mA mA Pin Symbol Min Typ Max Unit http://onsemi.com 5 NCP1396A, NCP1396B ELECTRICAL CHARACTERISTICS (For typical values TJ = 25C, for min/max values TJ = - C to +125C, Max TJ = 150C, VCC = 12 V, unless otherwise noted.) -40 TIMERS Characteristic Timer charge current Timer duration with a 1 mF capacitor and a 1 MΩ resistor Timer recurrence in permanent fault, same values as above Voltage at which pin 3 stops output pulses Voltage at which pin 3 re-starts output pulses Soft-start ending voltage Soft-start charge current Soft-start duration with a 100 nF capacitor (Note 3) PROTECTION Characteristic Reference voltage for fast input (Note 4) Hysteresis for fast input (Note 4) Reference voltage for slow input Hysteresis for slow input Propagation delay for fast fault input drive shutdown Brown-Out input bias current Brown-Out level (Note 4) Hysteresis current, Vpin5 > VBO – A version Hysteresis current, Vpin5 > VBO – B version Latching voltage Temperature shutdown Hysteresis 0C < TJ < +125C - C < TJ < +125C -40 0C < TJ < +125C - C < TJ < +125C -40 0C < TJ < +125C - C < TJ < +125C -40 Pin 8-9 8-9 8-9 8-9 8 5 5 5 5 5 Symbol VrefFaultF HysteFaultF VrefFaultS HysteFaultS TpFault IBObias VBO IBO_A IBO_B Vlatch TSD TSDhyste Min 1.00 0.95 0.92 0.99 21.5 19 86 80 3.6 140 Typ 1.05 80 1.00 1.00 60 55 0.02 1.04 26.5 26.5 106 106 4 30 Max 1.10 1.05 1.05 90 1.09 31.5 33 126 132 4.4 Unit V mV V mV ns mA V mA mA V C C 0C < TJ < +125C - C < TJ < +125C -40 Pin 3 3 3 3 3 1 1 1 Symbol Itimer T-timer T-timerR VtimerON VtimerOFF VSS ISS T-SS Min 3.5 0.9 80 75 Typ 160 25 1.4 4 1 2 110 110 1.8 Max 4.4 1.1 125 130 Unit mA ms s V V V mA ms 3. The A version does not activate soft-start (unless the feedback pin voltage is below 0.6 V) when the fast-fault is released, this is for skip cycle implementation. The B version does activate the soft-start upon release of the fast-fault input for any feedback conditions. 4. Guaranteed by design http://onsemi.com 6 NCP1396A, NCP1396B TYPICAL CHARACTERISTICS - A VERSION 13.55 13.5 13.45 VCC(min) (V) 5 20 35 50 65 80 110 125 13.4 VCC(on) (V) 13.35 13.3 9.60 9.58 9.56 9.54 9.52 9.50 9.48 9.46 9.44 9.42 9.40 95 9.38 -40 -25 -10 5 20 35 50 65 80 95 110 125 13.25 13.2 13.15 13.1 -40 -25 -10 TEMPERATURE (C) TEMPERATURE (C) Figure 3. VCC(on) 60.2 60.1 FREQUENCY (kHz) FREQUENCY (kHz) 60.0 59.9 59.8 59.7 59.6 59.5 59.4 -40 -25 -10 5 20 35 50 65 80 95 110 125 501 500 499 498 497 496 495 494 493 -40 -25 -10 5 Figure 4. VCC(min) 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 5. Fsw min 1.060 1.055 1.050 VrefFaultFF (V) 1.045 1.040 1.035 1.030 1.025 5 20 35 50 65 80 95 110 125 1.020 -40 -25 -10 5 Figure 6. Fsw max 29 27 25 RFB (kΩ) 23 21 19 17 15 -40 -25 -10 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 7. Pulldown Resistor (RFB) Figure 8. Fast Fault (VrefFaultF) http://onsemi.com 7 NCP1396A, NCP1396B TYPICAL CHARACTERISTICS - A VERSION 20 19 18 17 ROH (Ω) ROL (Ω) 20 35 65 80 110 125 16 15 14 13 12 11 -25 -10 -40 5 50 95 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 9. Source Resistance (ROH) 109 108 107 106 DT_nom (ns) DT_min (ns) 105 104 103 102 101 100 99 -25 -10 -40 5 20 35 50 65 80 95 110 125 296 295 294 293 292 291 290 289 288 287 Figure 10. Sink Resistance (ROL) 286 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 11. T_dead_min 3.960 3.955 3.950 3.945 Vlatch (V) 3.940 3.935 3.930 3.925 3.920 3.915 3.910 -40 -25 -10 Figure 12. T_dead_nom 1.970 1.968 1.966 1.964 DT_max (ms) 1.962 1.960 1.958 -40 -25 -10 5 20 35 50 65 80 95 110 125 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 13. T_dead_max Figure 14. Latch Level (Vlatch) http://onsemi.com 8 NCP1396A, NCP1396B TYPICAL CHARACTERISTICS - A VERSION 1.045 1.040 1.035 26.8 26.6 26.4 26.2 IBO (mA) 20 35 65 80 110 125 26.0 25.8 25.6 25.4 25.2 1.020 -25 -10 -40 5 50 95 25.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 VBO (V) 1.030 1.025 TEMPERATURE (C) TEMPERATURE (C) Figure 15. Brown-Out Reference (VBO) Figure 16. Brown-Out Hysteresis Current (IBO) http://onsemi.com 9 NCP1396A, NCP1396B TYPICAL CHARACTERISTICS - B VERSION 10.65 10.60 10.55 VCC(min) (V) VCC(on) (V) 10.50 10.45 10.40 10.35 -25 -10 -40 9.56 9.54 9.52 9.50 9.48 9.46 9.44 9.42 9.40 9.38 5 20 35 50 65 80 95 110 125 9.36 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 17. VCC(on) 60.1 60.0 FREQUENCY (kHz) FREQUENCY (kHz) 59.9 59.8 59.7 59.6 59.5 59.4 59.3 -40 -25 -10 5 20 35 50 65 80 95 110 125 502 501 500 499 498 497 496 495 -40 -25 -10 5 Figure 18. VCC(min) 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 19. Fsw min 1.060 1.055 VrefFaultFF (V) 1.050 1.045 1.040 1.035 1.030 5 20 35 50 65 80 95 110 125 1.025 -40 -25 -10 5 Figure 20. Fsw max 29 27 25 RFB (kΩ) 23 21 19 17 15 -40 -25 -10 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 21. Pulldown Resistor (RFB) Figure 22. Fast Fault (VrefFaultF) http://onsemi.com 10 NCP1396A, NCP1396B TYPICAL CHARACTERISTICS - B VERSION 19 18 17 16 ROH (Ω) 15 14 13 12 11 10 -25 -10 -40 5 20 35 50 65 80 95 110 125 ROL (Ω) 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 23. Source Resistance (ROH) 108 107 106 105 DT_nom (ns) DT_min (ns) 104 103 102 101 100 99 98 -40 -25 -10 5 20 35 50 65 80 95 110 125 294 293 292 291 290 289 288 287 286 285 Figure 24. Sink Resistance (ROL) 284 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 25. T_dead_min 3.980 3.975 3.970 3.965 Vlatch (V) 3.960 3.955 3.950 3.945 3.940 3.935 3.930 -40 -25 -10 Figure 26. T_dead_nom 1.970 1.968 1.966 1.964 DT_max (ms) 1.962 1.960 1.958 -40 -25 -10 5 20 35 50 65 80 95 110 125 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) TEMPERATURE (C) Figure 27. T_dead_max Figure 28. Latch Level (Vlatch) http://onsemi.com 11 NCP1396A, NCP1396B TYPICAL CHARACTERISTICS - B VERSION 1.050 1.045 1.040 1.035 1.030 1.025 -25 -10 -40 107 106 105 IBO (mA) 20 35 65 80 110 125 104 103 102 101 100 5 50 95 99 -40 -25 -10 5 20 35 50 65 80 95 110 125 VBO (V) TEMPERATURE (C) TEMPERATURE (C) Figure 29. Brown-Out Reference (VBO) Figure 30. Brown-Out Hysteresis Current (IBO) http://onsemi.com 12 NCP1396A, NCP1396B Application Information The NCP1396 A/B includes all necessary features to help building a rugged and safe switch- mode power supply featuring an extremely low standby power. The below bullets detail the benefits brought by implementing the NCP1396 controller:  Wide frequency range: A high-- speed Voltage Control Oscillator allows an output frequency excursion from 50 kHz up to 500 kHz on Mlower and Mupper outputs.  Adjustable dead-- time: Thanks to a single resistor wired to ground, the user has the ability to include some dead- time, helping to fight cross- conduction between the upper and the lower transistor.  Adjustable soft-- start: Every time the controller starts to operate (power on), the switching frequency is pushed to the programmed maximum value and slowly moves down toward the minimum frequency, until the feedback loop closes. The soft- start sequence is activated in the following cases: a) normal startup b) back to operation from an off state: during hiccup faulty mode, brown- out or temperature shutdown (TSD). In the NCP1396A, the soft- start is not activated back to operation from the fast fault input, unless the feedback pin voltage is below 0.6 V. To the opposite, in the B version, the soft- start is always activated back from the fast fault input whatever the feedback level is.  Adjustable minimum and maximum frequency excursion: In resonant applications, it is important to stay away from the resonating peak to keep operating the converter in the right region. Thanks to a single external resistor, the designer can program its lowest frequency point, obtained in lack of feedback voltage (during the startup sequence or in short- circuit conditions). Internally trimmed capacitors offer a 3% precision on the selection of the minimum switching frequency. The adjustable upper stop being less precise to 15%.  Low startup current: When directly powered from the high- voltage DC rail, the device only requires 300 mA to start- up. In case of an auxiliary supply, the B version offers a lower start- up threshold to cope with a 12 V dc rail.  Brown-- Out detection: To avoid operation from a low input voltage, it is interesting to prevent the controller from switching if the high- voltage rail is not within the right boundaries. Also, when teamed with a PFC front- end circuitry, the brown- out detection can ensure a clean start- up sequence with soft- start, ensuring that the PFC is stabilized before energizing the resonant tank. The A version features a 26.5 mA hysteresis current for the lowest consumption and the B version slightly increases this current to 100 mA in order to improve the noise immunity. Adjustable fault timer duration: When a fault is detected on the slow fault input or when the FB path is broken, a timer starts to charge an external capacitor. If the fault is removed, the timer opens the charging path and nothing happens. When the timer reaches its selected duration (via a capacitor on pin 3), all pulses are stopped. The controller now waits for the discharge via an external resistor of pin 3 capacitor to issue a new clean startup sequence with soft- start. Cumulative fault events: In the NCP1396A/B, the timer capacitor is not reset when the fault disappears. It actually integrates the information and cumulates the occurrences. A resistor placed in parallel with the capacitor will offer a simple way to adjust the discharge rate and thus the auto- recovery retry rate. Fast and slow fault detection: In some application, subject to heavy load transients, it is interesting to give a certain time to the fault circuit, before activating the protection. On the other hands, some critical faults cannot accept any delay before a corrective action is taken. For this reason, the NCP1396A/B includes a fast fault and a slow fault input. Upon assertion, the fast fault immediately stops all pulses and stays in the position as long as the driving signal is high. When released low (the fault has gone), the controller has several choices: in the A version, pulses are back to a level imposed by the feedback pin without soft- start, but in the B version, pulses are back through a regular soft- start sequence. Skip cycle possibility: The absence of soft- start on the NCP1396A fast fault input offers an easy way to implement skip cycle when power saving features are necessary. A simple resistive connection from the feedback pin to the fast fault input, and skip can be implemented. Broken feedback loop detection: Upon start- up or any time during operation, if the FB signal is missing, the timer starts to charge a capacitor. If the loop is really broken, the FB level does not grow- up before the timer ends counting. The controller then stops all pulses and waits that the timer pin voltage collapses to 1 V typically before a new attempt to re- start, via the soft- start. If the optocoupler is permanently broken, a hiccup takes place. Finally, two circuit versions, A and B: The A and B versions differ because of the following changes: 1. The startup thresholds are different, the A starts to pulse for VCC = 13.3 V whereas the B pulses for VCC = 10.5 V. The turn off levels are the same however. The A is recommended for consumer       http://onsemi.com 13 NCP1396A, NCP1396B products where the designer can use an external startup resistor, whereas the B is more recommended for industrial / medical applications where a 12 V auxiliary supply directly powers the chip. 2. The A version does not activate the soft- start upon release of the fast fault input. This is to let the designer implement skip cycle. To the opposite, the B version goes back to operation upon the fast fault pin release via a soft- start sequence. Vdd Voltage-Controlled Oscillator The VCO section features a high- speed circuitry allowing operation from 100 kHz up to 1 MHz. However, as a division by two internally creates the two Q and Q outputs, the final effective signal on output Mlower and Mupper switches between 50 kHz and 500 kHz. The VCO is configured in such a way that if the feedback pin goes up, the switching frequency also goes up. Figure 31 shows the architecture of this oscillator. FBinternal max Fsw max 0 to I_Fmax + + + Imin Vref Rt Rt sets Fmin for V(FB) = 0 Cint S D Clk R Q Q Vdd IDT Vref DT Rdt sets the dead-time VCC Fmax Fmax sets the maximum Fsw FB Rfb 20 k Imin A B Vdd + Vb_off + Vfb < Vb_off Start fault timer Figure 31. The Simplified VCO Architecture The designer needs to program the maximum switching frequency and the minimum switching frequency. In LLC configurations, for circuits working above the resonant frequency, a high precision is required on the minimum frequency, hence the 3% specification. This minimum switching frequency is actually reached when no feedback closes the loop. It can happen during the startup sequence, a strong output transient loading or in a short- circuit condition. By installing a resistor from pin 4 to GND, the minimum frequency is set. Using the same philosophy, wiring a resistor from pin 2 to GND will set the maximum frequency excursion. To improve the circuit protection features, we have purposely created a dead zone, where the feedback loop has no action. This is typically below 1.2 V. Figure 32 details the arrangement where the internal voltage (that drives the VCO) varies between 0 and 2.3 V. However, to create this swing, the feedback pin (to which the optocoupler emitter connects), will need to swing typically between 1.2 V and 5.3 V. http://onsemi.com 14 NCP1396A, NCP1396B VCC F Mu&Lu No variations Fmax FB R1 11.3 k + R3 100 k R2 8.7 k D1 2.3 V Vref 0.5 V Fmin Fmax Rfmax Fault area 450 kHz + - ΔFsw = 300 kHz 150 kHz VFB 1.2 V ΔVFB = 4.1 V 0.6 V 5.3 V Figure 32. The OPAMP Arrangement Limits the VCO Modulation Signal between 0.5 and 2.3 V Figure 34. Here a different minimum frequency was programmed as well as a maximum frequency excursion This techniques allows us to detect a fault on the converter in case the FB pin cannot rise above 0.6 V (to actually close the loop) in less than a duration imposed by the programmable timer. Please refer to the fault section for detailed operation of this mode. As shown on Figure 32, the internal dynamics of the VCO control voltage will be constrained between 0.5 V and 2.3 V, whereas the feedback loop will drive pin 6 (FB) between 1.2 V and 5.3 V. If we take the default FB pin excursion numbers, 1.2 V = 50 kHz, 5.3 V = 500 kHz, then the VCO maximum slope will be: 500 k − 50 k = 109.7 kHz∕V 4.1 Figures 33 and 34 portray the frequency evolution depending on the feedback pin voltage level in a different frequency clamp combination. F Mu&Lu No variations Please note that the previous small- signal VCO slope has now been reduced to 300 k / 4.1 = 73 kHz / V on Mupper and Mlower outputs. This offers a mean to magnify the feedback excursion on systems where the load range does not generate a wide switching frequency excursion. Thanks to this option, we will see how it becomes possible to observe the feedback level and implement skip cycle at light loads. It is important to note that the frequency evolution does not have a real linear relationship with the feedback voltage. This is due to the deadtime presence which stays constant as the switching period changes. The selection of the three setting resistors (Fmax, Fmin deadtime) requires the usage of the selection charts displayed below: 650 550 VCC = 12 V FB = 6.5 V DT = 300 ns Fmax 500 kHz Fmax (kHz) 450 350 250 150 50 Fmin = 200 kHz ΔFsw = 450 kHz Fmin 50 kHz VFB Fmin = 50 kHz 1.5 3.5 5.5 7.5 9.5 11.5 13.5 15.5 17.5 Fault area 1.2 V ΔVFB = 4.1 V 0.6 V 5.3 V RFmax (kΩ) Figure 33. Maximal Default Excursion, Rt = 22 kΩ on pin 4 and Rfmax = 1.3 kΩ on pin 2 Figure 35. Maximum Switching Frequency Resistor Selection Depending on the Adopted Minimum Switching Frequency http://onsemi.com 15 NCP1396A, NCP1396B 500 450 400 350 Fmin (kHz) 300 250 200 150 100 1 3 5 7 RFmin (kΩ) 9 11 In1 In2 FB 20 k VCO VCC = 12 V FB = 1 V DT = 300 ns ORing Capability If for any particular reason, there is a need for a frequency variation linked to an event appearance (instead of abruptly stopping pulses), then the FB pin lends itself very well to the addition of other sweeping loops. Several diodes can easily be used perform the job in case of reaction to a fault event or to regulate on the output current (CC operation). Figure 39 shows how to do it. VCC Figure 36. Minimum Switching Frequency Resistor Selection (Fmin = 100 kHz to 500 kHz) 100 90 80 70 Fmin (kHz) 60 50 40 30 20 10 15 20 25 30 35 RFmin (kΩ) 40 45 50 55 VCC = 12 V FB = 1 V DT = 300 ns Figure 39. Thanks to the FB Configuration, Loop ORing is Easy to Implement Dead-time Control Figure 37. Minimum Switching Frequency Resistor Selection (Fmin = 20 kHz to 100 kHz) 2000 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 3.5 Dead- time control is an absolute necessity when the half- bridge configuration comes to play. The dead- time technique consists in inserting a period during which both high and low side switches are off. Of course, the dead- time amount differs depending on the switching frequency, hence the ability to adjust it on this controller. The option ranges between 100 ns and 2 ms. The dead- time is actually made by controlling the oscillator discharge current. Figure 40 portrays a simplified VCO circuit based on Figure 31. DT (ns) Vcc = 12 V 13.5 23.5 33.5 43.5 Rdt (kΩ) 53.5 63.5 73.5 83.5 Figure 38. Dead-Time Resistor Selection http://onsemi.com 16 NCP1396A, NCP1396B Vdd Icharge: Fsw min + Fsw max S + Idis Ct D Clk R + 3 V- V -1 Q Q Vref DT RDT A B Figure 40. Dead-time Generation http://onsemi.com 17 NCP1396A, NCP1396B During the discharge time, the clock comparator is high and un- validates the AND gates: both outputs are low. When the comparator goes back to the low level, during the timing capacitor Ct recharge time, A and B outputs are validated. By connecting a resistor RDT to ground, it creates a current whose image serves to discharge the Ct capacitor: we control the dead- time. The typical range evolves between 100 ns (RDT = 3.5 kΩ) and 2 ms (RDT = 83.5 kΩ). Figure 43 shows the typical waveforms. Soft-start Sequence over the VCO lead as soon as the output voltage has reached the target. If not, then the minimum switching frequency is reached and a fault is detected on the feedback pin (typically below 600 mV). Figure 41 depicts a typical frequency evolution with soft- start. Fsw Fmax In resonant controllers, a soft- start is needed to avoid suddenly applying the full current into the resonating circuit. In this controller, a soft- start capacitor connects to pin 1 and offers a smooth frequency variation upon start- up: when the circuit starts to pulse, the VCO is pushed to the maximum switching frequency imposed by pin 2. Then, it linearly decreases its frequency toward the minimum frequency selected by a resistor on pin 4. Of course, practically, the feedback loop is suppose to take 20.0 10.0 0 -10.0 -20.0 SS Action If no FB Action Fmin Vss Soft-start Duration Figure 41. Soft-start Behavior Plot1 Ires1 in Amperes Ires 177 Plot2 Vout in Volts 175 173 171 169 200 m 600 m 1.00 m time in seconds 1.40 m 1.80 m Target is Reached Vout Figure 42. A Typical Start-up Sequence on a LLC Converter Please note that the soft- start will be activated in the following conditions: - A startup sequence - During auto- recovery burst mode - A brown- out recovery - A temperature shutdown recovery The fast fault input undergoes a special treatment. Since we want to implement skip cycle through the fast fault input on the NCP1396A, we cannot activate the soft- start every time the feedback pin stops the operations in low power mode. Therefore, when the fast fault pin is released, no soft- start occurs to offer the best skip cycle behavior. However, it is very possible to combine skip cycle and true fast fault input, e.g. via ORing diodes driving pin 6. In that case, if a signal maintains the fast fault input high long enough to bring the feedback level down (that is to say below 0.6 V) since the output voltage starts to fall down, then the soft- start is activated after the release of the pin. In the B version tailored to operate from an auxiliary 12 V power supply, the soft- start is always activated upon the fast fault input release, whatever the feedback condition is. http://onsemi.com 18 NCP1396A, NCP1396B 4.00 Plot1 Vct in Volts 3.00 2.00 1.00 0 Ct Voltage 16.0 Plot2 Clock in Volts 12.0 8.00 4.00 0 DT Clock Pulses DT 8.00 Plot3 Difference in Volts 4.00 0 -4.00 -8.00 A- B 56.2 m DT 65.9 m 75.7 m time in seconds 85.4 m 95.1 m Figure 43. Typical Oscillator Waveforms Brown-Out Protection Vbulk Rupper IBO BO Rlower + VBO Vdd ON/OFF The Brown- Out circuitry (BO) offers a way to protect the resonant converter from low DC input voltages. Below a given level, the controller blocks the output pulses, above it, it authorizes them. The internal circuitry, depicted by Figure 44, offers a way to observe the high- voltage (HV) rail. A resistive divider made of Rupper and Rlower, brings a portion of the HV rail on pin 5. Below the turn- on level, the 26.5 mA current source IBO is off. Therefore, the turn- on level solely depends on the division ratio brought by the resistive divider. + - BO Figure 44. The Internal Brown-out Configuration with an Offset Current Source http://onsemi.com 19 NCP1396A, NCP1396B 450 16.0 351 Volts 350 Plot1 Vin in Volts 12.0 Vcmp in Volts Vin 250 Volts 250 8.0 150 4.0 50 0 20 m BO 60 m 100 m time in seconds 140 m 180 m Figure 45. Simulation Results for 350 / 250 ON / OFF Levels To the contrary, when the internal BO signal is high (Mlower and Mupper pulse), the IBO source is activated and creates a hysteresis. As a result, it becomes possible to select the turn- on and turn- off levels via a few lines of algebra: IBO is off V(+) = V bulk1 × R lower R lower + R upper (eq. 1) IBO is on V(+) = V bulk2 × R lower + R upper R lower + IBO × If we decide to turn- on our converter for Vbulk1 equals 350 V and turn it off for Vbulk2 equals 250 V, then for A version (IBO_A = 26.5 mA, VBO = 1.04 V) we obtain: Rupper = 3.77 MΩ Rlower = 11.25 kΩ The bridge power dissipation is 4002 / 3.781 MΩ = 42 mW when front- end PFC stage delivers 400 V. Figure 45 simulation result confirms our calculations. Latch-off Protection  (eq. 2) R lower × R upper R lower + R upper  We can now extract Rlower from equation 1 and plug it into equation 2, then solve for Rupper: R upper = R lower × R lower = VBO × V bulk1 − VBO VBO (eq. 3) (eq. 4) Vbulk V bulk1 − V bulk2 IBO × (V bulk1 − VBO) VCC There are some situations where the converter shall be fully turned- off and stay latched. This can happen in presence of an over- voltage (the feedback loop is drifting) or when an over temperature is detected. Thanks to the addition of a comparator on the BO pin, a simple external circuit can lift up this pin above VLATCH (4 V typical) and permanently disable pulses. The VCC needs to be cycled down below 6.5 V typically to reset the controller. Q1 Vout Rupper + - 20 ms RC To permanent latch + Vlatch IBO Vdd BO NTC Rlower + VBO + - BO Figure 46. Adding a comparator on the BO pin offers a way to latch-off the controller http://onsemi.com 20 NCP1396A, NCP1396B On Figure 46, Q1 is blocked and does not bother the BO measurement as long as the NTC and the optocoupler are not activated. As soon as the secondary optocoupler senses an OVP condition, or the NTC reacts to a high ambient temperature, Q1 base is brought to ground and the BO pin goes up, permanently latching off the controller. Protection Circuitry This resonant controller differs from competitors thanks to its protection features. The device can react to various inputs like: - Fast events input: like an over- current condition, a need to shut down (sleep mode) or a way to force a controlled burst mode (skip cycle at low output power): as soon as the input level exceeds 1 V typical, Vdd pulses are immediately stopped. When the input is released, the controller performs a clean startup sequence including a soft- start period. - Slow events input: this input serves as a delayed shutdown, where an event like a transient overload does not immediately stopped pulses but start a timer. If the event duration lasts longer than what the timer imposes, then all pulses are disabled. The voltage on the timer capacitor (pin 3) starts to decrease until it reaches 1 V. The decrease rate is actually depending on the resistor the user will put in parallel with the capacitor, giving another flexibility during design. Figure 47 depicts the architecture of the fault circuitry. Itimer Ctimer Ctimer UVLO Reset 1 = fault 0 = ok ON/OFF + + Rtimer Average Input Current To Primary Current Sensing Circuitry + +- Slow Fault Vref Fault VtimerON VtimerOFF 1 = ok 0 = fault VCC + Vref Fault + FB FB 1 = ok 0 = fault Fast Fault Reset DRIVING LOGIC SS Skip A B A B Figure 47. This circuit combines a slow and fast input for improved protection features Slow Input On this circuit, the slow input goes to a comparator. When this input exceeds 1 V typical, the current source Itimer turns on, charging the external capacitor Ctimer. If the fault duration is long enough, when Ctimer voltage http://onsemi.com 21 NCP1396A, NCP1396B reaches the VtimerON level (4 V typical), then all pulses are stopped. If the fault input signal is still present, then the controller permanently stays off and the voltage on the timer capacitor does not move (Itimer is on and the voltage is clamped to 5 V). If the fault input signal is removed (because pulses are off for instance), Itimer turns off and the capacitor slowly discharges to ground via a resistor installed in parallel with it. As a result, the designer can easily determine the time during which the power supply stays locked by playing on Rtimer. Now, when the timer capacitor voltage reaches 1 V typical (VtimerOFF), the comparator instructs the internal logic to issues pulses as on a clean soft- start sequence (soft- start is activated). Please note that the discharge resistor can not be lower than 4 V SMPS Stops 4V / Itimer otherwise the voltage on Ctimer will not reach the turn- off voltage of 4 V. In both cases, when the fault is validated, both outputs Mlower and Mupper are internally pulled down to ground. On Figure 46 example, a voltage proportional to primary current, once averaged, gives an image of the input power in case Vin is kept constant via a PFC circuit. If the output loading increases above a certain level, the voltage on this pin will pass the 1 V threshold and start the timer. If the overload stays there, after a few tens of milli- seconds, switching pulses will disappear and a protective auto- recovery cycle will take place. Adjusting the resistor R in parallel with the timer capacitor will give the flexibility to adjust the fault burst mode. Fault is Gone SMPS Re-starts 1V Reset at Re-start Figure 48. A resistor can easily program the capacitor discharge time VCC FB can be designed to lose regulation in light load conditions, forcing the FB level to increase. When it reaches the programmed level, it triggers the fast fault input and stops pulses. Then Vout slowly drops, the loop reacts by decreasing the feedback level which, in turn, unlocks the pulses, Vout goes up again and so on: we are in skip cycle mode. Startup Behavior Fast Fault Figure 49. Skip cycle can be implemented via two resistors on the FB pin to the Fast fault input Fast Input The fast input is not affected by a delayed action. As soon as its voltage exceeds 1 V typical, all pulses are off and maintained off as long as the fault is present. When the pin is released, pulses come back and the soft- start is activated. Thanks to the low activation level of 1 V, this pin can observe the feedback pin via a resistive divided and thus implement skip cycle operation. The resonant converter When the VCC voltage grows- up, the internal current consumption is kept to Istrup, allowing to crank- up the converter via a resistor connected to the bulk capacitor. When VCC reaches the VCC(on) level, output Mlower goes high first and then output Mupper. This sequence will always be the same whatever triggers the pulse delivery: fault, OFF to ON etc Pulsing the output Mlower high first gives an immediate charge of the bootstrap capacitor. Then, the rest of pulses follow, delivered at the highest switching value, set by the resistor on pin 2. The soft- start capacitor ensures a smooth frequency decrease to either the programmed minimum value (in case of fault) or to a value corresponding to the operating point if the feedback loop closes first. Figure 50 shows typical signals evolution at power on. http://onsemi.com 22 NCP1396A, NCP1396B VCC(on) VCC(min) Vcc from an auxiliary supply SS FB TSS 0.6 V Fault! TSS A&B A B A B Timer 4V Slopes are similar 1V Figure 50. At power on, output A is first activated and the frequency slowly decreases via the soft-start capacitor Figure 50 depicts an auto- recovery situation, where the timer has triggered the end of output pulses. In that case, the VCC level was given by an auxiliary power supply, hence its stability during the hiccup. A similar situation can arise if the user selects a more traditional startup method, with an auxiliary winding. In that case, the VCC(min) comparator stops the output pulses whenever it is activated, that is to VCC(on) VCC(min) VCC from a Startup Resistor Fault! SS say, when VCC falls below 10 V typical. At this time, the VCC pin still receives its bias current from the startup resistor and heads toward VCC(on) via the VCC capacitor. When the voltage reaches VCC(on), a standard sequence takes place, involving a soft- start. Figure 51 portrays this behavior. Fault is Released FB TSS 0.6 V TSS A&B A B A B Timer 4V 1V Figure 51. When the VCC is too low, all pulses are stopped until VCC goes back to the startup voltage http://onsemi.com 23 NCP1396A, NCP1396B As described in the data- sheet, two startup levels VCC(on) are available, via two circuit versions. The NCP1396 features sufficient hysteresis (3 V typically) to allow a classical startup method with a resistor connected to the bulk capacitor. Then, at the end of the startup sequence, an auxiliary winding is supposed to take over the controller supply voltage. To the opposite, for applications where the resonant controller is powered from a standby power supply, the startup level is 10 V typically and allows for the direct a connection from a 12 V source. Thanks to this NCP1396B, simple ON/OFF operation is therefore feasible. The High-voltage Driver The driver features a traditional bootstrap circuitry, requiring an external high- voltage diode for the capacitor refueling path. Figure 52 shows the internal architecture of the high- voltage section. HV B Pulse Trigger Level Shifter Vboot S Q Q R HB cboot Mupper UVLO VCC Fault A Delay dboot aux VCC Mlower + GND Figure 52. The Internal High-voltage Section of the NCP1396 The device incorporates an upper UVLO circuitry that makes sure enough Vgs is available for the upper side MOSFET. The B and A outputs are delivered by the internal logic, as Figure 47 testifies. A delay is inserted in the lower rail to ensure good matching between these propagating signals. As stated in the maximum rating section, the floating portion can go up to 600 VDC and makes the IC perfectly suitable for offline applications featuring a 400 V PFC front- end stage. - ORDERING INFORMATION Device NCP1396ADR2G NCP1396BDR2G Package SOIC-16, Less Pin 13 (Pb-Free) SOIC-16, Less Pin 13 (Pb-Free) Shipping† 2500 / Tape & Reel 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 24 NCP1396A, NCP1396B PACKAGE DIMENSIONS SOIC-16 NB, LESS PIN 13 CASE 751AM--01 ISSUE O D AB NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. DIM A A1 b C D E e H h L M MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ 16 9 H E C 0.25 M B M 1 15X e 8 b 15X L M 0.25 A1 TA S B S C SEATING PLANE h x 45 _ A M SOLDERING FOOTPRINT* 6.40 15X 1.12 16 1 15X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81- -5773-3-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative http://onsemi.com 25 NCP1396/D