NCP139AFCT180T2G

DATA SHEET www.onsemi.com LDO Regulator - Very Low Dropout, CMOS, Bias Rail WLCSP6, 1.2x0.8 CASE 567MV 1A NCP139 MARKING DIAGRAM The NCP139 is a 1 A VLDO equipped with NMOS pass transistor and a separate bias supply voltage (VBIAS). The device provides very stable, accurate output voltage with low noise suitable for space constrained, noise sensitive applications. In order to optimize performance for battery operated portable applications, the NCP139 features low IQ consumption. The WLCSP6 1.2 mm x 0.8 mm Chip Scale package is optimized for use in space constrained applications. XXM XX = Specific Device Code M = Month Code PIN CONNECTIONS Features • • • • • • • • • • • • • T Input Voltage Range: VOUT to 5.5 V Bias Voltage Range: 3.0 V to 5.5 V Adjustable and Fixed Voltage Version Available Output Voltage Range: 0.4 V to 1.8 V (Fixed) Output Voltage Range 0.5 V to 3.0 V (Adjustable) ±1% Accuracy over Temperature, 0.5% VOUT @ 25°C Ultra−Low Dropout: Typ. 50 mV at 1 A Very Low Bias Input Current of Typ. 35 mA Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA Logic Level Enable Input for ON/OFF Control Output Active Discharge Option Available Stable with a 10 mF Ceramic Capacitor Available in WLCSP6 − 1.2 mm x 0.8 mm, 0.4 mm pitch Package These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 1 2 A VOUT VIN B SNS/FB EN C GND VBIAS Top View ORDERING INFORMATION See detailed ordering, marking and shipping information on page 10 of this data sheet. Typical Applications • Battery−powered Equipment • Smartphones, Tablets • Cameras, DVRs, STB and Camcorders VBIAS ≥3.0 V NCP139 − ADJ 1 mF BIAS VIN 4.7 mF R1 BIAS FB GND VIN 10 mF 4.7 mF R2 VEN VOUT 0.9 V up to 1 Adc, 1.3 A peaks NCP139 1 mF OUT IN EN VBIAS ≥3.0 V VOUT 0.9 V up to 1 Adc, 1.3 A peaks OUT IN EN SNS 10 mF GND VEN Figure 1. Typical Application Schematics © Semiconductor Components Industries, LLC, 2017 May, 2022 − Rev. 10 1 Publication Order Number: NCP139/D NCP139 CURRENT LIMIT IN EN BIAS OUT ENABLE BLOCK 150 W *Active DISCHARGE UVLO VOLTAGE REFERENCE + − THERMAL LIMIT SNS / FB GND *Active output discharge function is present only in NCP139A option devices. Figure 2. Simplified Schematic Block Diagram − Fixed Version www.onsemi.com 2 NCP139 PIN FUNCTION DESCRIPTION Pin No. WLCSP6 Pin Name A1 VOUT A2 VIN Input Voltage Supply pin B1 (ADJ Devices) FB Adjustable Regulator Feedback Input. Connect to output voltage resistor divider central node. B1 (Fix Volt Devices) SNS B2 EN C1 GND C2 VBIAS Description Regulated Output Voltage pin Output voltage Sensing Input. Connect to Output on the PCB to output the voltage corresponding to the part version. Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. Ground pin Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage Lockout Circuit. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 to 6 V VOUT −0.3 to (VIN + 0.3) ≤ 6 V VEN, VBIAS, VFB, VSNS −0.3 to 6 V Output Short Circuit Duration tSC unlimited s Maximum Junction Temperature TJ 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Input Voltage (Note 1) Output Voltage Chip Enable, Bias, FB and SNS Input Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22−A114 ESD Machine Model tested per EIA/JESD22−A115 Latchup Current Maximum Rating tested per JEDEC standard: JESD78. THERMAL CHARACTERISTICS Rating Thermal Characteristics, WLCSP6 1.2 mm × 0.8 mm Thermal Resistance, Junction−to−Air (Note 3) Symbol Value Unit RqJA 69 °C/W 3. This junction−to−ambient thermal resistance under natural convection was derived by thermal simulations based on the JEDEC JESD51 series standards methodology. Only a single device mounted at the center of a high_K (2s2p) 80 mm × 80 mm multilayer board with 1−ounce internal planes and 2−ounce copper on top and bottom. Top copper layer has a dedicated 1.6 sqmm copper area. www.onsemi.com 3 NCP139 ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VBIAS = 3.0 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) + 0.3 V, IOUT = 1 mA, VEN = 1 V, CIN = 10 mF, COUT = 10 mF, CBIAS = 1 mF, unless otherwise noted. Typical values are at TJ = +25°C. Min/Max values are for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Notes 4, 5) Test Conditions Symbol Min Operating Input Voltage Range VIN Operating Bias Voltage Range VBIAS Parameter Typ Max Unit VOUT + VDO 5.5 V (VOUT + 1.60) ≥ 3.0 5.5 V Undervoltage Lock−out VBIAS Rising Hysteresis UVLO 1.6 0.2 V Reference Voltage (Adj devices) NCP139Axxxx05ADJT2G, TJ = +25°C VREF 0.500 V NCP139Axxxx06ADJT2G, TJ = +25°C 0.600 Output Voltage Accuracy VOUT VOUT % ±0.5 Output Voltage Accuracy −40°C ≤ TJ ≤ 85°C, VOUT(NOM) + 0.3 V ≤ VIN ≤ VOUT(NOM) + 1.0 V, 3.0 V or (VOUT(NOM) + 1.6 V), whichever is greater < VBIAS < 5.5 V, 1 mA < IOUT < 1.0 A VIN Line Regulation VOUT(NOM) + 0.3 V ≤ VIN ≤ 5.0 V LineReg 0.01 %/V VBIAS Line Regulation 3.0 V or (VOUT(NOM) + 1.6 V), whichever is greater < VBIAS < 5.5 V LineReg 0.01 %/V Load Regulation IOUT = 1 mA to 1.0 A LoadReg 2.0 VIN Dropout Voltage IOUT = 1.0 A (Notes 6, 7) VDO 50 80 mV VBIAS Dropout Voltage IOUT = 1.0 A, VIN = VBIAS (Notes 6, 8, 9) VDO 1.05 1.5 V Output Current Limit VOUT = 90% VOUT(NOM) ICL 1500 2000 2600 mA ICL 1550 VOUT = 90% VOUT(NOM), −30°C ≤ TJ ≤ 85°C FB/SNS Pin Operating Current −1.0 +1.0 % mV 2000 2600 mA IFB, ISNS 0.1 0.5 mA IBIASQ 35 50 mA Bias Pin Quiescent Current VBIAS = 3.0 V, IOUT = 0 mA Bias Pin Disable Current VEN ≤ 0.4 V IBIAS(DIS) 0.5 1 mA Vinput Pin Disable Current VEN ≤ 0.4 V IVIN(DIS) 0.5 1 mA EN Pin Threshold Voltage EN Input Voltage “H” VEN(H) EN Input Voltage “L” VEN(L) V 0.9 0.4 EN Pull Down Current VEN = 5.5 V IEN 0.3 Turn−On Time From assertion of VEN to VOUT = 98% VOUT(NOM), VOUT(NOM) = 1.0 V, COUT = 10 mF tON 160 ms Power Supply Rejection Ratio (Adj devices) VIN to VOUT, f = 1 kHz, IOUT = 10 mA, VIN ≥ VOUT + 0.5 V, VOUT(NOM) = 1.0 V, COUT = 10 mF PSRR(VIN) 70 dB VBIAS to VOUT, f = 1 kHz, IOUT = 10 mA, VIN ≥ VOUT + 0.5 V, VOUT(NOM) = 1.0 V, COUT = 10 mF PSRR(VBIAS) 85 dB VIN = VOUT +0.5 V, f = 10 Hz to 100 kHz, VOUT(NOM) = 1.0 V, COUT = 10 mF VN 35 × VOUT/VREF mVRMS Output Noise Voltage (Adj devices) 1 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 5. Adjustable devices tested at VOUT = VREF unless otherwise noted; external resistor tolerance is not taken into account. 6. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM). 7. For adjustable devices, VIN dropout voltage tested at VOUT(NOM) = 2 × VREF. 8. For adjustable devices, VBIAS dropout voltage tested at VOUT(NOM) = 3 × VREF due to a minimum Bias operating voltage of 3.0 V. 9. For Fixed Voltages below 1.8 V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 3.0 V. www.onsemi.com 4 NCP139 ELECTRICAL CHARACTERISTICS (continued) −40°C ≤ TJ ≤ 85°C; VBIAS = 3.0 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) + 0.3 V, IOUT = 1 mA, VEN = 1 V, CIN = 10 mF, COUT = 10 mF, CBIAS = 1 mF, unless otherwise noted. Typical values are at TJ = +25°C. Min/Max values are for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Notes 4, 5) Parameter Test Conditions Symbol Power Supply Rejection Ratio (Fixed Voltage devices) VIN to VOUT, f = 1 kHz, IOUT = 10 mA, VIN ≥ VOUT +0.5 V, VOUT(NOM) = 1.8 V, COUT = 10 mF PSRR(VIN) 75 dB VBIAS to VOUT, f = 1 kHz, IOUT = 10 mA, VIN ≥ VOUT +0.5 V, VOUT(NOM) = 1.8 V, VBIAS = 4.0 V, COUT = 10 mF PSRR(VBIAS) 85 dB Output Noise Voltage (Fixed Voltage devices) VIN = VOUT +0.5 V, f = 10 Hz to 100 kHz, VOUT(NOM) = 1.8 V, COUT = 10 mF VN 48 mVRMS Thermal Shutdown Threshold Temperature increasing 160 °C Temperature decreasing 140 Output Discharge Pull−Down VEN ≤ 0.4 V, VOUT = 0.5 V, NCP139A options only RDISCH Min Typ 150 Max Unit W Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 5. Adjustable devices tested at VOUT = VREF unless otherwise noted; external resistor tolerance is not taken into account. 6. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM). 7. For adjustable devices, VIN dropout voltage tested at VOUT(NOM) = 2 × VREF. 8. For adjustable devices, VBIAS dropout voltage tested at VOUT(NOM) = 3 × VREF due to a minimum Bias operating voltage of 3.0 V. 9. For Fixed Voltages below 1.8 V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 3.0 V. www.onsemi.com 5 NCP139 TYPICAL CHARACTERISTICS 70 TJ = −40°C 60 TJ = 25°C TJ = 85°C 50 40 30 20 10 0 0 200 400 600 800 1000 VDO (VIN − VOUT), DROPOUT VOLTAGE (mV) VDO (VIN − VOUT), DROPOUT VOLTAGE (mV) (At TJ = +25°C, VIN = VOUT(NOM) + 0.3 V, VBIAS = 3 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 1 A, CIN = 10 mF, CBIAS = 1 mF, and COUT = 10 mF (effective capacitance), unless otherwise noted) 500 450 TJ = −40°C 400 TJ = 25°C TJ = 85°C 350 300 250 200 150 100 50 0 0 1 1100 40 IBIAS, BIAS PIN CURRENT (mA) 45 1000 900 800 700 TJ = −40°C TJ = 25°C TJ = 85°C 400 0 200 400 600 800 35 30 25 20 15 TJ = −40°C 10 TJ = 25°C TJ = 85°C 5 0 0.1 1000 1 10 100 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 5. VBIAS Dropout Voltage vs. IOUT and TJ Figure 6. BIAS Pin Current vs. IOUT and TJ 60 TJ = −40°C 50 TJ = 25°C TJ = 85°C 40 30 20 10 0 2 4 Figure 4. VIN Dropout Voltage vs. VBIAS − VOUT and TJ 1200 IBIAS, BIAS CURRENT (mA) VDO (VBIAS − VOUT), DROPOUT VOLTAGE (mV) Figure 3. VIN Dropout Voltage vs. IOUT and TJ 500 3 VBIAS − VOUT (V) IOUT, OUTPUT CURRENT (mA) 600 2 3 4 VBIAS, BIAS VOLTAGE (V) 5 Figure 7. BIAS Pin Current vs. VBIAS and TJ www.onsemi.com 6 1000 NCP139 100 90 IOUT = 1 A 80 IOUT = 10 mA 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M 10M f, FREQUENCY (Hz) PSRR, POWER SUPPLY REJECTION RATIO (dB) PSRR, POWER SUPPLY REJECTION RATIO (dB) TYPICAL CHARACTERISTICS (continued) (At TJ = +25°C, VIN = VOUT(NOM) + 0.3 V, VBIAS = 3 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 1 A, CIN = 10 mF, CBIAS = 1 mF, and COUT = 10 mF (effective capacitance), unless otherwise noted) 100 90 IOUT = 1 A 80 IOUT = 10 mA 70 60 50 40 30 20 10 0 10 SPECTRAL NOISE DENSITY (V/√Hz) SPECTRAL NOISE DENSITY (V/√Hz) IOUT = 1 A IOUT = 10 mA 100n 10n 100 1k 10k 100k 1M 10k 100k 1M 10M Figure 9. VIN PSRR vs. Frequency VOUT(NOM) = 1.8 V 10m 1n 10 1k f, FREQUENCY (Hz) Figure 8. VIN PSRR vs. Frequency VOUT(NOM) = 1.0 V 1m 100 10M 10m IOUT = 1 A IOUT = 10 mA 1m 100n 10n 1n 10 100 1k 10k 100k 1M 10M f, FREQUENCY (Hz) f, FREQUENCY (Hz) Figure 10. Output Voltage Spectral Noise Density vs. Frequency − VOUT(NOM) = 1.0 V Figure 11. Output Voltage Spectral Noise Density vs. Frequency − VOUT(NOM) = 1.8 V www.onsemi.com 7 NCP139 50 mV/div VOUT VOUT IOUT 1 A/div IOUT 400 ms/div Figure 12. Load Transient Response Figure 13. Load Transient Response IOUT = 1 mA to 1 A in 1 ms, COUT = 10 mF IOUT = 1 mA to 1 A in 1 ms, COUT = 10 mF 1 V/div 200 ms/div VIN 50 mV/div VIN VOUT VOUT 5 ms/div 20 ms/div Figure 14. VIN Line Transient Response, Figure 15. VIN Line Transient Response, 2 V/div VIN = 1.3 V 2.3 V in 1 ms, IOUT = 10 mA, COUT = 10 mF 200 mV/div 50 mV/div 1 V/div 1 A/div 50 mV/div TYPICAL CHARACTERISTICS (continued) (At TJ = +25°C, VIN = VOUT(NOM) + 0.3 V, VBIAS = 3 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 1 A, CIN = 10 mF, CBIAS = 1 mF, and COUT = 10 mF (effective capacitance), unless otherwise noted) VIN = 1.3 V 2.3 V in 1 ms, IOUT = 1 A, COUT = 10 mF VEN VOUT 50 ms/div Figure 16. Enable Transient Response, COUT = 10 mF, IOUT = 0 A; 1 A www.onsemi.com 8 NCP139 APPLICATIONS INFORMATION VBAT NCP139 EN Switch−mode DC/DC VOUT = 1.5 V 1.5 V LX IN EN R1 IN LOAD FB GND FB Processor 1.0 V OUT BIAS R2 GND I/O I/O To other circuits Figure 17. Typical Application: Low−Voltage DC/DC Post−Regulator with ON/OFF Functionality Dropout Voltage The NCP139 dual−rail very low dropout voltage regulator is using NMOS pass transistor for output voltage regulation from VIN voltage. All the low current internal control circuitry is powered from the VBIAS voltage. The use of an NMOS pass transistor offers several advantages in applications. Unlike PMOS topology devices, the output capacitor has reduced impact on loop stability. Vin to Vout operating voltage difference can be very low compared with standard PMOS regulators in very low Vin applications. The NCP139 offers smooth monotonic start-up. The controlled voltage rising limits the inrush current. The Enable (EN) input is equipped with internal hysteresis. NCP139 Voltage linear regulator Fixed and Adjustable version is available. Because of two power supply inputs VIN and VBIAS and one VOUT regulator output, there are two Dropout voltages specified. The first, the VIN Dropout voltage is the voltage difference (VIN – VOUT) when VOUT starts to decrease by percent specified in the Electrical Characteristics table. VBIAS is high enough; specific value is published in the Electrical Characteristics table. The second, VBIAS dropout voltage is the voltage difference (VBIAS – VOUT) when VIN and VBIAS pins are joined together and VOUT starts to decrease. Input and Output Capacitors The device is designed to be stable for ceramic output capacitors with Effective capacitance in the range from 10 mF to 22 mF. The device is also stable with multiple capacitors in parallel, having the total effective capacitance in the specified range. In applications where no low input supplies impedance available (PCB inductance in VIN and/or VBIAS inputs as example), the recommended CIN = 1 mF and CBIAS = 0.1 mF or greater. Ceramic capacitors are recommended. For the best performance all the capacitors should be connected to the NCP139 respective pins directly in the device PCB copper layer, not through vias having not negligible impedance. When using small ceramic capacitor, their capacitance is not constant but varies with applied DC biasing voltage, temperature and tolerance. The effective capacitance can be much lower than their nominal capacitance value, most importantly in negative temperatures and higher LDO output voltages. That is why the recommended Output capacitor capacitance value is specified as Effective value in the specific application conditions. Output Voltage Adjust The required output voltage of Adjustable devices can be adjusted from VREF to 3.0 V using two external resistors. Typical application schematics is shown in Figure 18. V BIAS CBIAS NCP139 ­ ADJ OUT BIAS V IN CIN V OUT R1 IN FB EN GND VEN V OUT + V REF 10 μF R2 ǒ1 ) R1ńR2Ǔ Figure 18. Typical Application Schematics It is recommended to keep the total serial resistance of resistors (R1 + R2) no greater than 100 kW. www.onsemi.com 9 NCP139 Enable Operation Thermal Protection The enable pin will turn the regulator on or off. The threshold limits are covered in the electrical characteristics table in this data sheet. If the enable function is not to be used then the pin should be connected to VIN or VBIAS. Internal thermal shutdown (TSD) circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When TSD activated , the regulator output turns off. When cooling down under the low temperature threshold, device output is activated again. This TSD feature is provided to prevent failures from accidental overheating. Activation of the thermal protection circuit indicates excessive power dissipation or inadequate heatsinking. For reliable operation, junction temperature should be limited to +85°C maximum. Current Limitation The internal Current Limitation circuitry allows the device to supply the full 1 A nominal current and short time current peaks up to 1.3 A but protects the device against Current Overload or Short. ORDERING INFORMATION Nominal Output Voltage Reference Voltage Marking Option NCP139AFCT05ADJT2G ADJ 0.5 V AY Output Active Discharge NCP139AFCTC05ADJT2G ADJ 0.5 V AY Output Active Discharge, Back Side Coating NCP139AFCT06ADJT2G ADJ 0.6 V A6 Output Active Discharge NCP139AFCTC06ADJT2G ADJ 0.6 V A6 Output Active Discharge, Back Side Coating NCP139AFCT100T2G 1.00 V − AK Output Active Discharge NCP139AFCT105T2G 1.05 V − AC Output Active Discharge NCP139AFCT110T2G 1.10 V − AJ Output Active Discharge NCP139AFCTC110T2G 1.10 V − AJ Output Active Discharge, Back Side Coating NCP139AFCT120T2G 1.20 V − AL Output Active Discharge NCP139AFCT180T2G 1.80 V − AZ Output Active Discharge Device Package Shipping† WLCSP6 (Pb−Free) 5000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. NOTE: To order other package and voltage variants, please contact your onsemi sales representative. www.onsemi.com 10 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WLCSP6, 1.20x0.80 CASE 567MV ISSUE B SCALE 4:1 DATE 05 JUN 2018 E A È PIN A1 REFERENCE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. D 0.05 C 2X DIM A A1 A2 b D E e 0.05 C 2X TOP VIEW A2 A 0.05 C 0.05 C A1 NOTE 3 6X GENERIC MARKING DIAGRAM* SIDE VIEW b 0.05 C A B MILLIMETERS MIN MAX 0.33 −−− 0.04 0.08 0.23 REF 0.24 0.30 1.20 BSC 0.80 BSC 0.40 BSC C SEATING PLANE e e C XXM XX = Specific Device Code M = Month Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.03 C B A 1 2 BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* A1 0.40 PITCH 0.40 PITCH PACKAGE OUTLINE 6X 0.20 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON06670G WLCSP6, 1.20x0.80 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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