DATA SHEET
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LDO Voltage Regulator Capacitor Free, Low Noise
150 mA
MARKING
DIAGRAMS
1
NCP140
The NCP140 is a 150 mA very low dropout regulator which offers
excellent voltage accuracy and clean output voltage for power
sensitive application. The NCP140 is very suitable for battery
powered application due to very low quiescent current and virtually
zero current at disable mode. This device is stable with or without
output capacitors and allows minimize footprint and BOM. The
XDFN4 package is optimized for use in space constrained
applications.
XDFN4, 0.8x0.8
CASE 711BF
XM
M
1
X
= Specific Device Code
MM = Date Code
1
XDFN4, 1.0x1.0
CASE 711AJ
XX M
1
XX = Specific Device Code
M = Date Code
Features
• Stable Operation with or without Capacitors
• Operating Input Voltage Range: 1.6 V to 5.5 V
• Available in Fixed Voltage Options: 1.5 V to 5 V
•
•
•
•
•
•
•
PIN CONNECTIONS
EN
3
Contact Factory for Other Voltage Options
±1% Typical Accuracy @ 25°C
Very Low Quiescent Current of Typ. 45 mA
Standby Current: 0.1 mA
Very Low Dropout: 125 mV for 3.3 V @ 150 mA
High PSRR: 55 dB @ 1 kHz
Available in − XDFN4 − 0.8 mm x 0.8 mm x 0.4 mm Package
− XDFN4 − 1.0 mm x 1.0 mm x 0.4 mm Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
2
GND
IN
4
1
OUT
(Bottom View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 13 of
this data sheet.
• Battery−powered Equipment
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
VIN
VOUT
OUT
IN
EN
ON
OFF
NCP140
GND
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2016
October, 2022 − Rev. 3
1
Publication Order Number:
NCP140/D
NCP140
IN
ENABLE
LOGIC
EN
BANDGAP
REFERENCE
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
INTEGRATED
SOFT−START
OUT
*ACTIVE DISCHARGE
EN
GND
*Active output discharge is available only for NCP140Axxx options.
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
1
OUT
Regulated output voltage pin. A small ceramic capacitor can be connected to improve fast load transient.
2
GND
Ground pin
3
EN
Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode.
4
IN
Input pin
−
EPAD
Expose pad must be connect to GND pin as short as possible. Soldered to a large ground copper plane allows for effective heat removal.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6
V
Output Voltage
VOUT
−0.3 V to VIN + 0.3 V or 6 V
V
Chip Enable Input
VCE
−0.3 V to 6 V
V
Output Short Circuit Duration
tSC
unlimited
s
Input Voltage (Note 1)
Maximum Junction Temperature
TJ
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, XDFN4 0.8 mm x 0.8 mm Thermal Resistance, Junction−to−Air (Note 3)
RqJA
252
°C/W
Thermal Characteristics, XDFN4 1.0 mm x 1.0 mm Thermal Resistance, Junction−to−Air (Note 3)
RqJA
265
°C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
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2
NCP140
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VIN = VOUT(NOM) + 0.5 V; IOUT = 1 mA, CIN = COUT = none, unless
otherwise noted. VEN = 0.9 V. Typical values are at TJ = +25°C. Min/Max values are for −40°C ≤ TJ ≤ 85°C (Note 3)
Parameter
Test Conditions
Symbol
Min
VIN
1.6
VOUT ≥ 1.8 V, TJ = 25°C
VOUT
Operating Input Voltage
Output Voltage Accuracy
Typ.
Max
5.5
V
%
±1
VOUT < 1.8 V, TJ = 25°C
Unit
mV
±20
VOUT ≥ 1.8 V, −40°C ≤ TJ ≤ 85°C
−2
+2
%
VOUT < 1.8 V, −40°C ≤ TJ ≤ 85°C
−50
+50
mV
Line Regulation
VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V
LineReg
1.0
5.0
mV
Load Regulation
IOUT = 0 mA to 150 mA
LoadReg
10
30
mV
VDO
255
390
mV
125
220
Dropout Voltage (Note 5)
Output Current Limit
Short Circuit Current
VOUT(NOM) = 1.8 V
IOUT = 150 mA
VOUT(NOM) = 3.3 V
VOUT = 90% VOUT(NOM)
ICL
230
mA
VOUT = 0V
ISC
250
Quiescent Current
IOUT = 0 mA
IQ
45
75
mA
Shutdown Current
VEN ≤ 0.4 V, VIN = 5.5 V
IDIS
0.1
1.0
mA
EN Input Voltage “H”
VENH
EN Input Voltage “L”
VENL
EN Pin Threshold Voltage
mA
V
0.9
0.4
EN Pin Current
VEN = 5.5 V
IEN
0.01
Turn−On Time
COUT = 1 mF, IOUT=150 mA,
From assertion of VEN to VOUT = 98%VOUT(NOM)
TON
100
ms
PSRR
62
dB
Power Supply Rejection Ratio
Output Noise Voltage
Thermal Shutdown Temperature
VIN = 3.5 V, VOUT(NOM) = 2.5 V,
IOUT = 10 mA
f = 100 Hz
f = 1 kHz
1.0
mA
55
VIN = 2.3 V, VOUT(NOM) = 1.8 V,
IOUT = 10 mA f = 100 Hz to 100 kHz
VN
17
mVRMS
Temperature increasing from TJ = +25°C
TSD
160
°C
Thermal Shutdown Hysteresis
Temperature falling from TSD
TSDH
20
°C
Output Discharge Pull−Down
VEN ≤ 0.4 V, A options only
RDISCH
100
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM).
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3
NCP140
TYPICAL CHARACTERISTICS
1.810
3.34
1.805
1.800
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
IOUT = 1 mA
1.795
1.790
IOUT = 150 mA
1.785
1.780
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
1.775
1.770
1.765
1.760
−40 −20
0
20
40
60
80
100
120
140
2.0
1.5
1.0
0.5
0
−40 −25
12.0
10.5
9.0
3.28
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
3.27
3.26
3.25
3.24
−40 −20
0
20
40
60
80
100
120 140
2.50
VIN = 2.3 to 5.5 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
2.5
13.5
IOUT = 150 mA
Figure 4. Output Voltage vs. Temperature −
VOUT = 3.3 V
3.0
15.0
3.30
3.29
Figure 3. Output Voltage vs. Temperature −
VOUT = 1.8 V
REGLINE, LINE REGULATION (mV)
3.5
IOUT = 1 mA
TJ, JUNCTION TEMPERATURE (°C)
−10
5
20
35
50
65
80
95
2.25
2.00
1.75
VIN = 4.3 to 5.5 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
1.50
1.25
1.00
0.75
0.50
0.25
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Line Regulation vs. Temperature −
VOUT = 1.8 V
Figure 6. Line Regulation vs. Temperature −
VOUT = 3.3 V
VIN = 2.3 V
VOUT = 1.8 V
IOUT = 0 to 150 mA
CIN = 1 mF
COUT = 1 mF
REGLOAD, LOAD REGULATION (mV)
REGLINE, LINE REGULATION (mV)
REGLOAD, LOAD REGULATION (mV)
4.0
3.32
3.31
TJ, JUNCTION TEMPERATURE (°C)
5.0
4.5
3.33
7.5
6.0
4.5
3.0
1.5
0
−40 −25
−10
5
20
35
50
65
80
95
15.0
13.5
12.0
10.5
9.0
VIN = 3.8 V
VOUT = 3.3 V
IOUT = 0 to 150 mA
CIN = 1 mF
COUT = 1 mF
7.5
6.0
VIN = 3.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
4.5
3.0
1.5
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Load Regulation vs. Temperature −
VOUT = 1.8 V
Figure 8. Load Regulation vs. Temperature −
VOUT = 3.3 V
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NCP140
47
47
46
46
45
TJ = 85°C
44
TJ = 25°C
43
TJ = −40°C
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
TYPICAL CHARACTERISTICS
42
41
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
40
39
38
37
0
15
30
60
45
75
105 120 135 150
90
45
TJ = 85°C
44
TJ = 25°C
43
TJ = −40°C
42
41
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
40
39
38
37
0
15
TJ, JUNCTION TEMPERATURE (°C)
50
45
IQ, QUIESCENT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
50
40
35
30 TJ = 85°C
25
15
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
IOUT = 0 mA
10
5
0
TJ = −40°C
0
1
2
3
4
5
6
35
105 120 135 150
TJ = 25°C
TJ = −40°C
30
25
20
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
IOUT = 0 mA
15
10
5
0
0
1
3
2
4
5
6
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Quiescent Current vs. Input Voltage −
VOUT = 1.8 V
Figure 12. Quiescent Current vs. Input Voltage −
VOUT = 3.3 V
200
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
315
280
VDROP, DROPOUT VOLTAGE (mV)
350
VDROP, DROPOUT VOLTAGE (mV)
90
TJ = 85°C
40
VIN, INPUT VOLTAGE (V)
TJ = 85°C
245
TJ = 25°C
210
175
TJ = −40°C
140
105
70
35
0
75
60
Figure 10. Ground Current vs. Load Current −
VOUT = 3.3 V
45
TJ = 25°C
45
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Ground Current vs. Load Current −
VOUT = 1.8 V
20
30
0
15
30
45
60
75
90
105 120 135
150
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
180
160
TJ = 85°C
140
TJ = 25°C
120
100
80
TJ = −40°C
60
40
20
0
0
15
30
45
60
75
90
105 120 135 150
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 13. Dropout Voltage vs. Load Current −
VOUT = 1.8 V
Figure 14. Dropout Voltage vs. Load Current −
VOUT = 3.3 V
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NCP140
TYPICAL CHARACTERISTICS
315
280
200
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
350
IOUT = 150 mA
1245
210
175
IOUT = 75 mA
140
105
70
35
0
−40 −25
IOUT = 10 mA
−10
5
20
35
50
65
95
80
IOUT = 150 mA
140
120
100
IOUT = 75 mA
80
60
40
20
0
−40 −25
IOUT = 10 mA
−10
5
20
35
50
65
80
95
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Dropout Voltage vs. Temperature −
VOUT = 1.8 V
Figure 16. Dropout Voltage vs. Temperature −
VOUT = 3.3 V
ISC, SHORT CIRCUIT CURRENT (mA)
285
270
VOUT = 3.3 V
255
240
225
VOUT = 1.8 V
210
195
VIN = VOUT(nom) + 0.5 V
VOUT = 90% VOUT(nom)
CIN = 1 mF
COUT = 1 mF
180
165
150
−40 −25
−10
5
20
35
50
65
80
95
300
285
270
VOUT = 3.3 V
255
240
VOUT = 1.8 V
225
210
195
VIN = VOUT(nom) + 0.5 V
VOUT = 0 V (short)
CIN = 1 mF
COUT = 1 mF
180
165
150
−40 −25
−10
5
20
35
50
65
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. Current Limit vs. Temperature
Figure 18. Short Circuit Current vs.
Temperature
1.0
80
95
500
0.9
IEN, ENABLE CURRENT (nA)
ICL, CURRENT LIMIT (mA)
160
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
TJ, JUNCTION TEMPERATURE (°C)
300
VEN, ENABLE VOLTAGE THRESHOLD (V)
180
0.8
0.7
OFF −> ON
0.6
ON −> OFF
0.5
0.4
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.3
0.2
0.1
0
−40 −20
0
20
40
60
80
100
120
140
450
400
350
300
250
200
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
150
100
50
0
−40 −25
−10
5
20
35
50
65
80
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Enable Threshold Voltage vs.
Temperature
Figure 20. Enable Current vs. Temperature
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95
NCP140
TYPICAL CHARACTERISTICS
RDIS, DISCHARGE RESISTIVITY (W)
IDIS, DISABLE CURRENT (nA)
100
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
80
60
40
20
0
−20
−40
−60
−80
−100
−40 −20
0
20
60
40
80
100
120 140
150
140
130
120
110
100
90
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
80
70
60
50
−40 −20
20
0
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 21. Disable Current vs. Temperature
Figure 22. Discharge Resistivity vs.
Temperature
OUTPUT VOLTAGE NOISE (nV/√Hz)
10K
1K
IOUT = 150 mA
RMS Output Noise (mV)
IOUT
10 Hz − 100 kHz
100 Hz − 100 kHz
10 mA
26.21
17.94
150 mA
27.51
19.11
100
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
10
1
10
IOUT = 10 mA
100
1K
10K
100K
1M
FREQUENCY (kHz)
Figure 23. Output Voltage Noise Spectral Density − VOUT = 1.8 V
70
IOUT = 1 mA
IOUT = 10 mA
60
90
VIN = 2.3 V+100mVpp
VOUT = 1.8 V
CIN = none
COUT = 1 mF MLCC 1206
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
80
50
40
IOUT = 75 mA
30
20 IOUT = 150 mA
10
0
10
100
1K
10K
100K
1M
80
70
60
50
IOUT = 10 mA
40
30
IOUT = 75 mA
20 I
OUT = 150 mA
10
0
10M
VIN = 3.8 V+100mVpp
VOUT = 3.3 V
CIN = none
COUT = 1 mF MLCC 1206
IOUT = 1 mA
10
100
1K
10K
100K
1M
10M
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 24. PSRR for Various Output Currents,
VOUT = 1.8 V
Figure 25. PSRR for Various Output Currents,
VOUT = 3.3 V
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NCP140
TYPICAL CHARACTERISTICS
COUT = 1 mF
60
COUT = 4.7 mF
50
40
30
10
100
1K
COUT = none
10K
100K
1M
70
VIN = 3.3 V
60
VIN = 5.5 V
50
VIN = 2.3 V
40
30
VRIPPLE = 100mVpp
VOUT = 3.3 V
IOUT = 10 mA
CIN = none
COUT = none
20
10
0
10M
VIN = 3.8 V
10
100
1K
10K
100K
1M
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 26. PSRR for Different Output Capacitor,
VOUT = 3.3 V
Figure 27. PSRR for Different Output VIN,
VOUT = 3.3 V
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
100 ms/div
Figure 28. Enable Turn−on Response −
COUT = None, IOUT = 10 mA
Figure 29. Enable Turn−on Response −
COUT = None, IOUT = 150 mA
VEN
500 mV/div
IINPUT
VOUT
IINPUT
200 ms/div
500 mV/div
VOUT
500 mV/div
IINPUT
VEN
50 mA/div
VEN
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VEN
IINPUT
VOUT
VIN = 2.3 V
VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
200 ms/div
200 ms/div
Figure 30. Enable Turn−on Response −
COUT = 470 nF, IOUT = 10 mA
Figure 31. Enable Turn−on Response −
COUT = 470 nF, IOUT = 150 mA
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10M
50 mA/div
10
500 mV/div
20
VIN = 3.8 V+100mVpp
VOUT = 3.3 V
CIN = none
COUT = MLCC 1206
10 mA/div
500 mV/div
500 mV/div
500 mV/div
RR, RIPPLE REJECTION (dB)
70
0
500 mV/div
80
COUT = 470 nF
10 mA/div
RR, RIPPLE REJECTION (dB)
80
NCP140
TYPICAL CHARACTERISTICS
500 mV/div
2.3 V
VIN
50 mV/div
50 mV/div
500 mV/div
3.3 V
VOUT
3.3 V
2.3 V
VIN
VOUT
VOUT = 1.8 V, IOUT = 10 mA
CIN = none, COUT = 470 nF (MLCC)
VOUT = 1.8 V, IOUT = 10 mA
CIN = none, COUT = none
20 ms/div
20 ms/div
Figure 32. Line Transient Response −
COUT = None
Figure 33. Line Transient Response −
COUT = 470 nF
50 mA/div
tRISE = 1 ms
200 mV/div
IOUT
VOUT
VIN = 3.8 V
VOUT = 3.3 V
CIN = none
COUT = none
tFALL = 1 ms
VOUT
VIN = 3.8 V
VOUT = 3.3 V
CIN = none
COUT = none
5 ms/div
Figure 35. Load Transient Response −
150 mA to 1 mA − COUT = None
IOUT
50 mA/div
5 ms/div
Figure 34. Load Transient Response −
1 mA to 150 mA − COUT = None
tRISE = 1 ms
200 mV/div
200 mV/div
50 mA/div
200 mV/div
50 mA/div
IOUT
VOUT
VIN = 3.8 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT
tFALL = 1 ms
VOUT
VIN = 3.8 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
5 ms/div
50 ms/div
Figure 36. Load Transient Response −
1 mA to 150 mA − COUT = 1 mF
Figure 37. Load Transient Response −
150 mA to 1 mA − COUT = 1 mF
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NCP140
TYPICAL CHARACTERISTICS
50 mA/div
IOUT
tRISE = 2 ms
VOUT
200 mV/div
200 mV/div
50 mA/div
IOUT
VOUT
VIN = 3.8 V, VOUT = 1.8 V
CIN = none, COUT = none
5 ms/div
5 ms/div
Figure 38. Load Transient Response −
1 mA to 150 mA − tRISE = 2 ms
Figure 39. Load Transient Response −
150 mA to 1 mA − tFALL = 2 ms
TSD cycling
500 mV/div
VOUT
Overheating
Thermal
Shutdown
VOUT
1 V/div
IOUT
VIN = 5.5 V
VOUT = 1.8 V
CIN = none
COUT = none
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
VEN
COUT = 1 mF
COUT = 470 nF
COUT = none
10 ms/div
100 ms/div
Figure 40. Over Temperature Protection − TSD
Figure 41. Enable Turn−Off
VIN
VOUT
500 mV/div
50 mA/div
500 mV/div
VIN = 3.8 V, VOUT = 1.8 V
CIN = none, COUT = none
tFALL = 2 ms
VIN = 4.3 V
VOUT = 3.3 V
CIN = none
COUT = none
20 ms/div
Figure 42. Slow VIN Ramp
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10
NCP140
APPLICATIONS INFORMATION
General
Output Current Limit
The NCP140 is high performance low dropout regulator
capable of supplying 150 mA and providing very stable
output voltage with or without capacitors. The device is
designed to remain stable with any type of capacitor or even
without input and output capacitor. The NCP140 also offers
low quiescent current and very small packages suitable for
space constrains application. In connection with no
capacitor requirements the regulator is very useful in
wearable application, smartphones and everywhere where is
high power density required.
Output Current is internally limited within the IC to a
typical 230 mA. The NCP140 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to approximately 250 mA. The current
limit and short circuit protection will work properly over
whole temperature range and also input voltage range. There
is no limitation for the short circuit duration.
Input and Output Capacitor Selection
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Thermal Shutdown
In spite of the NCP140 is designed as capless device
capacitors can be added to improve dynamic behavior such
as fast load transient or PSRR. Recommendation for
selection input and output capacitor is very similar as for
high performance LDO. Low ESR ceramic capacitor is the
most beneficial for improvement load transient and PSRR
but suitable is almost any type of capacitor. The NCP140
remains stable with electrolytic and tantalum capacitor too.
Enable Operation
The NCP140 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage is 0.9 V the device is guaranteed to
be enabled. The NCP140 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 100 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
Power Dissipation
As power dissipated in the NCP140 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
The maximum power dissipation the NCP140 can handle
is given by:
P D(MAX) +
ƪ85° C * T Aƫ
q JA
(eq. 1)
The power dissipated by the NCP140 for given
application conditions can be calculated from the following
equation:
P D [ V INǒI GND@I OUTǓ ) I OUTǒV IN * V OUTǓ
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11
(eq. 2)
350
0.70
qJA, 1 oz Cu
300
0.65
qJA, 2 oz Cu
250
0.60
200
0.55
PD(MAX), TA = 25°C, 2 oz Cu
0.50
150
PD(MAX), TA = 25°C, 1 oz Cu
100
0.45
50
0
0.40
0
100
200
300
400
500
600
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
NCP140
0.35
700
PCB COPPER AREA (mm2)
350
0.60
qJA, 1 oz Cu
300
0.55
qJA, 2 oz Cu
250
0.50
PD(MAX), TA = 25°C, 2 oz Cu
200
0.45
PD(MAX), TA = 25°C, 1 oz Cu
150
0.40
100
0.35
50
0.30
0
0
100
200
300
400
500
600
700
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
Figure 43. qJA and PD (MAX) vs. Copper Area (XDFN4− 0.8 x 0.8 mm)
0.25
PCB COPPER AREA (mm2)
Figure 44. qJA and PD (MAX) vs. Copper Area (XDFN4− 1 x 1 mm)
Reverse Current
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT, TA.
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
PCB Layout Recommendations
Larger copper area connected to the pins will improve the
device thermal resistance and improve maximum power
dissipation. The actual power dissipation can be calculated
from the equation above (Equation 2). Expose pad should be
tied the shortest path to the GND pin.
Turn−On Time
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
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12
NCP140
ORDERING INFORMATION
Nominal
Output
Voltage
Description
Marking
Package
Shipping†
NCP140AMXC180TCG
1.8 V
Active Output Discharge
GA
3000 / Tape & Reel
NCP140AMXC280TCG
2.8 V
GC
XDFN4
(Pb−Free)
CASE 711BF
NCP140AMXC300TCG
3.0 V
GE
NCP140AMXC330TCG
3.3 V
GD
NCP140BMXC330TCG
3.3 V
Without Active Output Discharge
NCP140AMXD180TCG (Note 6)
1.8 V
Active Output Discharge
NCP140AMXD280TCG (Note 6)
2.8 V
GC
XDFN4
(Pb−Free)
CASE 711AJ
3000 or 5000 /
Tape & Reel
(Note 6)
NCP140AMXD300TCG
3.0 V
GE
NCP140AMXD330TCG (Note 6)
3.3 V
GD
NCP140BMXD330TCG
3.3 V
Device
Without Active Output Discharge
G2
GA
G2
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
6. Product processed after October 1, 2022 are shipped with quantity 5000 units / tape & reel.
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE C
GENERIC
MARKING DIAGRAM*
XX M
1
DOCUMENT NUMBER:
DESCRIPTION:
XX = Specific Device Code
M = Date Code
98AON67179E
XDFN4, 1.0X1.0, 0.65P
DATE 08 MAR 2022
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
XDFN4 0.8x0.8, 0.48P
CASE 711BF
ISSUE O
1
SCALE 4:1
PIN ONE
REFERENCE
2X
0.05 C
EXPOSED Cu
A
B
D
ÉÉ
ÉÉ
ÉÉ
ÇÇ
ALTERNATE
CONSTRUCTION
L2
L2
TOP VIEW
DETAIL B
L2
A
0.05 C
(A3)
A1
L2
L1
DETAIL A
DETAIL A
ALTERNATE
CONSTRUCTION
0.05 C
NOTE 4
C
SIDE VIEW
SEATING
PLANE
4X
e
e/2
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINALS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MOLD CMPD
DETAIL B
E
0.05 C
2X
DATE 26 FEB 2016
0.32
0.12
4X
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
L2
MILLIMETERS
MIN
MAX
0.33
0.43
0.00
0.05
0.127 REF
0.17
0.27
0.80 BSC
0.20
0.30
0.80 BSC
0.20
0.30
0.48 BSC
0.17
0.27
−−−
0.10
0.06 REF
GENERIC
MARKING DIAGRAM*
0.19
E2
D2
1
2
XXM
45 5
DETAIL C
DETAIL A
4X
L
3
4
4X
BOTTOM VIEW
XX = Specific Device Code
M = Date Code
b
0.10
M
C A B
0.05
M
C
NOTE 3
RECOMMENDED
MOUNTING FOOTPRINT*
4X
1
0.29
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
4X
0.36
0.32
1.00
DETAIL C
0.48
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON09326G
XDFN4 0.8X0.8, 0.48P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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