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NCP1423EVB

NCP1423EVB

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    -

  • 描述:

    EVAL BOARD FOR NCP1423

  • 数据手册
  • 价格&库存
NCP1423EVB 数据手册
NCP1423, SCV1423 Boost Converter Sync-Rect, PFM, DC-DC, True-Cutoff, Ring-Killer 400 mA NCP1423 is a monolithic micropower high frequency step−up switching converter IC specially designed for battery operated hand −held electronic products. It integrates Synchronous Rectifier for improving efficiency as well as eliminating the external Schottky Diode. High switching frequency (up to 600 kHz) allows low profile inductor and output capacitor being used. When the IC is disabled, internal conduction path from LX or BAT to OUT is blocked, OUT pin is isolated from the battery. This achieves True−Cutoff. Ring−Killer is also integrated to eliminate the high frequency ringing in discontinuous conduction mode. Low−Battery Detector, Cycle−by−Cycle Current Limit, Overvoltage Protection and Thermal Shutdown provide value −added features for various battery operated application. With all of these functions ON, the quiescent supply current is only 9.0 mA. This device is available in compact Micro10 package. Features • High Efficiency: 92% for 3.3 V Output@ 400 mA from 2.5 V Input • • • • • • • • • • • • • • • • 87% for 1.8 V Output@ 70 mA from 1.2 V Input High Switching Frequency, up to 600 kHz (not hitting current limit) Low Quiescent Current of 9.0 mA Low Battery Detector 0.8 V Startup External Adjustable Output Voltage ±1.5% Output Voltage Accuracy Ring−Killer for Discontinuous Conduction Mode Thermal Shutdown 1.2 A Cycle−by−Cycle Current Limit Output Current up to 400 mA @ VOUT = 3.3 V, 200 mA @ VOUT = 1.8 V Overvoltage Protection Low Profile and Minimum External Part Open Drain Low−Battery Detector Output Compact Micro10 Package SCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant Typical Applications • • • • • • Wireless Optical Mouse Wireless Headsets Internet Audio Players Personal Digital Assistants (PDAs) Hand−held Instruments Conversion from one/two NiMH or NiCd cells to 1.8 V / 3.3 V © Semiconductor Components Industries, LLC, 2014 August, 2019 − Rev. 8 1 http://onsemi.com MARKING DIAGRAM Micro10 DM SUFFIX CASE 846B XXX AYWG G XXX = DAR (NCP1423) = GEN (SCV1423) A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS EN 1 REF 2 10 LBO Micro10 9 LBI 8 ADEN FB 3 GND 4 7 LX OUT 5 6 BAT (Top View) ORDERING INFORMATION Device Package Shipping† NCP1423DMR2G Micro10 (Pb−Free) 4000 Tape & Reel SCV1423DMR2G Micro10 (Pb−Free) 4000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NCP1423/D NCP1423, SCV1423 ON OFF C1 100k EN * LBO REF R1 0.2 mF 22 mF COUT R3 LBI FB R2 Low battery open drain output ON OFF ADEN GND LX OUT BAT R4 Low battery sense input 5.6 mH 10 mF CIN NCP1423, SCV1423 * Optional Figure 1. Typical Operation Circuit PIN DESCRIPTION Pin No. Symbol Description 1 EN Low−Battery Detector Input and Enable. With this pin pulled down below 0.5 V, the device will be disabled and will enter shutdown mode 2 REF 1.195 V Reference Voltage Output, bypass with 0.1 mF capacitor if this pin is not loaded, with a 1.0 mF bypassing capacitor, this pin can be loaded up to 2.5 mA @ VOUT = 3.3 V. 3 FB 4 GND Output Voltage Feedback Input Ground 5 OUT Power Output. OUT provides bootstrap power to the IC 6 BAT Battery supply input pin and connection for internal Ring−Killer 7 LX 8 ADEN 9 LBI Low−Battery Detector Input 10 LBO Open−Drain Low−Battery Detector Output. Output is Low when VLBI is < 500 mV. LBO is high impedance shutdown N−Channel and P−Channel Power MOSFET Drain Auto Discharge Input MAXIMUM RATINGS Rating Symbol Value Unit VOUT −0.3, 6.0 V Input / Output Pins (Pins 1−3,5,7−10) VIO −0.3, 6.0 V Thermal Characteristics Micro10 Plastic Package, Case 846B, TA = 25°C Thermal Resistance Junction−to−Air PD RqJA 480 250 mW °C/W Operating Junction Temperature Range TJ − 40 to + 150 °C Operating Ambient Temperature Range TA − 40 to + 85 °C Storage Temperature Range Tstg − 55 to +150 °C Power Supply (Pin 6) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. NOTE: ESD data available upon request. 1. This device contains ESD protection and exceeds the following tests: Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114. Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115. 2. The maximum package power dissipation limit must not be exceeded. TJ(max) * TA PD + RqJA 3. Latchup Current Maximum Rating: ±150 mA per JEDEC standard: JESD78. 4. Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J−STD−020A. 5. Measured on approximately 1 in sq of 1 oz Cu. http://onsemi.com 2 NCP1423, SCV1423 ELECTRICAL CHARACTERISTICS (VOUT = 3.3 V, TA = 25°C for typical value, −40°C v TA v 85°C for min/max values unless otherwise noted.) Characteristic Operating Voltage Output Voltage Range Symbol Min Typ Max Unit VIN 0.8 − VOUT V VOUT 1.8 − 3.3 V VIN_MIN − 0.85 0.90 V Reference Voltage (ILOAD = 0 mA, Cref = 100 nF, TA = 25°C) VREF 1.177 1.195 1.213 V Reference Voltage Temperature Coefficient TCVREF − 0.05 − mV/°C FB Input Threshold (ILOAD = 0 mA, TA = −40°C to 85°C) VFB 0.489 0.500 0.512 V FB Input Threshold (ILOAD = 0 mA, TA = 25°C) VFB 0.493 0.500 0.508 V FB Input Current IFB − 1.0 − nA Internal NFET ON−Resistance (ILX=100 mA, TA = 25°C) (Note 7) RDS(ON)_N − 0.3 0.45 W Internal PFET ON−Resistance (ILX=100 mA, TA = 25°C) (Note 7) RDS(ON)_P − 0.6 0.8 W ILIM − 1.2 − A Operating Current into OUT (VFB = 0.7 V, TA = 25°C) IQ − 9.0 12 mA Operating Current into BAT (VBAT = 1.2 V, VFB = 0.7 V, VLX = 1.2 V, TA = 25°C) IQBAT − 2.0 3.0 mA IBAT_SD − 0.5 1.5 mA LX Switch MAX. ON−Time (VFB = 0 V) tON 1.15 1.4 2.8 ms LX Switch MIN. OFF−Time (VFB = 0 V) tOFF 80 200 350 ns RBAT_LX − 100 − W LBI Input Threshold VLBI 0.475 0.500 0.525 V LBI Input Hysteresis VLBI_HYS − 15 − mV Minimum Input Voltage for Startup LX Switch Current Limit (NFET) (Note 7) Shutdown Current into BAT (LBI/EN = 0 V, VBAT = 3.3 V, TA = 25°C) BAT to LX Resistance (VFB = 0.7 V) LBI Input Current ILBI − 1.5 − nA VLBO_L − − 0.2 V Maximum Continuous Output Current (VIN = 2.5 V, VOUT = 3.3 V) (Note 7) IOUT 200 − − mA Maximum Continuous Output Current (VIN = 0.8 V, VOUT = 3.3 V) (Note 7) IOUT 100 − − mA Soft Start Time (VIN = 1.2 V, TA = 25°C, CREF = 100 nF, VOUT = 3.3 V) (Note 6) TSS − 2.0 8.0 ms VSHDN 0.34 0.50 0.68 V IEN − 150 − nA LBO Low Output Voltage (VLBI = 0 V, ISINK = 1.0 mA) EN Shutdown Threshold (VBAT = 1.2 V) EN Input Current ADEN Threshold (VBAT = 0.9 V to 3.3 V) VADEN ADEN Input Current IADEN ADEN Switch Resistance RADEN 0.5*VBAT − 100 V − 100 nA W Thermal Shutdown Temperature (Note 7) TSHDN − − 145 °C Thermal Shutdown Hysteresis (Note 7) TSDHYS − 30 − °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. Value depends on voltage at VOUT. 7. Values are guaranteed by design. http://onsemi.com 3 NCP1423, SCV1423 VBAT M3 ZLC EN 1 0.5 V + - Chip Enable + VDD 20 mV TRUE CUTOFF CONTROL CONTROL LOGIC _ZCUR _TSDON LX 7 VOUT OUT 5 M2 VDD BAT 6 SENSEFET™ _MSON _MAINSW2ON M1 GND FB + - 3 REF 4 GND _CEN GND VDD _PFM _MAINSWOFD PFM _SYNSW2ON 1.2 V 2 GND _SYNSWOFD Voltage Reference ADEN _VREFOK 8 _ILIM 0.5 V + - LBI 9 RSENSE + LBO 10 GND + - GND Figure 2. Detailed Block Diagram http://onsemi.com 4 NCP1423, SCV1423 TYPICAL OPERATING CHARACTERISTICS 1.25 CREF = 0.1 mF VIN = 1.2 V VOUT = 3.3 V TA = 25°C 1.25 1.23 VREF, REFERENCE VOLTAGE (V) VREF, REFERENCE VOLTAGE (V) 1.27 1.21 1.19 1.17 1.15 1 10 100 1.23 1.21 1.19 1.17 1.13 1.5 1000 2 2.5 3 3.5 4 4.5 5 ILOAD, OUTPUT CURRENT (mA) VOUT, VOLTAGE AT OUT PIN, (V) Figure 3. Reference Voltage vs. Output Current Figure 4. Reference Voltage vs. Voltage at OUT Pin RDS(ON), SWITCH ON RESISTANCE (W) VREF, REFERENCE VOLTAGE (V) 1.210 1.205 1.200 1.195 1.190 VOUT = 3.3 V CREF = 0.1 mF IREF = 0 mA 1.185 1.180 −50 −25 0 25 50 75 100 1.0 VOUT = 3.3 V 0.8 P−FET (M2) 0.6 0.4 N−FET (M1) 0.2 0.0 −40 TA, AMBIENT TEMPERATURE (°C) 0 20 40 60 80 100 Figure 6. Switch ON Resistance vs. Temperature 0.56 IQ, OPERATION CURRENT (mA) 18 0.54 0.52 0.50 0.48 0.46 TA = 25°C 0.44 −50 −20 TA, AMBIENT TEMPERATURE, (°C) Figure 5. Reference Voltage vs. Temperature VLBI, LOW BATTERY DETECT VOLTAGE (V) CREF = 0.1 mF IREF = 0 mA TA = 25°C 1.15 −25 0 25 50 75 15 12 9 6 3 0 −50 100 VOUT = 3.3 V TA, AMBIENT TEMPERATURE (°C) −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) Figure 7. Low Battery Detect Voltage vs. Temperature Figure 8. Operation Current vs. Temperature http://onsemi.com 5 100 NCP1423, SCV1423 TYPICAL OPERATING CHARACTERISTICS 5 4 3 2 1 0 −50 IADEN, ADEN PIN INPUT CURRENT (nA) IBAT_SD, SHUTDOWN CURRENT (mA) 15.0 VOUT = 3.3 V −25 0 25 50 75 100 10.0 7.5 5.0 2.5 0.0 −50 25 50 75 100 Figure 10. Shutdown Current vs. Temperature 125 100 75 50 −25 0 25 50 75 100 0.53 0.52 0.50 0.49 0.48 0.47 −50 1.6 1.4 1.2 1.0 25 50 75 100 tOFF, LX SWITCH MINIMUM OFF TIME (ms) VOUT = 3.3 V 0 0 25 50 75 100 Figure 12. Feedback Threshold Voltage vs. Temperature 2.0 −25 −25 TA, AMBIENT TEMPERATURE (°C) Figure 11. ADEN Pin Input Current vs. Temperature 1.8 VOUT = 3.3 V 0.51 TA, AMBIENT TEMPERATURE (°C) tON, LX SWITCH MAXIMUM ON TIME (ms) 0 Figure 9. LBI Input Current vs. Temperature 150 0.8 −50 −25 TA, AMBIENT TEMPERATURE (°C) 175 25 −50 VOUT = 3.3 V 12.5 TA, AMBIENT TEMPERATURE (°C) VFB, FEEDBACK THRESHOLD VOLTAGE (V) ILBI, LBI INPUT CURRENT (nA) 6 0.26 VOUT = 3.3 V 0.24 0.22 0.20 0.18 0.16 0.14 −50 TA, AMBIENT TEMPERATURE (°C) −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) Figure 13. LX Switch Maximum ON Time vs. Temperature Figure 14. LX Switch Minimum OFF Time vs. Temperature http://onsemi.com 6 100 NCP1423, SCV1423 TYPICAL OPERATING CHARACTERISTICS 250 1.6 VBATT, MINIMUM STARTUP BATTERY VOLTAGE (V) IEN, EN PIN INPUT CURRENT (nA) 300 VOUT = 3.3 V 1.4 1.2 200 150 1.0 0.6 50 0 −50 −25 0 25 50 75 0.4 100 OUTPUT VOLTAGE CHANGE (%) OUTPUT VOLTAGE CHANGE (%) 200 250 6 0 −2 1.5 V VOUT = 3.3 V, L = 5.6 mH CIN = 10 mF, COUT = 22 mF TA = 25°C 1.0 V 10 100 4 2 1.0 V −2 −4 −6 1 1000 VIN = 1.5 V 0 ILOAD, OUTPUT LOADING CURRENT (mA) 1.2 V VOUT = 1.8 V, L = 5.6 mH CIN = 10 mF, COUT = 22 mF TA = 25°C 10 100 1000 ILOAD, OUTPUT LOADING CURRENT (mA) Figure 17. Output Voltage Change vs. Load Current Figure 18. Output Voltage Change vs. Load Current 100 100 VIN = 2.5 V 90 EFFICIENCY (%) 90 EFFICIENCY (%) 150 Figure 16. Minimum Startup Battery Voltage vs. Loading Current 2 2.0 V 80 1.5 V VIN = 1.2 V 70 50 1 100 Figure 15. EN Input Current vs. Temperature VIN = 2.5 V 60 50 ILOAD, OUTPUT LOADING CURRENT (mA) 4 −6 1 0 TA, AMBIENT TEMPERATURE (°C) 6 −4 TA = 25°C VOUT = 3.3 V L = 5.6 mH CIN = 10 mF COUT = 22 mF VOUT > 0.9 x VSET 0.8 100 VOUT = 3.3 V CIN = 10 mF, COUT = 22 mF L = 5.6 mH, TA = 25°C VIN = 1.2 V, 1.5 V, 2.0 V, 2.5 V 10 VIN = 1.5 V 80 1.0 V 70 1.2 V 60 VOUT = 1.8 V CIN = 10 mF, COUT = 22 mF L = 5.6 mH, TA = 25°C VIN = 1.0 V, 1.2 V, 1.5 V 50 100 40 1000 1 10 100 ILOAD, OUTPUT LOADING CURRENT (mA) ILOAD, OUTPUT LOADING CURRENT (mA) Figure 19. Efficiency vs. Load Current Figure 20. Efficiency vs. Load Current http://onsemi.com 7 1000 NCP1423, SCV1423 250 VOUT = 3.3 V, L = 5.6 mH CIN = 10 mF, COUT = 22 mF TA = 25°C 200 IBATT, NO LOAD OPERATING CURRENT (mA) VRIPPLE, OUTPUT RIPPLE VOLTAGE (mVp−p) TYPICAL OPERATING CHARACTERISTICS 50 mA 150 100 mA 100 50 0 1.3 1.5 1.7 1.9 2.1 2.3 2.5 VBATT, BATTERY INPUT VOLTAGE (V) 15 12.5 10 7.5 5.0 2.5 1.8 L = 5.6 mH, CIN = 10 mF, COUT = 22 mF, TA = 25°C 2.1 2.4 2.7 3.0 3.3 VOUT, INPUT VOLTAGE AT OUT PIN (V) Figure 22. No Load Operating Current vs. Input Voltage at OUT Pin Figure 21. Output Ripple Voltage vs. Battery Input Voltage Upper Trace: Output Voltage Waveform, 2.0 V/Division Middle Trace: Input Voltage Waveform, 1.0 V/Division Lower Trace: Inductor Current Waveform, 500 mA/Division Upper Trace: Voltage at LBI Pin, 0.5 V/Division Lower Trace: Voltage at LBO Pin, 1.0 V/Division (VIN = 1.8 V, VOUT = 3.3 V, L = 5.6 mH, ILOAD = 60 mA) Figure 23. Low Battery Detect Figure 24. Startup Transient Response Upper Trace: Output Voltage Ripple, 100 mV/Division Middle Trace: Voltage at Lx pin, 2.0 V/Division Lower Trace: Inductor Current, 500 mA/Division (VIN = 1.5 V, VOUT = 3.3 V, ILOAD = 50 mA; L = 5.6 mH, COUT = 22 mF) Upper Trace: Output Voltage Ripple, 100 mV/Division Middle Trace: Voltage at LX pin, 2.0 V/Division Lower Trace: Inductor Current, 500 mA/Division (VIN = 1.5 V, VOUT = 3.3 V, ILOAD = 200 mA; L = 5.6 mH, COUT = 22 mF) Figure 25. Discontinuous Conduction Mode Switching Waveform Figure 26. Continuous Conduction Mode Switching Waveform http://onsemi.com 8 NCP1423, SCV1423 TYPICAL OPERATING CHARACTERISTICS Upper Trace: Output Voltage Ripple, 50 mV/Division Lower Trace: Battery Voltage, VIN, 1.0 V/Division (VIN = 1.2 V to 2.0 V; L = 5.6 mH, COUT = 22 mF, ILOAD = 50 mA) Upper Trace: Output Voltage Ripple, 50 mV/Division Lower Trace: Battery Voltage, VIN, 1.0 V/Division (VIN = 1.0 V to 1.6 V; L = 5.6 mH, COUT = 22mF, ILOAD = 50 mA) Figure 27. Line Transient Response for VOUT = 3.3 V Figure 28. Line Transient Response For VOUT = 1.8 V Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Load Current, ILOAD, 100 mA/Division (VOUT = 3.3 V, ILOAD = 10 mA to 200 mA; L = 5.6 mH, COUT = 22 mF) Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Load Current, ILOAD, 100 mA/Division (VOUT = 1.8 V, ILOAD = 10 mA to 100 mA; L = 5.6 mH, COUT = 22 mF) Figure 29. Load Transient Response For VIN = 1.5 V Figure 30. Load Transient Response For VIN = 1.0 V Upper Trace: Output Voltage, 2.0 V/Division Lower Trace: Output Current, 50 mA/Division Middle Trace: Enable Pin Waveform, 1.0 V/Division (VIN = 1.5 V, VOUT = 3.3 V, L = 5.6 mH, CIN = 10 mF, COUT = 22 mF) Upper Trace: Output Voltage, 2.0 V/Division Lower Trace: Output Current, 50 mA/Division Middle Trace: Enable Pin Waveform, 1.0 V/Division (VIN = 1.5 V, VOUT = 3.3 V, L = 5.6 mH, CIN = 10 mF, COUT = 22 mF) Figure 31. Startup Waveform (ADEN Disabled) Figure 32. Startup Waveform (ADEN Enabled) http://onsemi.com 9 NCP1423, SCV1423 DETAILED OPERATION DESCRIPTION introduced to make sure M1 is completely turned OFF before M2 is being turned ON. The previously mentioned situation occurs when the regulator is operating in CCM, M2 is being turned OFF, M1 is just turned ON, and M2 is not being completely turned OFF, A dead time is also needed to make sure M2 is completely turned OFF before M1 is being turned ON. As coil current is dropped to zero when the regulator is operating in DCM, M2 should be OFF. If this does not occur, the reverse current flows from the output bulk capacitor through M2 and the inductor to the battery input, causing damage to the battery. The ZLC comparator comes with fixed offset voltage to switch M2 OFF before any reverse current builds up. However, if M2 switch OFF too early, large residue coil current flows through the body diode of M2 and increases conduction loss. Therefore, determination on the offset voltage is essential for optimum performance. With the implementation of synchronous rectification scheme, efficiency can be as high as 90% with this device. NCP1423 is a monolithic micropower high−frequency step−up voltage switching converter IC specially designed for battery operated hand−held electronic products up to 200 mA loading. It integrates a Synchronous Rectifier to improving efficiency as well as to eliminate the external Schottky diode. High switching frequency (up to 600 kHz) allows for a low profile inductor and output capacitor to be used. Low−Battery Detector, Logic−Controlled Shutdown and Cycle−by−Cycle Current Limit provide value−added features for various battery−operated applications. With all these functions ON, the quiescent supply current is typical only 9 mA typical. This device is available in compact Micro10 package. PFM Regulation Scheme From the detailed block diagram (Figure 2), the output voltage is divided down and fed back to Pin 3 (FB). This voltage goes to the non−inverting input of the PFM comparator whereas the comparator’s inverting input is connected to the internal voltage reference, REF. A switching cycle is initiated by the falling edge of the comparator, at the moment the main switch (M1) is turned ON. After the maximum ON−time (typical 1.4 mS) elapses or the current limit is reached, M1 is turned OFF, and the synchronous switch (M2) is turned ON. The M1 OFF time is not less than the minimum OFF−time (typically 0.20 mS), which ensure complete energy transfer from the inductor to the output capacitor. If the regulator is operating in continuous conduction mode (CCM), M2 is turned OFF just before M1 is supposed to be ON again. If the regulator is operating in discontinuous conduction mode (DCM), which means the coil current will decrease to zero before the new cycle start, M1 is turned OFF as the coil current is almost reaching zero. The comparator (ZLC) with fixed offset is dedicated to sense the voltage drop across M2 as it is conducting, when the voltage drop is below the offset, the ZLC comparator output goes HIGH, and M2 is turned OFF. Negative feedback of closed loop operation regulates voltage at Pin 3 (FB) equal to the internal divide down reference voltage times (0.5 V). Cycle−by−Cycle Current Limit In Figure 2, SENSEFET is used to sample the coil current as M1 is ON. With that sample current flowing through a sense resistor, a sense−voltage is developed. Threshold detector (ILIM) detects whether the sense−voltage is higher than the preset level. If the sense voltage is higher than the present level, the detector output notifies the Control Logic to switch OFF M1, and M1 can only be switched ON when the next cycle starts after the minimum OFF−time (typically 0.20 mS). With proper sizing of SENSEFET and sense resistor, the peak coil current limit is typically set at 1.2 A. Voltage Reference The voltage at REF is typically set at 1.2 V and can output up to 2.5 mA with load regulation ±2.0%, at VOUT equal to 3.3 V. If VOUT is increased, the REF load capability can also be increased. A bypass capacitor of 200 nF is required for proper operation when REF is not loaded. If REF is loaded, 1.0 mF capacitor at REF pin is needed. True−Cutoff The NCP1423 has a True−Cutoff function controlled by the EN pin (Pin 1). Internal circuitry can isolate the current through the body diode of switch M2 to load. Thus, it can eliminate leakage current from the battery to load in shutdown mode and significantly reduces battery current consumption during shutdown. The shutdown function is controlled by the voltage at Pin 1 (EN). When Pin 1 is pulled to lower than 0.5 V, the controller enters shutdown mode. In shutdown mode, when the switches M1 and M2 are both switched OFF, the internal reference voltage of the controller is disable and the controller typically consumes only 600 nA of current. If the Pin 1 voltage is raised to higher than 0.5 V, for example, by a resistor connected to VIN, the Synchronous Rectification The Synchronous Rectifier is used to replace the Schottky Diode to reduce the conduction loss contributed by the forward voltage of the Schottky Diode. The Synchronous Rectifier is normally realized by PowerFET with gate control circuitry that incorporates relatively complicated timing concerns. As the main switch (M1) is being turned OFF and the synchronous switch M2 is just turned ON with M1 not being completely turned OFF, current is shunt from the output bulk capacitor through M2 and M1 to ground. This power loss lowers overall efficiency and possibly damage the switching FETs. As a general practice, certain amount of dead time is http://onsemi.com 10 NCP1423, SCV1423 IC is enabled again, and the internal circuit typically consumes 9 mA of current from the OUT pin during normal operation. comparator output turns off the 50 W low side switch. When this occurs, Pin 10 becomes high impedance and its voltage is pulled high again. Low−Battery Detection Auto Discharge A comparator with 15 mV hysteresis is applied to perform the low−battery detection function. When Pin 9 (LBI) is at a voltage (defined by a resistor divider from the battery voltage) lower than the internal reference voltage of 0.5 V, the comparator output turns on a 50 W low side switch. It pulls down the voltage at Pin 10 (LBO) which requires a hundred to a thousand kW of external pull−high resistance. If the Pin 9 voltage is higher than 0.5 V+15 mV, the Auto discharge function is using for ensure the output voltage status after the power down occur. This function is using for communication with a digital signal. When auto discharge function is enabled, the ADEN is set high; the output capacitor will be discharged after the device is shutdown. The capacitors connected to the output are discharged by an integrated switch of 100 W. The residual voltage on VOUT will be less than 0.4 V after auto discharge. APPLICATIONS INFORMATION Output Voltage Setting Capacitors Selection A typical application circuit is shown in Figure 1, The output voltage of the converter is determined by the external feedback network comprised of R1 and R2 and the relationship is given by: In all switching mode boost converter applications, both the input and output terminals see impulsive voltage / current waveforms. The currents flowing into and out of the capacitors multiply with the Equivalent Series Resistance (ESR) of the capacitor to produce ripple voltage at the terminals. During the Syn−Rect switch−off cycle, the charges stored in the output capacitor are used to sustain the output load current. Load current at this period and the ESR combined and reflect as ripple at the output terminals. For all cases, the lower the capacitor ESR, the lower the ripple voltage at output. As a general guideline, low ESR capacitors should be used. VOUT + 0.5 V ǒ1 ) R1 Ǔ R2 where R1 and R2 are the upper and lower feedback resistors, respectively. Low Battery Detect Level Setting The Low Battery Detect Voltage of the converter is determined by the external divider network comprised of R3 and R4 and the relationship is given by: VLBI + 0.5 V PCB Layout Recommendations ǒ1 ) R3 Ǔ R4 Good PCB layout plays an important role in switching mode power conversion. Careful PCB layout can help to minimize ground bounce, EMI noise, and unwanted feedback that can affect the performance of the converter. Hints suggested below can be used as a guideline in most situations. where R3 and R4 are the upper and lower divider resistors respectively. Inductor Selection The NCP1423 is tested to produce optimum performance with a 5.6 mH inductor at VIN = 1.3 V, VOUT = 3.3 V, supplying an output current up to 200 mA. For other input / output requirements, inductance in the range 3 mH to 10 mH can be used according to end application specifications. Selecting an inductor is a compromise between output current capability, inductor saturation limit and tolerable output voltage ripple. Low inductance values can supply higher output current but also increase the ripple at output and decrease efficiency. On the other hand, high inductance values can improve output ripple and efficiency; however, it also limited the output current capability at the same time. Another parameter of the inductor is its DC resistance. This resistance can introduce unwanted power loss and reduce overall efficiency. The basic rule is to select an inductor with lowest DC resistance within the board space limitation of the end application. Grounding A star−ground connection should be used to connect the output power return ground, the input power return ground, and the device power ground together at one point. All high−current paths must be as short as possible and thick enough to allow current to flow through and produce insignificant voltage drop along the path. The feedback signal path must be separated from the main current path and sense directly at the anode of the output capacitor. Components Placement Power components (i.e. input capacitor, inductor and output capacitor) must be placed as close together as possible. All connecting traces must be short, direct and thick. High current flowing and switching paths must be kept away from the feedback (FB, Pin 3) terminal to avoid unwanted injection of noise into the feedback path. http://onsemi.com 11 NCP1423, SCV1423 LAYOUT GUIDELINES Figure 33. Layout Guidelines http://onsemi.com 12 NCP1423, SCV1423 General Design Procedures Assume the efficiency h = 85% Determine the peak inductor ripple current, IRIPPLE−P and calculate the inductor value: Assume IRIPPLE−P is 40% of ILAVG, the inductance of the power inductor can be calculated as in below: Switching mode converter design is important. Suitable choice an inductor and capacitor value can make the converter has an optimum performance. Below a simple method base on the most basic first order equations to estimate the inductor and capacitor values for NCP1423 operate in Continuous Conduction Mode (CCM) is introduced. The component value set can be used as a starting point to fine−tune the circuit operation. By all means, detail bench testing is needed to get the best performance out of the circuit. IRIPPLE−P = 0.40 x 381 mA / h = 179 mA L+ A standard value of 5.6 mH is selected for initial trial. Determine the output voltage ripple, VOUT−RIPPLE and calculate the output capacitor value: VOUT−RIPPLE = 30 mVP−P at IOUT = 150 mA Design Parameters: For one cells supply application VIN = 1.1 V to 1.5 V, Typical 1.3 V VOUT = 3.3 V IOUT = 150 mA (200 mA max) VLB = 1.0 V VOUT−RIPPLE = 30 mVp−p at IOUT = 150 mA Calculate the feedback network: Select R2 = 100 k R1 + R2 COUT u V ǒ3.3 * 1Ǔ + 560 k 0.5 V Calculate the Low Battery Detect divider: VLB0 = 1.0 V Select R4 = 100 k R3 + R4 ESRCOUT Feedforward Capacitor (C1) Selection A feedforward capacitor might be required to be added in parallel to the upper feedback resistor to avoid double pulsing or group pulsing at the switching node which causes larger inductor ripple current and higher output voltage ripple. With adequate feedforward capacitor, evenly distributed single pulses at the switching node can be achieved. For NCP1423, the lower the switching frequency is, the larger the feedforward capacitor value should be. For initial trial value, the following equation can be used, but actual value may need fine tuning: ǒVVLB0 * 1Ǔ LB1 R3 + 100 k IOUT tON VOUT*RIPPLE * IOUT where tON = 1.4 mS and ESRCOUT = 0.1 W, From above calculation, you need at least 14 mF in order to achieve the specified ripple level at conditions stated. Practically, a one level larger capacitor will be used to accommodate factors not taken into account in the calculations. Therefore, a capacitor value of 22 mF is selected. The NCP1423 is internal compensated for most applications. But in case additional compensation is required, the capacitor C1 can be used as external compensation adjustment to improve system dynamics. ǒVVOUT * 1Ǔ FB R1 + 100 k 1.3 V 1.4 mS VIN tON + + 5.0 mH 2 IRIPPLE*P 2 (179 mA) V ǒ1.0 * 1Ǔ + 100 k 0.5 V Determine the steady state duty ratio, D for typical VIN, operation will be optimized around this point: VOUT + 1 1*D VIN C FF [ 1.3 V V D + 1 * IN + 1 * + 0.606 VOUT 3.3 V 1 2 p F SW 20 R1 FSW is the switching frequency measured for nominal load. If a feedforward capacitor is used, the equation provides an initial starting value. Some trimming of the feedback capacitor may be required depending on the desired output value. Determine the average inductor current, ILAVG at maximum IOUT: 150 mA I ILAVG + OUT + + 381 mA 1 * 0.606 1*D SENSEFET is a trademark of Semiconductor Components Industries, LLC. http://onsemi.com 13 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS Micro10 CASE 846B−03 ISSUE D DATE 07 DEC 2004 SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846B−01 OBSOLETE. NEW STANDARD 846B−02 −A− −B− K D 8 PL 0.08 (0.003) PIN 1 ID G 0.038 (0.0015) −T− M T B S A C SEATING PLANE H MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.95 1.10 0.20 0.30 0.50 BSC 0.05 0.15 0.10 0.21 4.75 5.05 0.40 0.70 DIM A B C D G H J K L S L J GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 10X 1.04 0.041 0.32 0.0126 3.20 0.126 8X xxxx AYW 10X 4.24 0.167 0.50 0.0196 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.037 0.043 0.008 0.012 0.020 BSC 0.002 0.006 0.004 0.008 0.187 0.199 0.016 0.028 SCALE 8:1 5.28 0.208 xxxx A Y W  = Device Code = Assembly Location = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, may or may not be present. mm  inches Micro10 DOCUMENT NUMBER: 98AON03799D Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed STATUS: ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped “CONTROLLED COPY” in red. NEW STANDARD:  Semiconductor Components Industries, LLC, 2002 Case Outline Number: http://onsemi.com Micro10 DESCRIPTION: October, 2002 − Rev. 0 PAGE 1 OFXXX 2 1 DOCUMENT NUMBER: 98AON03799D PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION. REQ BY J. HOSKINS. 09 NOV 2000 A DIM “D” WAS 0.25−0.4MM/0.10−0.016IN. ADDED NOTE 5. USED ON: WAS 10 LEAD TSSOP, PITCH 0.65 REQ BY J. HOSKINS. 13 NOV 2000 B CHANGED “USED ON” WAS: 10 LEAD TSSOP, PITCH 0.50MM. REQ BY A. HAMID. 11 JUL 2001 C CHANGED “D” DIMENSION MAX FROM 0.35 TO 0.30MM AND 0.014 TO 0.012IN. REQ BY D. TRUHITTE. 31 JUL 2003 D ADDED FOOTPRINT INFORMATION. REQ. BY K. OPPEN. 07 DEC 2004 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  Semiconductor Components Industries, LLC, 2004 December, 2004 − Rev. 03D Case Outline Number: 846B onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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