NCP1654

NCP1654 Power Factor Controller for Compact and Robust, Continuous Conduction Mode Pre-Converters The NCP1654 is a controller for Continuous Conduction Mode (CCM) Power Factor Correction step−up pre−converters. It controls the power switch conduction time (PWM) in a fixed frequency mode and in dependence on the instantaneous coil current. Housed in a SO8 package, the circuit minimizes the number of external components and drastically simplifies the PFC implementation. It also integrates high safety protection features that make the NCP1654 a driver for robust and compact PFC stages like an effective input power runaway clamping circuitry. Features http://onsemi.com MARKING DIAGRAM 8 8 1 SO−8 D SUFFIX CASE 751 1 xx A L Y W G = 65, 133 or 200 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package 54Bxx ALYW G • • • • • • • • • • • • • • • • • • • • • • • IEC61000−3−2 Compliant Average Current Continuous Conduction Mode Fast Transient Response Very Few External Components Very Low Startup Currents ( 200 mA Ics*Vbo > 200 mVA OPL OCP OL Ics Vbo Division + C1 S1 Vramp + Vdd +Iref Fault Q R R PWM Latch S 5 Vcontrol(min) + + Off Vout Low Detect OTA ±28 mA + UVP BO Bias Block Iref Vdd Vcc 7 Output Buffer 8 1 DRV GND VboH / VboL VboH = 1.3 V, VboL = 0.7 V Vref/10% Vref Vm 2 65/133/200 kHz Oscillator RM CM Im = (Ics*Vbo) / (4*(Vcontrol − Vcontrol(min)) Figure 1. Functional Block Diagram http://onsemi.com 6 NCP1654 TYPICAL CHARACTERISTICS 10 8 ROH VREF (V) ROL 2 0 −50 −25 0 25 50 75 100 125 6 4 2.60 ROH & ROL, GATE DRIVE RESISTANCE (W) 2.55 2.50 2.45 2.40 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 2. Gate Drive Resistance vs. Temperature 32 30 IEA_source (A) 28 26 24 22 20 −50 −20 −22 −24 −26 −28 −30 −32 −50 Figure 3. Reference Voltage vs. Temperature −25 0 25 50 75 100 125 IEA_sink (A) −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 4. Source Current Capability of the Error Amplifier vs. Temperature 300 150 100 250 IBpin6 (nA) 50 0 −50 150 −100 100 −50 GEA (mS) Figure 5. Sink Current Capability of the Error Amplifier vs. Temperature 200 −25 0 25 50 75 100 125 −150 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 6. Error Amplifier Gain vs. Temperature Figure 7. Feedback Pin Current vs. Temperature (@Vfb = VREF) http://onsemi.com 7 NCP1654 TYPICAL CHARACTERISTICS 4.0 3.9 VCONTROL(max) (V) DVCONTROL (V) −25 0 25 50 75 100 125 3.8 3.7 3.6 3.5 3.4 3.3 −50 3.3 3.2 3.1 3.0 2.9 2.8 2.7 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 8. Vcontrol Maximum Voltage vs. Temperature 95.1 95.0 94.9 VoutL / VREF (%) IBoost (mA) 94.8 94.7 94.6 94.5 94.4 94.3 −50 −25 0 25 50 75 100 125 260 250 240 230 220 210 200 Figure 9. Vcontrol Maximum Swing (DVCONTROL) vs. Temperature 190 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 10. Ratio (VOUT Low Detect Threshold / VREF) vs. Temperature 215 210 ICS(OPL1) (mA) 205 200 195 190 185 −50 306 286 266 246 226 206 −25 0 25 50 75 100 125 186 −50 Figure 11. Pin 5 Source Current when (VOUT Low Detect) is Activated vs. Temperature IS(OCP) (mA) −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 12. Over−Current Protection Threshold vs. Temperature Figure 13. Over−Power Current Threshold (@VBO = 0.9 V & Vm = 3 V) vs. Temperature http://onsemi.com 8 NCP1654 TYPICAL CHARACTERISTICS 110 100 ICS(OPL2) (mA) 90 80 70 60 −50 MAXIMUM DUTY CYCLE (%) −25 0 25 50 75 100 125 100 99 98 97 96 95 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 14. Over−Power Current Threshold (@VBO = 2.67 V & Vm = 3 V) vs. Temperature 72 70 68 fSW (kHz) 66 64 62 60 58 −50 −25 0 25 50 75 100 125 fSW (kHz) 140 138 136 134 132 130 128 126 −50 Figure 15. Maximum Duty Cycle vs. Temperature −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 16. Switching Frequency vs. Temperature (65 kHz Version) 210 205 200 fSW (kHz) 195 190 185 180 −50 Figure 17. Switching Frequency vs. Temperature (133 kHz Version) −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) Figure 18. Switching Frequency vs. Temperature (200 kHz Version) http://onsemi.com 9 NCP1654 TYPICAL CHARACTERISTICS 1.40 0.75 1.35 VBOH (V) VBOL (L) 1.30 0.70 1.25 1.20 −50 −25 0 25 50 75 100 125 0.65 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 19. Brown−Out Voltage Threshold (Rising) vs. Temperature 7.5 6.5 5.5 4.5 3.5 2.5 −50 2.66 Figure 20. Brown−Out Voltage Threshold (Falling) vs. Temperature 2.64 VOVP (V) −25 0 25 50 75 100 125 Im2 (mA) 2.62 2.60 2.58 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 21. Multiplier Output Current (Vcontrol = VCONTROL(max), Vbo = 0.9 V, ICS = 75 mA) vs. Temperature VUVP(on) / VREF and VUVP(off) / VREF (%) 107 16 14 12 10 8 6 4 2 0 −50 Figure 22. Over Voltage Threshold vs. Temperature 106 VOVP / VREF (%) 105 104 103 −50 −25 0 25 50 75 100 125 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 23. Ratio (Over Voltage Threshold / VREF) vs. Temperature Figure 24. UVP Activate and Deactivate Threshold Ratio vs. Temperature http://onsemi.com 10 NCP1654 TYPICAL CHARACTERISTICS 11.4 11.2 11.0 VCC(off) (V) −25 0 25 50 75 100 125 VCC(on) (V) 10.8 10.6 10.4 10.2 10.0 9.8 9.6 −50 9.7 9.5 9.3 9.1 8.9 8.7 8.5 8.3 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 25. VCC Start−Up Threshold (VCC Rising) vs. Temperature 2.0 1.8 ISTUP (mA) VCC(H) (V) 1.6 1.4 1.2 1.0 −50 50 40 30 20 10 0 −50 Figure 26. VCC Disable Voltage after Turn−On (VCC Falling) vs. Temperature −25 0 25 50 75 100 125 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 27. VCC UVLO Hysteresis vs. Temperature Figure 28. Supply Current in Startup Mode vs. Temperature 400 OPERATING CURRENT (mA) 4 350 ISTDN (mA) 3 ICC2, No Load, Switching ICC1, No Load, No Switching 300 2 250 1 200 −50 −25 0 25 50 75 100 125 0 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 29. Supply Current in Shutdown Mode vs. Temperature Figure 30. Operating Supply Current vs. Temperature http://onsemi.com 11 NCP1654 Detailed Operating Description Introduction The NCP1654 is a PFC driver designed to operate in fixed frequency, continuous conduction mode. The fixed frequency operation eases the compliance with EMI standard and the limitation of the possible radiated noise that may pollute surrounding systems. In addition, continuous conduction operation reduces the application di/dt and their resulting interference. More generally, the NCP1654 is an ideal candidate in systems where cost−effectiveness, reliability and high power factor are the key parameters. It incorporates all the necessary features to build a compact and rugged PFC stage: • Compactness and Flexibility: housed in a SO8 package, the NCP1654 requires a minimum of external components. In particular, the circuit scheme simplifies the PFC stage design and eliminates the need for any input voltage sensing. In addition, the circuit offers some functions like the Brown−Out or the true power limiting that enable the optimizations of the PFC design, • Low Consumption and Shutdown Capability: the NCP1654 is optimized to exhibit consumption as small as possible in all operation modes. The consumed current is particularly reduced during the start−up phase and in shutdown mode so that the PFC stage power losses are extremely minimized when the circuit is disabled. This feature helps meet the more stringent stand−by low power specifications. Just ground the Feed−back pin to force the NCP1654 in shutdown mode, • Safety Protections: the NCP1654 permanently monitors the output voltage, the coil current and the die temperature to protect the system from possible over−stresses. Integrated protections (Overvoltage protection, coil current limitation, thermal shutdown...) make the PFC stage extremely robust and reliable: − Maximum Current Limit: the circuit permanently senses the coil current and immediately turns off the power switch if it is higher than the set current limit. The NCP1654 also prevents any turn on of the power switch as long as the coil current is not below its maximum permissible level. This feature protects the MOSFET from possible excessive stress that could result from the switching of a current higher than the one the power switch is dimensioned for. In particular, this scheme effectively protects the PFC stage during the start−up phase when large in−rush currents charge the output capacitor. − Undervoltage Protection for Open Loop Protection or Shut−down: the circuit detects when the feed−back voltage goes below than about 8% of the • regulation level. In this case, the circuit turns off and its consumption drops to a very low value. This feature protects the PFC stage from starting operation in case of low AC line conditions or in case of a failure in the feed−back network (i.e. bad connection). − Fast Transient Response: given the low bandwidth of the regulation block, the output voltage of PFC stages may exhibit excessive over or under−shoots because of abrupt load or input voltage variations (e.g. at start up). If the output voltage is too far from the regulation level: Overvoltage Protection: NCP1654 turns off the power switch as soon as Vout exceeds the OVP threshold (105% of the regulation level). Hence a cost & size effective bulk capacitor of lower voltage rating is suitable for this application, Dynamic Response Enhancer: NCP1654 drastically speeds up the regulation loop by its internal 200 mA enhanced current source when the output voltage is below 95% of its regulation level. − Brown−Out Detection: the circuit detects low AC line conditions and disables the PFC stage in this case. This protection mainly protects the power switch from the excessive stress that could damage it in such conditions, − Over−Power Limitation: the NCP1654 computes the maximum permissible current in dependence of the average input voltage measured by the brown−out block. It is the second OCP with a threshold that is line dependent. When the circuit detects an excessive power transfer, it resets the driver output immediately, − Thermal Shutdown: an internal thermal circuitry disables the circuit gate drive and then keeps the power switch off when the junction temperature exceeds 150°C typically. The circuit resumes operation once the temperature drops below about 120°C (30°C hysteresis), − Soft Start: Vcontrol is pulled low brown−out detection activates, or Undervoltage protection activates, and no drive is provided. At start up, the “200 mA enhanced current source” is disabled. So there is only 28 mA to charge the compensation components, and makes Vcontrol raise gradually. This is to obtain a slow increasing duty cycle and hence reduce the voltage and current stress on the MOSFET. Hence it provides a soft−start feature. Output Stage Totem Pole: the NCP1654 incorporates a ±1.5A gate driver to efficiently drive TO220 or TO247 power MOSFETs. http://onsemi.com 12 NCP1654 PRINCIPLE OF NCP1654 SCHEME CCM PFC Boost A CCM PFC boost converter is shown in Figure 31. The input voltage is a rectified 50 ro 60 Hz sinusoidal signal. The MOSFET is switching at a high frequency (typically 65/133/200 kHz in NCP1654) so that the inductor current IL basically consists of high and low−frequency components. Filter capacitor Cfilter is an essential and very small value capacitor in order to eliminate the high−frequency component of the inductor IL. This filter capacitor cannot be too bulky because it can pollute the power factor by distorting the rectified sinusoidal input voltage. Iin Vin Cfilter RSENSE L IL + Vout Output Voltage The input filter capacitor Cfilter and the front−ended EMI filter absorbs the high−frequency component of inductor current IL. It makes the input current Iin a low−frequency signal only of the inductor current. Iin + I L*50 (eq. 2) where Iin is the input AC current. IL is the inductor current. IL−50 supposes a 50 Hz operation. The suffix 50 means it is with a 50 Hz bandwidth of the original IL. From (Equation 1) and (Equation 2), the input impedance Zin is formulated. Zin + V in T * t1 Vout + Iin T IL*50 (eq. 3) Cbulk where Zin is input impedance. Power factor is corrected when the input impedance Zin in (Equation 3) is constant or varies slowly in the 50 or 60 Hz bandwidth. VM Ich + Cramp 0 1 Vref + Vramp PFC Modulation R S Q Figure 31. CCM PFC Boost Converter PFC Methodology The NCP1654 uses a proprietary PFC methodology particularly designed for CCM operation. The PFC methodology is described in this section. IL Iin Clock Vref Vramp t1 T t2 Time VM VM without Filtering Clock Figure 32. Inductor Current in CCM Latch Set Latch Reset Output Inductor Current As shown in Figure 32, the inductor current IL in a switching period T includes a charging phase for duration t1 and a discharging phase for duration t2. The voltage conversion ratio is obtained in (Equation 1). t ) t2 Vout +1 +T t2 Vin T * t1 Vin + T * t1 Vout T (eq. 1) Figure 33. PFC Duty Modulation and Timing Diagram where Vout is the output voltage of PFC stage, Vin is the rectified input voltage, T is the switching period, t1 is the MOSFET on time, and t2 is the MOSFET off time. The PFC modulation and timing diagram is shown in Figure 33. The MOSFET on time t1 is generated by the intersection of reference voltage VREF and ramp voltage Vramp. A relationship in (Equation 4) is obtained. Vramp + V m ) Icht1 + V REF C ramp (eq. 4) where http://onsemi.com 13 NCP1654 Vramp is the internal ramp voltage, the positive input of the PFC modulation comparator, Vm is the multiplier voltage appearing on Vm pin, Ich is the internal charging current, Cramp is the internal ramp capacitor, and VREF is the internal reference voltage, the negative input of the PFC modulation comparator. Ich, Cramp, and VREF also act as the ramp signal of switching frequency. Hence the charging current Ich is specially designed as in (Equation 5). The multiplier voltage Vm is therefore expressed in terms of t1 in (Equation 6). Ich + Vm + V REF * t1 C rampVREF T (eq. 5) (eq. 6) Vm + 4(Vcontrol * VCONTROL(min)) PFC Duty Modulation R MIcsVbo Vm 2 RM CM Im Figure 35. External Connection on the Multiplier Voltage Pin The multiplier voltage Vm is generated according to (Equation 8). Vm + RMI csVbo 4(V control * V CONTROL(min)) (eq. 8) CrampV REF T * t1 + VREF C ramp T T From (Equation 3) and (Equation 6), the input impedance Zin is re−formulated in (Equation 7). Vout V Zin + m V REF IL*50 (eq. 7) Where, RM is the external multiplier resistor connected to Vm pin, which is constant. Vbo is the input voltage signal appearing on the BO pin, which is proportional to the rms input voltage, Ics is the sense current proportional to the inductor current IL as described in (Equation 11). Vcontrol is the control voltage signal, the output voltage of Operational Trans−conductance Amplifier (OTA), as described in (Equation 12). RM directly limits the maximum input power capability and hence its value affects the NCP1654 to operate in either “follower boost mode” or “constant output voltage mode”. Vin + Because VREF and Vout are roughly constant versus time, the multiplier voltage Vm is designed to be proportional to the IL−50 in order to have a constant Zin for PFC purpose. It is illustrated in Figure 34. Vin Iin IL Time VM Time RboU Vbo RboL Time 4 CBO + BO Figure 34. Multiplier Voltage Timing Diagram VboH / VboL VboH = 1.3 V, VboL = 0.7 V It can be seen in the timing diagram in Figure 33 that Vm originally consists of a switching frequency ripple coming from the inductor current IL. The duty ratio can be inaccurately generated due to this ripple. This modulation is the so−called “peak current mode”. Hence, an external capacitor CM connected to the multiplier voltage Vm pin is essential to bypass the high−frequency component of Vm. The modulation becomes the so−called “average current mode” with a better accuracy for PFC. Figure 36. External Connection on the Brown Out Pin Refer to Figure 36, 22 Vbo + K BO(Vin) + KBO @ p V ac KBO + RboL R boU ) R boL (eq. 9) (eq. 10) where Vbo is the voltage on BO pin. KBO is the decay ratio of Vin to Vbo. is the average voltage signal of Vin, the voltage appearing on Cfilter. Vac is the RMS input voltage. http://onsemi.com 14 NCP1654 RboL is low side resistor of the dividing resistors between Vin and BO pin. RboU is upper side resistor of the dividing resistors between Vin and BO pin. IL Refer to Figure 37, sense current Ics is proportional to the inductor current IL as described in (Equation 11). IL consists of the high−frequency component (that depends on di/dt or inductor L) and low−frequency component (that is IL−50). Ics + R SENSE I RCS L (eq. 11) ICS RCS RSENSE CS + VCS − IL + NCP1654 Gnd where RSENSE is the sense resistor to sense IL. RCS is the offset resistor between CS pin and RSENSE. Figure 37. Current Sensing Vin + Vout RfbU RfbL 6 Vfb + ±20 mA OTA + VCONTROL(min) Vcontrol CP RZ 5 VREF CZ To Vm Pin Figure 38. Vcontrol Low−Pass Filtering Refer to Figure 38, the Operational Trans−conductance Amplifier (OTA) senses Vout via the feedback resistor dividers, RfbU and RfbL. The OTA constructs a control voltage, Vcontrol, depending on the output power and hence Vout. The operating range of Vcontrol is from VCONTROL(min) to VCONTROL(max). The signal used for PFC duty modulation is after decreasing a offset voltage, VCONTROL(min), i.e. Vcontrol−VCONTROL(min). This control current Icontrol is a roughly constant current that comes from the PFC output voltage Vout that is a slowly varying signal. The bandwidth of Icontrol can be additionally limited by inserting the external type−2 compensation components (that are RZ, CZ, and CP as shown in Figure 38). It is recommended to limit fcontrol, that is the bandwidth of Vcontrol (or Icontrol), below 20 Hz typically to achieve power factor correction purpose. The transformer of Vout to Vcontrol is as described in (Equation 12) if CZ is >> CP. GEA is the error amplifier gain. R @ G EARZ Vcontrol 1 ) sRZC Z + fbL @ V out RfbL ) RfbU sRZC Z(1 ) sR ZCP) (eq. 12) From (Equation 7) − (Equation 11), the input impedance Zin is re−formulated in (Equation 13). Zin + (eq. 13) 2 R MRSENSEVoutV acKBOI L 2pR CS @ (V control * V CONTROL(min)) @ V REFIL*50 When IL is equal to IL−50, (Equation 13) is re−formulated in (Equation 14) Zin + 2 RMRSENSEV outVacK BO 2pR CS @ (V control * V CONTROL(min)) @ V REF (eq. 14) The multiplier capacitor CM is the one to filter the high−frequency component of the multiplier voltage Vm. The high−frequency component is basically coming from the inductor current IL. On the other hand, the filter capacitor Cfilter similarly removes the high−frequency component of inductor current IL. If the capacitors CM and Cfilter match with each other in terms of filtering capability, IL becomes IL−50. Input impedance Zin is roughly constant over the bandwidth of 50 or 60 Hz and power factor is corrected. http://onsemi.com 15 NCP1654 Input and output power (Pin and Pout) are derived in (Equation 15) when the circuit efficiency η is obtained or assumed. The variable Vac stands for the rms input voltage. Pin + T 2pRCS @ (V control * V CONTROL(min)) @ V REF @ V ac V ac 2 + Z in 2R R VK M SENSE out BO (eq. 15) (V control * V CONTROL(min))Vac V out 2pRCS @ (Vcontrol * VCONTROL(min)) @ VREF @ Vac 2 R MRSENSEV outKBO (eq. 16) Pout + h P in + h T Follower Boost (V control * V CONTROL(min))Vac V out The “Follower Boost” is an operation mode where the pre−converter output voltage stabilizes at a level that varies linearly versus the ac line amplitude. This technique aims at reducing the gap between the output and input voltages to optimize the boost efficiency and minimize the cost of the PFC stage (refer to MC33260 data sheet for more details at http://www.onsemi.com ). The NCP1654 operates in follower boost mode when Vcontrol is constant, i.e. Vcontrol raises to its maximum value Pout + h +h VCONTROL(max). Re−formulate (Equation 16) to become (Equation 17) and (Equation 18) by replace Vcontrol by VCONTROL(max). If Vcontrol is constant based on (Equation 15), for a constant load or power demand the output voltage Vout of the converter is proportional to the rms input voltage Vac. It means the output voltage Vout becomes lower when the rms input voltage Vac becomes lower. On the other hand, the output voltage Vout becomes lower when the load or power demand becomes higher. (eq. 17) 2pR CS @ (VCONTROL(max) * VCONTROL(min)) @ VREF @ Vac 2 RMR SENSEVoutKBO 2 RMR SENSEVoutK BO 2pR CS @ DVCONTROL @ VREF 2 R MRSENSEK BO @ V ac Pout 2pRCS @ DVCONTROL @ VREF @ Vac Vout + h (eq. 18) where VCONTROL(max) is the maximum control voltage. DVCONTROL is the gap between VCONTROL(max) and VCONTROL(min). It is illustrated in Figure 39. Vout (Traditional Boost) Vout (Follower Boost) Vin Time Pout the output voltage Vout will always be higher than the input voltage Vin even though Vout is reduced in follower boost operation. As a result, the on time t1 is reduced. Reduction of on time makes the loss of the inductor and power MOSFET smaller. Hence, it allows cheaper cost in the inductor and power MOSFET or allows the circuit components to operate at a lower stress condition in most of the time. Reference Section Time The internal reference voltage (VREF) is trimmed to be ±2% accurate over the temperature range (the typical value is 2.5 V). VREF is the reference used for the regulation. VREF also serves to build the thresholds of the fast transient response, Overvoltage (OVP), brown out (BO), and Undervoltage protections (UVP). Output Feedback Figure 39. Follower Boost Characteristics Follower Boost Benefits The follower boost circuit offers and opportunity to reduce the output voltage Vout whenever the rms input voltage Vac is lower or the power demand Pout is higher. Because of the step−up characteristics of boost converter, The output voltage Vout of the PFC circuits is sensed at Vfb pin via the resistor divider (RfbL and RfbU) as shown in Figure 38. Vout is regulated as described in (Equation 19). Vout + V REF RfbU ) RfbL R fbL (eq. 19) http://onsemi.com 16 NCP1654 The feedback signal Vfb represents the output voltage Vout and will be used in the output voltage regulation, Overvoltage protection (OVP), fast transient response, and Undervoltage protection (UVP) Output Voltage Regulation Fast Transient Response NCP1654 uses a high gain Operational Trans− conductance Amplifier (OTA) as error amplifier. Refer to Figure 38, the output of OTA Vcontrol operating range is from VCONTROL(min) to VCONTROL(max). Given the low bandwidth of the regulation block, the output voltage of PFC stages may exhibit excessive over or under−shoots because of abrupt load or input voltage variations (such as start−up duration). As shown in Figure 40, if the output voltage is out of regulation, NCP1654 has 2 functions to maintain the output voltage regulation. Vout + Vdd OVP RfbU Vfb 6 RfbL Vcontrol 5 105% VREF 95% VREF VREF + + + 200 mA CFB Vout Low Detect ±20 mA OTA Figure 40. OVP and Fast Transient Response • Overvoltage Protection: When Vfb is higher than • 105% of VREF (i.e. Vout > 105% of nominal output voltage), the Driver output of the device goes low for protection. The circuit automatically resumes operation when Vfb becomes lower than 105% of VREF. If the nominal Vout is set at 390 V, then the maximum output voltage is 105% of 390 V = 410 V. Hence a cost & size effective bulk capacitor of lower voltage rating is suitable for this application, Dynamic response enhancer: NCP1654 drastically speeds up the regulation loop by its internal 200 mA enhanced current source when the output voltage is below 95% of its regulation level. Under normal VCONTROL PIN CURRENT (mA) 50 0 −50 −100 −150 −200 −250 2 2.2 2.4 200 mA raises Vcontrol rapidly when Vfb is below 95% VREF condition, the maximum sink and source of output current capability of OTA is around 28 mA. Thanks to the “Vout low detect” block, when the Vfb is below 95% VREF, an extra 200 mA current source will raise Vcontrol rapidly. Hence prevent the PFC output from dropping too low and improve the transient response performance. The relationship between current flowing in/out Vcontrol pin and Vfb is as shown in Figure 41. It is recommended to add a typical 100 pF capacitor CFB decoupling capacitor next to feedback pin to prevent from noise impact. No DRV when Vfb is above 105% VREF 2.6 2.8 3 Vfb Figure 41. Vfb vs. Current Flowing in/out from Vcontrol Pin http://onsemi.com 17 NCP1654 Soft Start The block diagram and timing diagram of soft start function are as shown in Figure 42 and Figure 43. The device provides no output (or no duty ratio) when the Vcontrol is lower than VCONTROL(min). Vcontrol is pulled low when: • Brown−out, or • Undervoltage Protection When the IC recovers from one of the following conditions; Undervoltage Lockout, Brown−out or Undervoltage Protection, the 200 mA current source block keeps off. Hence only the Operating Trans−conductance Amplifier (OTA) raises the Vcontrol. And Vcontrol rises slowly. This is to obtain a slow increasing duty cycle and hence reduce the voltage and current stress on the MOSFET. A soft−start operation is obtained. Vdd Bias Off BO UVLO UVP S R Vfb 6 95% VREF VREF + + Q Q 200 mA Vdd Vout Low Detect ±20 mA OTA BO UVLO Vcontrol 5 Figure 42. Soft Start Block Diagram UVLO, BO, or UVP Period I Period II Vdd Vdd Rising Vfb 95% VREF Vout Low Detect Set Reset Q Figure 43. Soft Start Timing Diagram http://onsemi.com 18 NCP1654 Undervoltage Protection (UVP) for Open Loop Protection or Shutdown ISTDN Shutdown ICC2 Vfb 8% VREF 12% VREF Operating PFC duty modulation to generate the multiplier voltage Vm, Over−Power Limitation (OPL), and Over−Current Protection. (Equation 11) would insist in the fact that it provides the flexibility in the RSENSE choice and that it allows to detect in−rush currents. Over−Current Protection (OCP) Figure 44. Undervoltage Protection Over−Current Protection is reached when Ics is larger than IS(OCP) (200 mA typical). The offset voltage of the CS pin is typical 10 mV and it is neglected in the calculation. Hence, the maximum OCP inductor current threshold IL(OCP) is obtained in (Equation 20). IL(OCP) + R CSIS(OCP) R SENSE + R CS @ 200 mA (eq. 20) RSENSE As shown in Figure 44, when Vfb is less than 8% of VREF, the device is shut down and consumes less than 400 mA. The device automatically starts operation when the output voltage goes above 12% of VREF. In normal situation of boost converter configuration, the output voltage Vout is always greater than the input voltage Vin and the feedback signal Vfb is always greater than 8% and 12% of VREF to enable NCP1654 to operate. This Undervoltage Protection function has 2 purposes. • Open Loop Protection − Protect the power stage from damage at feedback loop abnormal, such as Vfb is shorted to ground or the feedback resistor RfbU is open. • Shutdown mode − Disables the PFC stage and forces a low consumption mode. This feature helps to meet stringent stand−by specifications. Power Factor being not necessary in stand−by, the PFC stage is generally inhibited to save the pre−converter losses. To further improve the stand−by performance, the PFC controller should consume minimum current in this mode. Current Sense When over−current protection threshold is reached, the Drive Output of the device goes low. The device automatically resumes operation when the inductor current goes below the threshold. Input Voltage Sense The device senses the rms input voltage Vac by the sensing scheme in Figure 45. Vbo senses the average rectified input voltage Vin via the resistor divider. An external capacitor CBO is to maintain the Vbo the average value of Vin. Vbo is used for Brown−Out Protection, PFC duty modulation and over−power limitation (OPL). Brown−Out Protection The device senses the inductor current IL by the current sense scheme in Figure 37. The device maintains the voltage at CS pin to be zero voltage (i.e., Vcs ≈ 0 V) so that (Equation 11), Ics R + SENSE IL , RCS The device uses the Vbo signal to protect the PFC stage from operating as the input voltage is lower than expected. Re−formulate (Equation 9) to get (Equation 21). Refer to Figure 45, Vin is different before and after the device operating. • Before the device operates, Vin is equal to the peak value of rms input voltage, Vac. Hence Vbo is as described in (Equation 21). Vbo + RboL RboL (V ) + 2 V ac (eq. 21) R boL ) R boU in R boL ) R boU • After device operates, Vin is the rectified sinusoidal can be formulated. This scheme has the advantage of the minimum number of components for current sensing. The sense current Ics represents the inductor current IL and will be used in the input voltage. Thanks to CBO, Vbo is the average of rectified input voltage. Hence Vbo decays to 2/p of the peak value of rms input voltage Vac as described in (Equation 22). Vbo + RboL 22 Vac R boL ) R boU p (eq. 22) http://onsemi.com 19 NCP1654 Before Device Operates After Device Operates Vac IN + − Vin + RboU Vbo 4 CBO + BO VboH / VboL VboH = 1.3 V, VboL = 0.7 V RboL Figure 45. Brown−Out Protection Hence a larger hysteresis of the brown out comparator is needed, which is 0.7 V typical in this device. When Vbo goes below than VBOL (0.7 V typical), the device turns off the Drive output and keeps it off till Vbo exceeds VBOH (1.3 V typical). When the device awakes after an off−state (Undervoltage lockout or shutdown), the default threshold is VBOH. Vin Overpower Limitation (OPL) This is a second OCP with a threshold that is line dependent. Sense current Ics represents the inductor current IL and hence represents the input current approximately. Input voltage signal Vbo represents the rms input voltage. The product (Ics ⋅ Vbo) represents an approximated input power (IL ⋅ Vac). It is illustrated in Figure 46. + RSENSE IL RCS ICS CS 3 4 Vbo ICS + I L Current Mirror RSENSE R CS OPL >200 mVA? Figure 46. Over−Power Limitation When the product (Ics ⋅ Vbo) is greater than a permissible level 200 mVA, the device turns off the drive output so that the input power is limited. The OPL is automatically deactivated when the product (Ics ⋅ Vbo) is lower than the 200 mVA level. This 200 mVA level corresponds to the approximated input power (IL ⋅ Vac) to be smaller than the particular expression in (Equation 23). IcsV bo t 200 mVA IL RSENSE @ R CS 2 2 K BO @ V ac p (eq. 23) Bias the Controller t 200 mVA It is recommended to add a typical 1 nF to 100 nF decoupling capacitor next to the Vcc pin for proper operation. When the NCP1654 operates in follower boost mode, the PFC output voltage is not always regulated at a particular level under all application range of input voltage and load power. It is not recommended to make a low−voltage bias supply voltage by adding an auxiliary winding on the PFC boost inductor. Alternatively, it is recommended to get the Vcc biasing supply from the 2nd−stage power conversion stage. IL @ V ac t RCS @ p @ 50 2 mVA R SENSE @ K BO http://onsemi.com 20 NCP1654 The device incorporates an Undervoltage Lockout block to prevent the circuit from operating when Vcc is too low in order to ensure a proper operation. An UVLO comparator monitors Vcc pin voltage to allow the NCP1654 to operate when Vcc exceeds 10.5 V typically. The ON State OFF VCC ICC