NCP177AMX180TCG

DATA SHEET www.onsemi.com Linear Voltage Regulator Fast Transient Response, Enable 500 mA 1 XDFN4 CASE 711AJ MARKING DIAGRAM NCP177 XX M The NCP177 is CMOS LDO regulator featuring 500 mA output current. The input voltage is as low as 1.6 V and the output voltage can be set from 0.7 V. Features • • • • • • • • • • • Operating Input Voltage Range: 1.6 V to 5.5 V Output Voltage Range: 0.7 V to 3.6 V Quiescent Current typ. 60 mA Low Dropout: 200 mV Typ. at 500 mA, VOUT−NOM = 1.8 V High Output Voltage Accuracy ±0.8% Stable with Small 1 mF Ceramic Capacitors Over−current Protection Thermal Shutdown Protection: 175°C With (NCP177A) and Without (NCP177B) Output Discharge Function Available in XDFN4 1 mm x 1 mm x 0.4 mm Package This is a Pb−Free Device Typical Applications CIN 1 μF IN OUT NCP177 ON EN XX = Specific Device Code M = Date Code PINOUT DIAGRAM (Top View) ORDERING INFORMATION See detailed ordering, marking and shipping information on page 10 of this data sheet. • Battery Powered Equipment • Portable Communication Equipment • Cameras, Image Sensors and Camcorders VIN 1 VOUT COUT 1 μF GND OFF Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2017 September, 2022 − Rev. 8 1 Publication Order Number: NCP177/D NCP177 IN OUT IN OUT PROG . VOLTAGE REFERENCE AND SOFT − START PROG . VOLTAGE REFERENCE AND SOFT − START EN EN 0.7 V 0.7 V THERMAL SHUTDOWN THERMAL SHUTDOWN GND NCP177A (with output active discharge) GND NCP177B (without output active discharge) Figure 2. Internal Block Diagram PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 OUT Regulated output voltage pin 2 GND Power supply ground pin 3 EN Enable pin (active “H”) 4 IN Power supply input voltage pin − EPAD Exposed pad should be tied to ground plane for better power dissipation ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit IN −0.3 to 6.0 V OUT −0.3 to VIN + 0.3 V EN −0.3 to 6.0 V IOUT Internally Limited mA TJ(MAX) 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Input Voltage (Note 1) Output Voltage Chip Enable Input Output Current Maximum Junction Temperature Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per JESD22−A114 ESD Machine Model tested per JESD22−A115 Latchup Current Maximum Rating tested per JEDEC standard: JESD78 THERMAL CHARACTERISTICS Rating Thermal Characteristics, XDFN4 (Note 3) Thermal Resistance, Junction−to−Air Symbol Value Unit RqJA 223 °C/W 3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7 www.onsemi.com 2 NCP177 ELECTRICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C The specifications in bold are guaranteed at −40°C ≤ TJ ≤ 85°C. (Note 4) Parameter Test Conditions Max Unit 1.6 5.5 V −0.8 0.8 % −40°C ≤ TJ ≤ 85°C −2.0 1.0 TJ = +25°C −1.2 1.2 −40°C ≤ TJ ≤ 85°C −2.5 1.5 Input Voltage Output Voltage VOUT_NOM ≥ 1.8 V TJ = +25°C VOUT_NOM < 1.8 V Symbol Min VIN VOUT Typ Line Regulation VIN = VOUT−NOM + 0.5 V to 5.25 V VIN ≥ 1.6 V LineReg 0.02 0.1 %/V Load Regulation 1 mA ≤ IOUT ≤ 500 mA, VIN ≥ 1.75 V LoadReg 1 10 mV VDO 295 380 mV 1.8 V ≤ VOUT < 2.1 V 200 285 2.1 V ≤ VOUT < 2.5 V 160 240 2.5 V ≤ VOUT < 3.0 V 130 200 Dropout Voltage (Note 5) IOUT = 500 mA 1.4 V ≤ VOUT < 1.8 V 3.0 V ≤ VOUT < 3.6 V Quiescent Current Standby Current Output Current Limit 110 175 IOUT = 0 mA IQ 60 90 mA VEN = 0 V ISTBY 0.1 1 mA VOUT = VOUT−NOM − 100 mV, VIN ≥ 1.75 V IOUT VOUT = VOUT−NOM − 100 mV, VIN ≥ 1.6 V Short Circuit Current EN Pin Threshold Voltage Enable Input Current Power Supply Rejection Ratio Output Noise Output Discharge Resistance (NCP177A option only) Thermal Shutdown Temperature Thermal Shutdown Hysteresis 510 800 300 600 800 mA VOUT = 0 V, VIN ≥ 1.75 V ISC 510 EN Input Voltage “H” VENH 1.0 EN Input Voltage “L” VENL VEN = VIN = 5.5 V IEN 0.15 f = 1 kHz, Ripple 0.2 Vp−p, VIN = VOUT−NOM + 1.0 V, IOUT = 30 mA (VOUT ≤ 2.0 V, VIN = 3.0 V) PSRR 75 dB 54 mVRMS f = 10 Hz to 100 kHz mA V 0.4 0.6 mA VIN = 4.0 V, VEN = 0 V, VOUT = VOUT−NOM RACTDIS 60 W Temperature rising from 25°C TSD_TEMP 175 °C Temperature falling from TSD_TEMP TSD_HYST 20 °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 5. Measured when the output voltage falls 3% below the nominal output voltage (the voltage measured under the condition VIN = VOUT−NOM + 0.5 V). www.onsemi.com 3 NCP177 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V OR VIN = 1.6 V (WHICHEVER IS HIGHER), VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C 1.814 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 0.708 0.703 0.698 0.693 VOUT−NOM = 0.7 V 0.688 0.683 −40 −20 0 20 40 60 1.804 1.794 1.784 VOUT−NOM = 1.8 V 1.774 1.764 −40 80 −20 0 20 TEMPERATURE (°C) Figure 3. Output Voltage vs. Temperature Figure 4. Output Voltage vs. Temperature 0.08 3.314 0.06 LINE REGULATION (%/V) OUTPUT VOLTAGE (V) 0.10 3.304 3.294 3.284 3.274 3.264 VOUT−NOM = 3.3 V 3.254 3.244 −20 0 20 60 0.04 0.02 0 −0.02 −0.04 −0.06 −0.08 −0.10 −40 80 −20 0 20 40 60 TEMPERATURE (°C) Figure 5. Output Voltage vs. Temperature Figure 6. Line Regulation vs. Temperature 2 1 0 −1 −2 −3 −20 0 20 40 60 VOUT−NOM = 1.8 V 250 DROPOUT VOLTAGE (mV) 3 80 275 VOUT−NOM = 3.3 V IOUT = 1 mA to 500 mA 4 LOAD REGULATION (mV) 40 80 VOUT−NOM = 3.3 V VIN = 3.8 V to 5.25 V TEMPERATURE (°C) 5 −4 −5 −40 60 TEMPERATURE (°C) 3.324 3.234 −40 40 200 TJ = 25°C 175 150 125 TJ = −40°C 100 75 50 25 0 80 TJ = 85°C 225 0 100 200 300 400 500 TEMPERATURE (°C) OUTPUT CURRENT (mA) Figure 7. Load Regulation vs. Temperature Figure 8. Dropout Voltage vs. Output Current www.onsemi.com 4 NCP177 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V OR VIN = 1.6 V (WHICHEVER IS HIGHER), VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C 275 DROPOUT VOLTAGE (mV) 200 175 150 125 IOUT = 250 mA 100 75 50 IOUT = 100 mA 25 0 −40 IOUT = 10 mA −20 0 20 40 TJ = 85°C 120 TJ = 25°C 100 80 60 TJ = −40°C 40 60 0 80 0 100 200 300 400 500 TEMPERATURE (°C) OUTPUT CURRENT (mA) Figure 9. Dropout Voltage vs. Temperature Figure 10. Dropout Voltage vs. Output Current 1.0 VOUT−NOM = 3.3 V 140 0.9 IOUT = 500 mA 120 100 80 IOUT = 250 mA 60 40 IOUT = 100 mA 20 −20 0 20 40 60 VEN = 0 V 0.8 0.7 0.6 0.5 0.4 0.3 0.2 VOUT−NOM = 0.7 V to 3.3 V 0.1 0 −40 IOUT = 10 mA 0 −40 80 −20 0 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) Figure 11. Dropout Voltage vs. Temperature Figure 12. Standby Current vs. Temperature 90 80 QUIESCENT CURRENT (mA) 90 QUIESCENT CURRENT (mA) VOUT−NOM = 3.3 V 140 20 STANDBY CURRENT (mA) DROPOUT VOLTAGE (mV) IOUT = 500 mA 225 160 DROPOUT VOLTAGE (mV) 160 VOUT−NOM = 1.8 V 250 VOUT−NOM = 3.3 V 70 60 VOUT−NOM = 0.7 V VOUT−NOM = 1.8 V 50 40 30 20 IOUT = 0 mA 10 0 −40 −20 0 20 40 60 80 75 TJ = −40°C 70 TJ = 25°C 65 TJ = 85°C 60 VOUT−NOM = 1.8 V 55 50 80 IOUT = 0 mA 85 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 TEMPERATURE (°C) INPUT VOLTAGE (V) Figure 13. Quiescent Current vs. Temperature Figure 14. Quiescent Current vs. Input Voltage www.onsemi.com 5 NCP177 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V OR VIN = 1.6 V (WHICHEVER IS HIGHER), VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C 1000 SHORT CIRCUIT CURRENT (mA) GROUND CURRENT (mA) 350 300 250 200 TJ = −40°C 150 TJ = 25°C 100 TJ = 85°C 50 0 VOUT−NOM = 1.8 V 0 100 200 300 400 500 900 850 1.8 V 800 1.4 V 750 700 3.3 V 650 VOUT−NOM = 0.7 V 600 550 500 −40 −20 0 20 40 60 TEMPERATURE (°C) Figure 15. Ground Current vs. Output Current Figure 16. Short Circuit Current vs. Temperature 950 ENABLE THRESHOLD VOLTAGE (V) OUTPUT CURRENT LIMIT (mA) VOUT−FORCED = 0 V OUTPUT CURRENT (mA) 1000 VOUT−FORCED = VOUT−NOM − 0.1 V 900 850 1.8 V 800 1.4 V 750 3.3 V 700 650 VOUT−NOM = 0.7 V 600 550 500 −40 −20 0 20 40 60 80 OFF −> ON 0.8 ON −> OFF 0.7 0.6 0.5 0.4 −40 VOUT−NOM = 1.8 V −20 0 20 40 60 Figure 17. Output Current Limit vs. Temperature Figure 18. Enable Threshold Voltage vs. Temperature OUTPUT DISCHARGE RESISTANCE (W) 0.5 0.4 0.3 0.2 0.1 0 −40 0.9 TEMPERATURE (°C) VOUT−NOM = 1.8 V VIN = 5.5 V VEN = 5.5 V −20 0 20 40 60 80 80 1.0 TEMPERATURE (°C) 0.6 ENABLE INPUT CURRENT (mA) 950 80 70 60 50 40 30 VOUT−NOM = 1.8 V VIN = 4.0 V VEN = 0 V VOUT−FORCED = VOUT−NOM 20 10 0 −40 −20 0 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) Figure 19. Enable Input Current vs. Temperature Figure 20. Output Discharge Resistance vs. Temperature (NCP177A option only) www.onsemi.com 6 NCP177 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V OR VIN = 1.6 V (WHICHEVER IS HIGHER), VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C 90 6 OUTPUT VOLTAGE NOISE (mV/√Hz) COUT = 1 mF X7R 0805 80 60 50 40 30 20 VOUT_NOM = 1.8 V, VIN = 3.0 V VOUT_NOM = 3.3 V, VIN = 4.3 V 10 10 100 1k 10k 100k 1M COUT = 1 mF X7R 0805 4 Integral Noise: 10 Hz − 100 kHz: 54 mVrms 10 Hz − 1 MHz: 62 mVrms 3 2 1 0 10M 10 100 1k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. Power Supply Rejection Ratio Figure 22. Output Voltage Noise Spectral Density VIN 1 V/div 50 mA/div IIN IIN VIN VOUT 1 V/div VOUT 1 ms/div 50 ms/div Figure 24. Turn−ON − VIN Driven (fast) VIN VOUT−NOM = 1.8 V 500 mV/div 2 V/div Figure 23. Turn−ON/OFF − VIN Driven (slow) VOUT−NOM = 1.8 V VEN 1M VOUT−NOM = 1.8 V VOUT−NOM = 1.8 V 50 mA/div 10k 500 mV/div 0 IIN 3.3 V VIN tR = tF = 1 ms 2.3 V 500 mV/div Without output discharge With output discharge 5 mV/div PSRR (dB) 70 VOUT_NOM = 1.8 V, VIN = 3.0 V VOUT_NOM = 3.3 V, VIN = 4.3 V 5 VOUT 1.8 V VOUT 1 ms/div 5 ms/div Figure 25. Turn−ON/OFF − EN Driven Figure 26. Line Transient Response www.onsemi.com 7 NCP177 TYPICAL CHARACTERISTICS VIN IOUT VOUT 500 mA VOUT−NOM = 1.8 V tR = tF = 1 ms 1 mA 1.8 V PD(MAX), 2 oz Cu 350 0.7 0.6 330 310 PD(MAX), 1 oz Cu 0.5 290 0.4 270 0.3 250 qJA, 1 oz Cu 230 210 190 20 ms/div TA = 25°C TJ = 125°C (for PD(MAX) curve) 0 100 200 300 qJA, 2 oz Cu 0.1 400 500 600 PCB COPPER AREA (mm2) Figure 27. Load Transient Response 0.2 0 PD(MAX), MAXIMUM POWER DISSIPATION (W) 370 qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W) 50 mV/div 200 mA/div 1 V/div VIN = VOUT−NOM + 0.5 V OR VIN = 1.6 V (WHICHEVER IS HIGHER), VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C Figure 28. qJA and PD(MAX) vs. Copper Area APPLICATIONS INFORMATION General Output Capacitor Selection (COUT) The NCP177 is a high performance 500 mA low dropout linear regulator (LDO) delivering excellent noise and dynamic performance. Thanks to its adaptive ground current behavior the device consumes only 60 mA of quiescent current (no−load condition). The regulator features low noise of 48 mVRMS, PSRR of 75 dB at 1 kHz and very good line/load transient performance. Such excellent dynamic parameters, small dropout voltage and small package size make the device an ideal choice for powering the precision noise sensitive circuitry in portable applications. A logic EN input provides ON/OFF control of the output voltage. When the EN is low the device consumes as low as 100 nA typ. from the IN pin. The device is fully protected in case of output overload, output short circuit condition or overheating, assuring a very robust design. The LDO requires an output capacitor connected as close as possible to the output and ground pins. The recommended capacitor value is 1 mF, ceramic X7R or X5R type due to its low capacitance variations over the specified temperature range. The LDO is designed to remain stable with minimum effective capacitance of 0.8 mF. When selecting the capacitor the changes with temperature, DC bias and package size needs to be taken into account. Especially for small package size capacitors such as 0201 the effective capacitance drops rapidly with the applied DC bias voltage (refer the capacitor’s datasheet for details). There is no requirement for the minimum value of equivalent series resistance (ESR) for the COUT but the maximum value of ESR should be less than 0.5 W. Larger capacitance and lower ESR improves the load transient response and high frequency PSRR. Only ceramic capacitors are recommended, the other types like tantalum capacitors not due to their large ESR. Input Capacitor Selection (CIN) Input capacitor connected as close as possible is necessary to ensure device stability. The X7R or X5R capacitor should be used for reliable performance over temperature range. The value of the input capacitor should be 1 mF or greater for the best dynamic performance. This capacitor will provide a low impedance path for unwanted AC signals or noise modulated onto the input voltage. There is no requirement for the ESR of the input capacitor but it is recommended to use ceramic capacitor for its low ESR and ESL. A good input capacitor will limit the influence of input trace inductance and source resistance during load current changes. Enable Operation The LDO uses the EN pin to enable/disable its operation and to deactivate/activate the output discharge function (A−version only). If the EN pin voltage is < 0.4 V the device is disabled and the pass transistor is turned off so there is no current flow between the IN and OUT pins. On A−version the active discharge transistor is active so the output voltage is pulled to GND through 60 W (typ.) resistor. If the EN pin voltage is > 1.0 V the device is enabled and regulates the output voltage. The active discharge transistor is turned off. www.onsemi.com 8 NCP177 The power dissipated by the LDO for given application conditions can be calculated by the next equation: The EN pin has internal pull−down current source with value of 300 nA typ. which assures the device is turned off when the EN pin is unconnected. In case when the EN function isn’t required the EN pin should be tied directly to IN pin. P D + V IN @ I GND ) ǒV IN * V OUTǓ @ I OUT [W] Where: IGND is the LDO’s ground current, dependent on the output load current. Connecting the exposed pad and N/C pin to a large ground planes helps to dissipate the heat from the chip. The relation of θJA and PD(MAX) to PCB copper area and Cu layer thickness could be seen on the Figure 26. Output Current Limit Output current is internally limited to a 750 mA typ. The LDO will source this current when the output voltage drops down from the nominal output voltage (test condition is VOUT−NOM – 100 mV). If the output voltage is shorted to ground, the short circuit protection will limit the output current to 700 mA typ. The current limit and short circuit protection will work properly over the whole temperature and input voltage ranges. There is no limitation for the short circuit duration. Reverse Current The PMOS pass transistor has an inherent body diode which will be forward biased in the case when VOUT > VIN. Due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. Thermal Shutdown When the LDO’s die temperature exceeds the thermal shutdown threshold value the device is internally disabled. The IC will remain in this state until the die temperature decreases by value called thermal shutdown hysteresis. Once the IC temperature falls this way the LDO is back enabled. The thermal shutdown feature provides the protection against overheating due to some application failure and it is not intended to be used as a normal working function. Power Supply Rejection Ratio The LDO features very high power supply rejection ratio. The PSRR at higher frequencies (in the range above 100 kHz) can be tuned by the selection of COUT capacitor and proper PCB layout. A simple LC filter could be added to the LDO’s IN pin for further PSRR improvement. Enable Turn−On Time The enable turn−on time is defined as the time from EN assertion to the point in which VOUT will reach 98% of its nominal value. This time is dependent on various application conditions such as VOUT−NOM, COUT and TA. Power Dissipation Power dissipation caused by voltage drop across the LDO and by the output current flowing through the device needs to be dissipated out from the chip. The maximum power dissipation is dependent on the PCB layout, number of used Cu layers, Cu layers thickness and the ambient temperature. The maximum power dissipation can be computed by following equation: P D(MAX) + TJ * TA 125 * T A + [W] q JA q JA (eq. 2) PCB Layout Recommendations To obtain good transient performance and good regulation characteristics place CIN and COUT capacitors as close as possible to the device pins and make the PCB traces wide. In order to minimize the solution size, use 0402 or 0201 capacitors size with appropriate effective capacitance. Larger copper area connected to the pins will also improve the device thermal resistance. The actual power dissipation can be calculated from the equation above (Power Dissipation section). Exposed pad and N/C pin should be tied to the ground plane for good power dissipation. (eq. 1) Where: (TJ − TA) is the temperature difference between the junction and ambient temperatures and θJA is the thermal resistance (dependent on the PCB as mentioned above). For reliable operation junction temperature should be limited do +125°C. www.onsemi.com 9 NCP177 ORDERING INFORMATION Part Number Voltage Option Option Marking NCP177AMX070TCG (Note 6) 0.70 V JA NCP177AMX090TCG (Note 6) 0.90 V JM NCP177AMX100TCG 1.00 V JC NCP177AMX110TCG 1.10 V JD NCP177AMX120TCG (Note 6) 1.20 V NCP177AMX125TCG (Note 6) 1.25 V NCP177AMX135TCG 1.35 V JF NCP177AMX150TCG 1.50 V JG NCP177AMX180TCG (Note 6) 1.80 V JH NCP177AMX330TCG (Note 6) 3.30 V JJ NCP177BMX070TCG (Note 6) 0.70 V HA NCP177BMX100TCG 1.00 V HC NCP177BMX110TCG (Note 6) 1.10 V HD NCP177BMX120TCG 1.20 V NCP177BMX125TCG (Note 6) 1.25 V NCP177BMX135TCG (Note 6) 1.35 V NCP177BMX150TCG (Note 6) 1.50 V HG NCP177BMX180TCG (Note 6) 1.80 V HH NCP177BMX330TCG (Note 6) 3.30 V HJ With output discharge Without output discharge Package Shipping† XDFN−4 (Pb−Free) JE JK 3000 or 5000 / Tape & Reel (Note 6) HE HL HF †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 6. Product processed after October 1, 2022 are shipped with quantity 5000 units / tape & reel. www.onsemi.com 10 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS XDFN4 1.0x1.0, 0.65P CASE 711AJ ISSUE C GENERIC MARKING DIAGRAM* XX M 1 DOCUMENT NUMBER: DESCRIPTION: XX = Specific Device Code M = Date Code 98AON67179E XDFN4, 1.0X1.0, 0.65P DATE 08 MAR 2022 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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