NCP1800DM42R2G

NCP1800 Single−Cell Lithium Ion Battery Charge Controller The NCP1800 is a constant current, constant voltage (CCCV) lithium ion battery charge controller. The external sense resistor sets the full charging current, and the termination current is 10% of the Full−Charge current (0.1 C). The voltage is regulated at ±1% during the final charge stage. There is virtually zero drain on the battery when the input power is removed. Features Micro8
CASE 846A DM SUFFIX 8 Pb−Free Package is Available Integrated Voltage and Programmable Current Regulation Integrated Cell Conditioning for Deeply Discharged Cell Integrated End of Charge Detection Better than 1% Voltage Regulation Charger Status Output for LED or Host Processor Interface Charge Interrupt Input Safety Shutoff for Removal of Battery Adjustable Charge Current Limit Input Over and Undervoltage Lockout Micro8
Package 1 PIN CONNECTIONS AND MARKING DIAGRAM ISNS 1 ISEL COMP/DIS 2 3 GND 4 8 180X AYW • • • • • • • • • • • http://onsemi.com 7 6 5 OUT VCC CFLG VSNS X = A for 41 Device B for 42 Device A = Assembly Location Y = Year W = Work Week Applications • Cellular Phones, PDAs • Handheld Equipment • Battery Operated Portable Devices ORDERING INFORMATION PMOS/Schottky (FETKY
): NTHD4P02FT1 (ChipFET
) PMOS: NTGS3441T1 (TSOP 6) Schottky: MBRM130L RSNS Vin Package NCP1800DM41R2 Micro8 4000 Units/Reel NCP1800DM42R2 Micro8 4000 Units/Reel Micro8 (Pb−Free) 4000 Units/Reel NCP1800DM41R2G OUT VCC †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ISNS NCP1800 VSNS Host or LED Shipping† Device CFLG Host Processor COMP/ DIS RCOMP Cin CCOMP ISEL RISEL 60 k Cout GND RCOMP = 15 , CCOMP = 560 nF Figure 1. Typical Application  Semiconductor Components Industries, LLC, 2004 November, 2004 − Rev. 5 1 Publication Order Number: NCP1800/D NCP1800 RSNS Cin VCC OUT ISNS Active Pullup VSNS CC Chip Enable CONTROL CV VREF ISEL IREF VREF VREF EOC Detect EOC REF Input UV Lockout RISEL LOGIC Pre CHG Complete VREF VREF CFLG Input OV Lockout VSNS Overvoltage VREF VREF Cout GND COMP/DIS Figure 2. NCP1800 Internal Block Diagram PIN FUNCTION DESCRIPTIONS Pin Symbol 1 ISNS This is one of the inputs to the current regulator and the end−of−charge comparator. Description 2 ISEL A resistor from this pin to ground pin sets the full charging current regulation level. 3 COMP/DIS This is a multifunctional pin that is used for compensation and can be used to interrupt charge with an open drain/collector output from a microcontroller. When this pin is pulled to ground, the charge current is interrupted. 4 GND This is the ground pin of the IC. 5 VSNS This is an input that is used to sense battery voltage and is the other input to the current regulator. It also serves as the input to the battery overvoltage comparator. 6 CFLG An open drain output that indicates the battery charging status. 7 VCC This is a multifunctional pin that powers the device and senses for over and undervoltage conditions. 8 OUT This is a current source driver for the pass transistor. http://onsemi.com 2 NCP1800 MAXIMUM RATINGS Rating Supply Voltage Symbol Value Unit VCC 16 V Voltage Range for: VSNS Input ISNS Input COMP/DIS Input ISEL Input CFLG Output Out Output − V OUT Sink Current Io 20 mA RJA 240 °C/W −0.3 to 6.0 −0.3 to 6.0 −0.3 to 6.0 −0.3 to 6.0 −0.3 to 6.0 −0.3 to VCC Thermal Resistance, Junction−to−Air Operating Ambient Temperature TA −20 to +85 °C Operating Junction Temperature TJ −20 to +150 °C Storage Temperature Tstg −55 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ATTRIBUTES Characteristic Value ESD Protection Human Body Model (HBM) per JEDEC standard JESD22−A114 Machine Model (MM) per JEDEC standard JESD22−A114 ≤ 2 kV ≤ 200 V Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1 Transistor Count 1015 ≤ 150 mA Latchup Current Maximum Rating per JEDEC standard JESD78 1. For additional information, see Application Note AND8003/D. ELECTRICAL CHARACTERISTICS (TA = 25°C for typical values, −20°C < TA < 85 °C for min/max values, unless otherwise noted.) Characteristic Input Supply Voltage (Note 2) Symbol Min Typ Max Unit VCC 2.5 − 16 V ICC − 140 250 A VREG 4.059 059 4.158 4.1 4.2 4.141 4.242 V Full−Charge Current Reference Voltage VCC = 6.0 V, 3.0 V  VSNS  4.2 V, RISEL = 60 K  TA = 25°C VFCHG 210 240 270 mV Full−Charge Current Reference Voltage Temperature Coefficient VCC = 6.0 V, 3.0 V  VSNS  4.2 V, RISEL = 60 K TCVFCHG − −0.163 − %/°C VPCHG 13.2 24 34.8 mV TCVPCHG − −0.180 − %/°C VPCTH 2.78 2.85 2.93 3.0 3.08 3.15 V VUVLO 3.43 3.56 3.69 V Hysteresis of VCC Undervoltage Lockout (VUVLO), TA = 25°C − 90 150 195 mV Hysteresis of VCC Undervoltage Lockout Voltage (VUVLO) Temperature Coefficient − − 0.261 − %/°C VEOC 20 24 28 mV TCVEOC − −0.160 − %/°C Input Supply Current Regulated egu a ed Ou Output u Voltage o age NCP1800DM41 C 800 NCP1800DM42 Pre−Charge Current Reference Voltage VCC = 6.0 V, VSNS  3.0 V, RISEL = 60 K  TA = 25°C Pre− Charge Current Reference Voltage Temperature Coefficient VCC = 6.0 V, VSNS  3.0 V, RISEL = 60 K Pre−Charge Threshold Voltage NCP1800DM41 NCP1800DM42 VCC Undervoltage Lockout Voltage End−of−Charge Voltage Reference VCC = 6.0 V, VSNS  4.2 V, RISEL = 60 K  TA = 25°C End−of−Charge Voltage Reference Temperature Coefficient VCC = 6.0 V, VSNS  4.2 V, RISEL = 60 K 2. See the “External Adaptor Power Supply Voltage Selection” section of the application note to determine the minimum voltage of the charger power supplies. http://onsemi.com 3 NCP1800 ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C for typical values, −20°C < TA < 85 °C for min/max values, unless otherwise noted.) Symbol Characteristic Min Typ Max Unit Charge Disable Threshold Voltage (ICOMP = 100 A min.) VCDIS − − 0.08 V VCC Overvoltage Lockout VOVLO 6.95 7.20 7.45 V Hysteresis of VCC Overvoltage Lockout (VOVLO),TA = 25°C − 90 150 180 mV Hysteresis of VCC Overvoltage Lockout (VOVLO) Temperature Coefficient − − 0.39 − %/°C VSOVLO 4.3 4.4 4.4 4.5 4.5 4.6 V Hysteresis of VSNS Overvoltage Lockout (VSOVLO), TA = 25°C − 40 70 100 mV Hysteresis of VSNS Overvoltage Lockout (VSOVLO) Temperature Coefficient TA = 25°C − − 0.52 − %/°C Full−Charge Current Range with RSNS = 0.4 IREG1 600 − 1000 mA Full−Charge Current Range with RSNS = 0.8 IREG2 300 − 600 mA Battery Drain Current (VSNS + ISNS) VCC = Ground, VSNS = 4.2 V IBDRN − − 0.5 A CFLG Pin Output Low Voltage (CFLG = LOW, ICFLG = 5.0 mA) VCFLGL − − 0.35 V CFLG Pin Leakage Current (CFLG = HIGH) ICFLGH − − 0.1 A VSNS Overvoltage Lockout NCP1800DM41 NCP1800DM42 http://onsemi.com 4 3.5 VPCHG, PRE−CHARGE CURRENT REFERENCE VOLTAGE (mV) 24.75 3 2.5 2 1.5 1 3.5 4 4.5 5 5.5 6 6.5 VSNS = 2.5 V RISEL = 60 k RSNS = 0.4 24.65 24.60 24.55 24.50 24.45 24.40 24.35 24.30 24.25 24.20 3.5 7 0.9 1.3 1.7 2.1 2.5 VSNS, BATTERY VOLTAGE (V) Figure 5. Pre−Charge Current Reference Voltage versus Battery Voltage 2.9 0.2415 0.241 VSNS = 3.6 V RISEL = 60 k RSNS = 0.4 0.2405 0.24 0.2395 0.239 0.2385 4.5 5 5.5 6 4.5 5 5.5 6 6.5 7 6.5 7 VCC, INPUT SUPPLY VOLTAGE (V) Figure 7. Full−Charge Current Reference Voltage versus Input Supply Voltage Figure 4. Pre−Charge Current Reference Voltage versus Input Supply Voltage 0.243 VCC = 5 V RISEL = 60 k RSNS = 0.4 0.2425 0.242 0.2415 0.241 0.2405 VEOC, END OF CHARGE REFERENCE VOLTAGE (mV) VCC = 5 V RISEL = 60 k RSNS = 0.4 VFCHG, FULL−CHARGE CURRENT REFERENCE VOLTAGE (V) 26 24 22 20 18 16 14 12 10 8 6 4 2 0 4 VCC, INPUT SUPPLY VOLTAGE (V) Figure 3. Pre−Charge Threshold Voltage versus Input Supply Voltage 0.5 VFCHG, CHARGE CURRENT REFERENCE VOLTAGE (V) 24.70 VCC, INPUT SUPPLY VOLTAGE (V) VPCHG, PRE−CHARGE REFERENCE CURRENT THRESHOLD VOLTAGE (mV) VPCTH, PRE−CHARGE THRESHOLD VOLTAGE (V) NCP1800 0.24 3.2 3.6 3.8 4.0 4.2 VSNS, BATTERY VOLTAGE (V) Figure 6. Full−Charge Current Reference Voltage versus Battery Voltage 24.5 RISEL = 60 k RSNS = 0.4 24.4 24.3 24.2 24.1 24 23.9 23.8 4.5 http://onsemi.com 5 3.4 5 5.5 6 6.5 VCC, INPUT SUPPLY VOLTAGE (V) Figure 8. End of Charge Reference Voltage versus Input Supply Voltage 7 IPCHG, PRE−CHARGE CURRENT (mA) IBDRN, BATTERY DRAIN CURRENT ( A) NCP1800 0.48 VCC = 0 0.44 0.40 0.36 0.32 0.28 0.24 0.2 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 VCC = 5 V VSNS = 2.5 V RSNS = 0.4 100 CALCULATED MEASURED 10 (1.19
12e3) IPCHG  (10
RISEL
RSNS) 1 4.1 10 100 1000 VSNS, BATTERY VOLTAGE (V) RISEL, CURRENT PROGRAMMING RESISTANCE (k ) Figure 9. Battery Drain Current versus Battery Voltage Figure 10. Pre−Charge Current versus Current Programming Resistor 0.11 1000 VCC = 5 V VSNS = 3.6 V RSNS = 0.4 MEASURED 0.10 (1.19
12e3) IREG  (RISEL
RSNS) 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 100 10 VCC = 5 V RSNS = 0.4 0.09 VEOC/VFCHG (V/V) CALCULATED 100 1000 25 50 RISEL, CURRENT PROGRAMMING RESISTANCE (k ) 75 100 125 150 175 200 225 250 275 300 RISEL, CURRENT PROGRAMMING RESISTANCE (k ) Figure 11. Full−Charge Current versus Current Programming Resistor Figure 12. VEOC/VFCHG versus Current Programming Resistor 250 ICC, INPUT SUPPLY CURRENT ( A) IREG, FULL−CHARGE CURRENT (mA) 1000 VSNS = 4.7 V VSOVLO Activated 200 150 VSNS < VSOVLO IREG = 0 A 100 50 0 5 6 7 8 9 10 11 12 13 14 15 VCC, INPUT SUPPLY VOLTAGE (V) Figure 13. Input Supply Current versus Input Supply Voltage http://onsemi.com 6 16 NCP1800 Fault Modes: 1. Charger Low Output (VCC < VUVLO) 2. Runaway Charger (VCC > VOVLO) 3. Battery Removed (VSNS > VSOVLO) Fault Detected OR VCDIS = Low End of Charge CFLG:Low OUT:High Fault Detected OR VCDIS = Low No Fault Detected Trickle Charge CFLG:Low OUT:VREG Fault Detected OR VCDIS = Low Fault Detected OR VCDIS = Low ISNS ≤ 0.1 IREG VUVLO < VCC < VOVLO & VSNS < VSOVLO Pre−Charge CFLG:High OUT:0.1 IREG VSNS < VPCTH VSNS ≥ VPCTH Full−Charge CFLG:High OUT:1 IREG VSNS ≥ VREG VSNS < VREG Figure 14. NCP1800 State Machine Diagram http://onsemi.com 7 Final Charge CFLG:High OUT:VREG ISNS > 0.1 IREG NCP1800 Set CFLG LOW Fault Mode OR VCDIS = LOW Start Y N Set CFLG HIGH Fault Mode OR VCDIS = LOW Y N Set ICHARGE = IREG/10 Y VSNS < VPCTH N Set ICHARGE = IREG Conditioning Phase Fault Mode OR VCDIS = LOW Current Regulation Phase N Y N VSNS > VREG Y Fault Mode OR VCDIS = LOW Voltage Regulation Phase N Fault Modes: 1. Charger Low Output (VCC < VUVLO) 2. Runaway Charger (VCC > VOVLO) 3. Battery Removed (VSNS > VSOVLO) Y N Y ISNS < IREG/10 Y Set CFLG Low Figure 15. NCP1800 Charging Operational Flow Chart http://onsemi.com 8 Fault Mode OR VCDIS = LOW N NCP1800 VREG Voltage VPCTH 0.9 V time IREG Current CFLG = Low (ISNS < 0.1 X IREG) CFLG = High 0.1 x IREG time Pre−Charge Phase Full−Charge Phase Final Charge Phase Trickle Charge Phase Figure 16. Typical Charging Algorithm Charge Status Conditions CFLG Pin Pre−Charge, Full−Charge and Final Charge High−Z End−of−Charge, Trickle Charge and Faults Low http://onsemi.com 9 NCP1800 Operation Descriptions The NCP1800 is a linear lithium ion (Li−ion) battery charge controller and provides the necessary control functions for charging Li−ion batteries precisely and safely. It features the constant current and constant voltage method (CCCV) of charging. Since the external P−channel MOSFET is used to regulate the current to charge the battery and operates in linear mode as a linear regulator, power is dissipated in the pass transistor. Designing with a very well regulated external adaptor (e.g. 5.1 V ±1%) can help to minimize the heat dissipation in the pass transistor. Care must be taken in heatsink designing in enclosed environments such as inside the battery operated portables or cellular phones. The Full−Charge phase continues until the battery voltage reaches VREG. The NCP1800 comes in two options with VREG thresholds of 4.1 and 4.2 V. Conditioning and Pre−charge Phase The NCP1800 initiates a charging cycle upon toggling the COMP/DIS to LOW or application of the valid external power source (i.e. VUVLO  VCC  VOVLO) with the Li−ion battery present or when the Li−ion battery is inserted. Before a charge cycle can begin, the battery conditions are verified to be within safe limits. The battery will not be charged when its voltage is less than 0.9 V or higher than VSOVLO. Li−ion batteries can be easily damaged when fast charged from a completely discharged state. Also, a fully discharged Li−ion battery may indicate an abnormal battery condition. With the built−in safety features of the NCP1800, the Li−ion battery pre−charges (Pre−Charge Phase) at 10% of the full rated charging current (IREG) when the battery voltage is lower than VPCTH and the CFLG pin is HIGH. Typically, the battery voltage reaches VPCTH in a few minutes and then the Full−Charge phase begins. Final Charge (Voltage Regulation) Phase Once the battery voltage reaches VREG, the pass transistor is controlled to regulate the voltage across the battery and the Final Charge phase (constant voltage mode) begins. Once the charger is in the Final Charge phase, the charger maintains a regulated voltage and the charging current will begin to decrease and is dependent on the state of the charge of the battery. As the battery approaches a fully charged condition, the charge current falls to a very low value. Trickle Charge Phase During the Final Charge phase, the charging current continues to decrease and the NCP1800 monitors the charging current through the current sense resistor RSNS. When the charging current decreases to such a level that ISNS < 0.1 X IREG, the CFLG pin is set to LOW and the Trickle Charge phase begins. The charger stays in the Trickle Charge phase until any fault modes are detected or the COMP/DIS pin is pulled low to start over the charging cycle. Full−Charge (Current Regulation) Phase When the battery voltage reaches VPCTH, the NCP1800 begins fast charging the battery with full rate charging current IREG. The NCP1800 monitors the charging current at the ISNS input pin by the voltage drop across a current sense resistor, RSNS, and the charging current is maintained at IREG by the pass transistor throughout the Full−Charge phase. IREG is determined by RSNS and RISEL with the following formula: (1.19
12 k) IREG  (RISEL
RSNS) And with RISEL = 60 k and RSNS = 0.4 , IREG = 0.6 A. http://onsemi.com 10 NCP1800 NTHD4P02FT1 RSNS Vin = 5.2 V 2.0 120 mA OUT VCC CFLG VSNS NCP1800 Cin 10 n ISNS ISEL RCOMP 15 RISEL 60 k GND COMP/ DIS GND Li−ion Cout 10 CCOMP 560 n Figure 17. Typical Application Circuit for Lower Capacity Batteries (120 mAh shown here) NTGS3441T1 & MBRM130L −OR− NTHD4P02FT1 RSNS Vin = 5.2 V 0.4 600 mA OUT VCC CFLG VSNS NCP1800 Cin 10 n GND ISNS ISEL RISEL 60 k COMP/ DIS GND RCOMP 15 Li−ion Cout 10 CCOMP 560 n Figure 18. Typical Application Circuit for Higher Capacity Batteries (600 mAh shown here) http://onsemi.com 11 NCP1800 Selecting External Components With: VIN(min)  5.0 V External Adaptor Power Supply Voltage Selection VREG  4.2 V Since the NCP1800 is using a linear, charging algorithm, the efficiency is lower. Adapter voltage selection must be done carefully in order to minimize the heat dissipation. In general, the power supply input voltage should be around 5.0 to 6.0 V. The minimum input voltage should be chosen to minimize the heat dissipation in the system. Excessively high input voltages can cause too much heat dissipation and will complicate the thermal design in applications like cellular phones. With the overvoltage protection feature of the NCP1800, input voltages higher than 7.0 V will activate the overvoltage protection circuit and disconnect the power supply input to the battery and other circuitry. For the application shown in Figure 18 (assuming NTGS3441 and MBRM130L): IREG  0.6 A RSNS  0.4 Dropout across pass element = 5.0 V  4.2 V  0.38 V  (0.6 A) (0.4 )  0.18 V Maximum RDS(on) should be less than (0.18 V)/(0.6 A) = 0.3 at 0.6 A. VIN(min)  5.0 V VREG  4.2 V IREG  0.12 A RSNS  2.0 VIN(min)  Li−ion regulated voltage, VREG  (0.6 A)(RDS(ON)) Dropout across pass element = 5.0 V − 4.2 V − 0.43 V − (0.12)(2.0    V  VF of Schottky Diode  voltage drop of RSNS  4.2 V  (0.6 A) (100 m )  0.38 V  (0.6 A) (0.4 )  4.88 V  4.9 V Therefore, maximum RDS(on) should be less than (0.13 V)/(0.12 A) = 1.08
at 0.12 A. Therefore, for the application shown in Figure 17 (assuming NTHD4P01FT1): External Output Capacitor VIN(min)  Li−ion regulated voltage  4.2 V  (0.12 A)(130m )  0.43  (0.12 A)(2.0 )  4.89 V  4.9 V Any good quality output filter can be used, independent of the capacitor’s minimum ESR. However, a 10 F tantalum capacitor or electrolytic capacitor is recommended at the output to suppress fast ramping spikes at the VSNS input and to ensure stability for 1.0 A at full range. The capacitor should be mounted with the shortest possible lead or track length to the VSNS and GND pins. If the output voltage accuracy is 5%, then a typ. 5.2 V
5% output voltage adaptor must be used. And for a very good regulated adaptor of accuracy 1%, 5.0 V ±1% output voltage adaptor can then be used. It is obvious that if tighter tolerance adaptors are used, heat dissipation can be minimized by using lower nominal voltage adaptors. Current Sense Resistor The charging current can be set by the value of the current sense resistor as in the previous formula. Proper de−rating is advised when selecting the power dissipation rating of the resistor. If necessary, RISEL can also be changed for proper selection of the RSNS values. Take note of the recommended full−charge current ranges specified in the electrical characteristics section. Also notice the effect of RISEL on the accuracy of pre−charge current and end−of−charge detection as noted in Figures 10 and 12, respectively. Pass Element Selection The type and size of the pass transistor is determined by input−output differential voltage, charging current, current sense resistor and the type of blocking diode used. The selected pass element must satisfy the following criteria: Drop across pass element = VIN(min)  Li−ion regulated voltage  VF  IREG
RSNS http://onsemi.com 12 NCP1800 PACKAGE DIMENSIONS Micro8 DM SUFFIX CASE 846A−02 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A−01 OBSOLETE, NEW STANDARD 846A−02. −A− −B− K PIN 1 ID G D 8 PL 0.08 (0.003) M T B S A DIM A B C D G H J K L S SEATING −T− PLANE 0.038 (0.0015) C L J H SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 3.20 0.126 6X 8X 4.24 0.167 0.65 0.0256 5.28 0.208 SCALE 8:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 13 MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 −−− 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 −−− 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 NCP1800 ChipFET is a trademark of Vishay Siliconix. FETKY and Micro8 are trademarks of International Rectifier Corporation. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 14 For additional information, please contact your local Sales Representative. NCP1800/D