DATA SHEET
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LDO Regulator - Fast
Transient Response
Low Voltage
MARKING
DIAGRAMS
XDFN8
MX SUFFIX
CASE 711AS
1A
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
NCP186
The NCP186x series are CMOS LDO regulators featuring 1 A
output current. The input voltage is as low as 1.8 V and the output
voltage can be set from 0.8 V.
(Note: Microdot may be in either location)
•
•
Operating Input Voltage Range: 1.8 V to 5.5 V
Output Voltage Range: 0.8 to 3.9 V
Fixed or Adjustable Output Voltage Applications
Quiescent Current typ. 90 mA
Low Dropout: 100 mV typ. at 1 A, VOUT = 3.0 V
High Output Voltage Accuracy ±1%
Stable with Small 1 mF Ceramic Capacitors
Over−current Protection
Built−in Soft Start Circuit to Suppress Inrush Current
Thermal Shutdown Protection: 165°C
With (NCP186A) and Without (NCP186B) Output Discharge
Function
Available in XDFN8 1.2x1.6mm & DFN12 4x4mm Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Battery Powered Equipment
• Portable Communication Equipment
• Cameras, Image Sensors and Camcorders
IN
C IN
1 mF
EN
GND
PIN CONNECTIONS
OUT
1
8 IN
OUT
2
7 IN
N/C
3
6 EN
FB/ADJ
4
5 GND
12 N/C
11 IN
V OUT=0.8V
OUT 3
10 IN
C OUT
N/C 4
1 mF
9 EN
FB/ADJ 5
FB/
ADJ
8 GND
N/C 6
7 N/C
(Top View)
Adjustable Output Voltage Application
V OUT−ADJ=1.2V
V IN
IN
C IN
1 mF
(Note: Microdot may be in either location)
OUT 2
NCP186 0.8V
OFF
XXXXXX = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
N/C 1
OUT
ON
1
(Top View)
Fixed Output Voltage Application
V IN
XXXXXX
XXXXXX
ALYWG
G
DFN12
MU SUFFIX
CASE 506CE
Features
•
•
•
•
•
•
•
•
•
•
•
XXMG
G
OUT
R1
5k1
NCP186 0.8V
ON
EN
OFF
GND
FB/
ADJ
C1
1 nF
C OUT
1 mF
ORDERING INFORMATION
0.8V
See detailed ordering and shipping information on page 12 of
this data sheet.
R2
10k
ǒ
V OUT−ADJ + V OUT−NOM @ 1 )
Ǔ
ǒ
R1
R
+ 0.8 @ 1 ) 1
R2
R2
Ǔ
Set IR1, IR2 in range from 10 mA to 100 mA
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2015
September, 2022 − Rev. 7
1
Publication Order Number:
NCP186/D
NCP186
IN
OUT
IN
OUT
PROG. VOLTAGE
PROG. VOLTAGE
REFERENCE AND
REFERENCE AND
SOFT−START
SOFT−START
FB/ADJ
FB/ADJ
EN
EN
0.7 V
0.7 V
THERMAL
THERMAL
GND
SHUTDOWN
GND
SHUTDOWN
NCP186A (with output active discharge)
NCP186B (without output active discharge)
Figure 2. Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
XDFN8
Pin No.
DFN12
Pin
Name
1, 2
2, 3
OUT
3
1,4,6,7,12
N/C
Tune the space here, this line is not horizontally aligned with others. Not internally connected.
This pin can be tied to the ground plane to improve thermal dissipation.
4
5
FB/ADJ
Feedback / adjustable input pin (connect this pin directly to the OUT pin or to the resistor divider)
5
8
GND
6
9
EN
Chip enable input pin (active “H”)
7, 8
10, 11
IN
Power supply input pin
EPAD
EPAD
EPAD
Description
LDO output pin
Ground pin
It’s recommended to connect the EPAD to GND, but leaving it open is also acceptable
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
IN
−0.3 to 6.0
V
OUT
−0.3 to VIN + 0.3
V
EN
−0.3 to 6.0
V
IOUT
Internally Limited
mA
TJ(MAX)
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Charged Device Model (Note 2)
ESDCDM
1000
V
Input Voltage (Note 1)
Output Voltage
Chip Enable Input
Output Current
Maximum Junction Temperature
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged Device Model tested per JS−002−2014
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Resistance, Junction−to−Air, XDFN8 1.2 mm x 1.6 mm (Note 3)
RqJA
111
°C/W
Thermal Resistance, Junction−to−Air, DFN12 4 mm x 4 mm (Note 3)
RqJA
44
°C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7.
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2
NCP186
Table 4. ELECTRICAL CHARACTERISTICS
VIN = VOUT_NOM + 0.5 V or VIN = 1.8 V whichever is greater; IOUT = 1 mA; CIN = COUT = 1.0 mF (effective capacitance) (Note 4);
VEN = 1.2 V; TJ = 25°C (Note 5); FB/ADJ pin connected to OUT; unless otherwise noted. The specifications in bold are guaranteed at
−40°C ≤ TJ ≤ 125°C.
Parameter
Test Conditions
Max
Unit
1.8
5.5
V
−1.0
1.0
%
VOUT_NOM + 0.5 V ≤ VIN ≤ 5.5 V, VIN ≥ 1.8 V
IOUT = 0 to 1 A, −40°C ≤ TJ ≤ 125°C
VOUT_NOM ≥ 1.2 V
−2.0
1.0
VOUT_NOM + 0.5 V ≤ VIN ≤ 5.5 V, VIN ≥ 1.8 V
IOUT = 0 to 1 A, −40°C ≤ TJ ≤ 125°C
VOUT_NOM < 1.2 V
−2.5
1.0
Operating Input Voltage
Output Voltage Accuracy
VOUT_NOM + 0.5 V ≤ VIN ≤ 5.5 V, VIN ≥ 1.8 V
IOUT = 0 to 1 A, −40°C ≤ TJ ≤ 85°C
Symbol
Min
VIN
VOUT−NOM
Typ
Load Regulation
IOUT = 1 mA to 1000 mA
LoadReg
0.7
5.0
mV
Line Regulation
VIN = VOUT_NOM + 0.5 V to 5.0 V, VIN ≥ 1.8 V
LineReg
0.002
0.1
%/V
Dropout Voltage
XDFN8 1.2x1.6
IOUT = 1 A
VOUT_NOM = 1.2 V
VDO
405
585
mV
VOUT_NOM = 1.75 V
180
295
When VOUT falls to
VOUT_NOM – 100 mV
VOUT_NOM = 1.8 V
175
285
VOUT_NOM = 1.85 V
170
280
VOUT_NOM = 2.5 V
120
190
VOUT_NOM = 2.8 V
110
170
VOUT_NOM = 2.95 V
102
163
VOUT_NOM = 3.0 V
100
160
VOUT_NOM = 3.3 V
95
145
VOUT_NOM = 3.5 V
92
135
VOUT_NOM = 3.9 V
86
130
IQ
90
140
mA
ISTBY
0.1
1.5
mA
Quiescent Current
IOUT = 0 mA
Standby Current
VEN = 0 V
FB/ADJ Pin Input Current
10
nA
Output Current Limit
VOUT = 90% of VOUT_NOM
IFB/ADJ
IOCL
1100
1400
mA
Output Short Circuit Current
VOUT = 0 V
IOSC
1100
1400
mA
Enable Input Current
Enable Threshold Voltage
IEN
0.15
0.6
mA
V
EN Input Voltage “H”
VENH
EN Input Voltage “L”
VENL
Power Supply Rejection Ratio
VIN = VOUT_NOM + 1.0 V, Ripple 0.2 Vp−p,
IOUT = 30 mA, f = 1 kHz
PSRR
75
dB
Output Noise
f = 10 Hz to 100 kHz
VN
48
mVRMS
Output Discharge Resistance
(NCP186A option only)
VIN = 5.5 V, VEN = 0 V, VOUT = 1.8 V
RAD
34
W
Thermal Shutdown
Temperature
Temperature rising from TJ = +25°C
TSD
165
°C
Thermal Shutdown Hysteresis
Temperature falling from TSD
TSDH
20
°C
1.0
0.4
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more
information.
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
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3
NCP186
TYPICAL CHARACTERISTICS
1.212
1.209
1.814
1.206
1.809
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VIN = VOUT−NOM + 0.5 V OR VIN = 1.8 V, WHICHEVER IS GREATER, VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C.
1.203
1.200
1.197
1.194
1.191
1.188
1.185
1.182
1.179
1.176
−40
VOUT−NOM = 1.2 V
−20
0
20
40
60
80
100
120
0
20
40
60
80
100
120
3.922
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
−20
3.932
3.274
3.264
3.254
VOUT−NOM = 3.3 V
−20
0
20
40
60
80
3.912
3.902
3.892
3.882
3.872
3.862
3.852
VOUT−NOM = 3.9 V
3.842
3.244
100
3.832
3.822
−40
120
−20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
Figure 6. Output Voltage vs. Temperature
120
5
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
VOUT−NOM = 3.9 V
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
VOUT−NOM = 3.9 V
4
LOAD REGULATION (mV)
LINE REGULATION (%/V)
VOUT−NOM = 1.8 V
1.774
Figure 4. Output Voltage vs. Temperature
3.284
0.04
1.784
1.779
Figure 3. Output Voltage vs. Temperature
3.294
0.06
1.789
TEMPERATURE (°C)
3.304
0.08
1.794
TEMPERATURE (°C)
3.314
0.10
1.799
1.769
1.764
−40
3.324
3.234
−40
1.804
0.02
0
−0.02
−0.04
−0.06
VIN = VOUT−NOM + 0.5 V to 5.0 V, VIN ≥ 1.8 V
−0.08
−0.10
−40 −20
0
20
40
60
80
100 120
3
2
1
0
−1
−2
IOUT = 1 mA to 1000 mA
−3
−4
−5
−40
−20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature
Figure 8. Load Regulation vs. Temperature
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120
NCP186
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V OR VIN = 1.8 V, WHICHEVER IS GREATER, VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C.
275
XDFN8 (AMX/BMX)
TJ = 125°C
TJ = 25°C
200
175
150
125
TJ = −40°C
100
75
50
0
200
400
600
800
DROPOUT VOLTAGE (mV)
150
125
IOUT = 500 mA
100
75
IOUT = 200 mA
50
−20
0
20
40
IOUT = 10 mA
100 120
80
60
Figure 10. Dropout Voltage vs. Temperature
140
TJ = 125°C
XDFN8 (AMX/BMX)
TJ = 25°C
80
60
TJ = −40°C
40
20
200
400
600
800
120
VOUT−NOM = 3.3 V
XDFN8 (AMX/BMX)
80
IOUT = 500 mA
60
40
IOUT = 200 mA
20
0
−40
1000
IOUT = 1000 mA
100
IOUT = 10 mA
−20
0
20
40
60
80
100
120
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 11. Dropout Voltage vs. Output Current
Figure 12. Dropout Voltage vs. Temperature
450
120
TJ = 125°C
TJ = 25°C
400
350
TJ = −40°C
300
250
200
150
100
50
0
175
Figure 9. Dropout Voltage vs. Output Current
VOUT−NOM = 3.3 V
0
200
TEMPERATURE (°C)
100
0
225
OUTPUT CURRENT (mA)
140
120
1000
IOUT = 1000 mA
XDFN8 (AMX/BMX)
25
0
−40
DROPOUT VOLTAGE (mV)
25
0
GROUND CURRENT (mA)
DROPOUT VOLTAGE (mV)
225
VOUT−NOM = 1.8 V
250
QUIESCENT CURRENT (mA)
DROPOUT VOLTAGE (mV)
275
VOUT−NOM = 1.8 V
250
VOUT−NOM = 1.8 V
0
200
400
600
800
110
100
VOUT−NOM = 1.2 V
90
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
80
VOUT−NOM = 3.9 V
70
60
−40
1000
IOUT = 0 mA
−20
0
20
40
60
80
100
120
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 13. Ground Current vs. Output Current
Figure 14. Quiescent Current vs. Temperature
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NCP186
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V OR VIN = 1.8 V, WHICHEVER IS GREATER, VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C.
1.0
TJ = 125°C
TJ = 25°C
110
100
TJ = −40°C
90
80
70
VOUT−NOM = 1.8 V
IOUT = 0 mA
60
50
2.0
2.5
3.0
3.5
4.5
4.0
5.0
5.5
0.7
0.6
0.5
0.4
0.3
0.2
VEN = 0 V
−20
0
20
40
60
80
100
120
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 15. Quiescent Current vs. Input Voltage
Figure 16. Standby Current vs. Temperature
OUTPUT CURRENT LIMIT (A)
1.9
2.0
VOUT−NOM = 3.9 V
VOUT−NOM = 3.3 V
1.8
1.7
VOUT−NOM = 1.2 V
1.6
1.5
1.4
VOUT−NOM = 1.8 V
1.3
1.2
1.1
−40
VOUT−FORCED = 0 V
−20
0
20
40
60
80
100
120
VOUT−NOM = 1.8 V
1.9
VOUT−NOM = 3.9 V
VOUT−NOM = 3.3 V
1.8
1.7
VOUT−NOM = 1.2 V
1.6
1.5
1.4
1.3
1.2
1.1
−40
VOUT−FORCED = 90% of VOUT−NOM
−20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Short Circuit Current vs.
Temperature
Figure 18. Output Current Limit vs.
Temperature
0.6
1.0
0.9
ENABLE INPUT CURRENT (mA)
SHORT CIRCUIT CURRENT (A)
0.8
0.1
0
−40
2.0
ENABLE THRESHOLD VOLTAGE (V)
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
VOUT−NOM = 3.9 V
0.9
STANDBY CURRENT (mA)
QUIESCENT CURRENT (mA)
120
OFF −> ON
0.8
ON −> OFF
0.7
0.6
0.5
0.4
−40 −20
0
20
40
60
80
100
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
VOUT−NOM = 3.9 V
0.5
0.4
0.3
0.2
0.1
0
−40
120
−20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. Enable Threshold Voltage vs.
Temperature
Figure 20. Enable Input Current vs.
Temperature
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120
120
NCP186
TYPICAL CHARACTERISTICS
50
45
90
VOUT−FORCED = VOUT−NOM
VIN = 5.5 V
VEN = 0 V
80
70
PSRR (dB)
40
35
30
20
−40
−20
0
20
40
60
80
100
60
50
COUT = 1 mF X7R 0805
40
30
20
VOUT−NOM = 1.2 V
VOUT−NOM = 3.3 V
25
VOUT−NOM = 1.8 V, VIN = 2.8 V
VOUT−NOM = 3.3 V, VIN = 4.3 V
10
0
120
10
100
1k
10k
100k
1M
TEMPERATURE (°C)
FREQUENCY (Hz)
Figure 21. Output Discharge Resistance vs.
Temperature (NCP186A option only)
Figure 22. Power Supply Rejection Ratio
OUTPUT VOLTAGE NOISE (mV/√Hz)
6
VOUT−NOM = 1.8 V, VIN = 2.8 V
VOUT−NOM = 3.9 V, VIN = 4.9 V
5
COUT = 1 mF X7R 0805
4
Integral Noise:
VOUT−NOM = 1.8 V
10 Hz − 100 kHz: 45 mVrms
10 Hz − 1 MHz: 61 mVrms
VOUT−NOM = 3.9 V
10 Hz − 100 kHz: 52 mVrms
10 Hz − 1 MHz: 68 mVrms
3
2
1
0
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
Figure 23. Output Voltage Noise Spectral
Density
100 mA/div
VOUT−NOM = 1.2 V
IIN
VIN
VOUT
1 V/div
50 mA/div
VOUT−NOM = 1.2 V
1 V/div
OUTPUT DISCHARGE RESISTANCE (W)
VIN = VOUT−NOM + 0.5 V OR VIN = 1.8 V, WHICHEVER IS GREATER, VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C.
IIN
VIN
VOUT
1 ms/div
20 ms/div
Figure 24. Turn−ON/OFF − VIN driven (slow)
Figure 25. Turn−ON − VIN driven (fast)
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10M
NCP186
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V OR VIN = 1.8 V, WHICHEVER IS GREATER, VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C.
VOUT−NOM = 3.9 V
100 mA/div
50 mA/div
VOUT−NOM = 3.9 V
IIN
VIN
IIN
VIN
VOUT
1 V/div
1 V/div
VOUT
1 ms/div
20 ms/div
500 mV/div
1 V/div
VEN
VOUT−NOM = 1.2 V
Device with output discharge
VEN
VOUT
VOUT−NOM = 1.8 V
Device without output discharge
50 mA/div
50 mA/div
VOUT
Figure 27. Turn−ON − VIN driven (fast)
500 mV/div
1 V/div
Figure 26. Turn−ON/OFF − VIN driven (slow)
IIN
IIN
200 ms/div
200 ms/div
VIN
VOUT−NOM = 1.2 V
500 mV/div
2.8 V
Figure 29. Turn−ON/OFF − EN driven
tR = tF = 1 ms
1.8 V
10 mV/div
10 mV/div
500 mV/div
Figure 28. Turn−ON/OFF − EN driven
VOUT
1.2 V
5.4 V
VIN
VOUT−NOM = 3.9 V
tR = tF = 1 ms
4.4 V
3.9 V
10 ms/div
VOUT
10 ms/div
Figure 30. Line Transient Response
Figure 31. Line Transient Response
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NCP186
TYPICAL CHARACTERISTICS
1 V/div
VIN
500 mA/div
1000 mA
tR = tF = 1 ms
1 mA
IOUT
1.2 V
50 mV/div
VIN
1000 mA
tR = tF = 1 ms
IOUT
1 mA
VOUT
3.9 V
VOUT−NOM = 1.2 V
VOUT−NOM = 3.9 V
10 ms/div
10 ms/div
Figure 32. Load Transient Response
Figure 33. Load Transient Response
1.2
220
PD(MAX), 2 oz Cu
200
1.0
180
PD(MAX), 1 oz Cu
160
0.8
0.6
140
120
qJA, 1 oz Cu
100
qJA, 2 oz Cu
XDFN8 (AMX/BMX)
80 TA = 25°C
TJ = 125°C (PD(MAX))
60
0
100
200
0.4
0.2
300
400
500
600
PCB COPPER AREA (mm2)
Figure 34. qJA and PD(MAX) vs. Copper Area
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0
PD(MAX), MAXIMUM POWER DISSIPATION (W)
VOUT
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
50 mV/div
500 mA/div
1 V/div
VIN = VOUT−NOM + 0.5 V OR VIN = 1.8 V, WHICHEVER IS GREATER, VEN = 1.2 V, IOUT = 1 MA, CIN = COUT = 1.0 MF, TJ = 25°C.
NCP186
APPLICATIONS INFORMATION
General
Enable Operation
The NCP186 is a high performance 1 A low dropout linear
regulator (LDO) delivering excellent noise and dynamic
performance. Thanks to its adaptive ground current
behavior the device consumes only 90 mA typ. of quiescent
current (no−load condition).
The regulator features low noise of 48 mVRMS, PSRR of
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
100 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(A−version only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On A−version the active
discharge transistor is active so the output voltage is pulled
to GND through 34 W (typ.) resistor.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
The EN pin has internal pull−down current source with
value of 150 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
Output Voltage
FB/ADJ pin could be connected to the output pin directly
to compensate voltage drop across the internal bond wiring
and PCB traces or to the middle point of the output resistor
divider to adjust the output voltage.
When connected to the output pin the output voltage of the
circuit is simply the same as the nominal output voltage of
the LDO.
When connected to the resistor divider the output voltage
is the nominal output voltage multiplied by the resistors
divider ratio, see following equation. Corresponding
schematic is shown at Figure 1.
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
ǒ
V OUT−ADJ + V OUT−NOM @ 1 )
Output Capacitor Selection (COUT)
Ǔ
R1
R2
(eq. 1)
Where:
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitor’s datasheet for details).
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the COUT but the
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
• VOUT−ADJ is output voltage of the circuit with resistor
divider
• VOUT−NOM is the LDO’s nominal output voltage
For good stability and fast transient response chose the R1
and R2 values to have their currents IR1 and IR2 in range from
10 to 100 mA. The capacitor C1 = 1 nF improves the stability
and transient response as well.
Output Current Limit
Output current is internally limited to a 1.4 A typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
VOUT−NOM – 100 mV). If the output voltage is shorted to
ground, the short circuit protection will limit the output
current to 1.4 A typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
www.onsemi.com
10
NCP186
Thermal Shutdown
Reverse Current
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case when VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
100 kHz) can be tuned by the selection of COUT capacitor
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
P D(MAX) +
TJ * TA
[W]
q JA
Enable Turn−On Time
The enable turn−on time is defined as the time from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT−NOM, COUT and TA.
PCB Layout Recommendations
(eq. 2)
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors as close as
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
Where (TJ − TA) is the temperature difference between the
junction and ambient temperatures and θJA is the thermal
resistance (dependent on the PCB as mentioned above).
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
P D + V IN @ I GND ) ǒV IN * V OUTǓ @ I OUT [W]
(eq. 3)
Where IGND is the LDO’s ground current, dependent on
the output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
The relation of θJA and PD(MAX) to PCB copper area and
Cu layer thickness could be seen on the Figure 34.
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11
NCP186
ORDERING INFORMATION TABLE
Voltage
Option
(VOUT−NOM)
Marking
Option
Package
Shipping
NCP186AMN080TBG
0.8 V
ADJ
With active discharge
DFN12
(Pb−Free)
3000 / Tape & Reel
NCP186AMX120TAG (Note 6)
1.2 V
FA
NCP186AMX150TAG (Note 6)
1.5 V
FN
XDFN8
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 6)
NCP186AMX175TAG (Note 6)
1.75 V
FC
NCP186AMX180TAG (Note 6)
1.8 V
FD
NCP186AMX185TAG
1.85 V
FL
NCP186AMX250TAG (Note 6)
2.5 V
FE
NCP186AMX280TAG (Note 6)
2.8 V
FF
NCP186AMX295TAG (Note 6)
2.95 V
FP
NCP186AMX300TAG (Note 6)
3.0 V
FG
NCP186AMX330TAG (Note 6)
3.3 V
FH
NCP186AMX350TAG
3.5 V
FJ
NCP186AMX390TAG (Note 6)
3.9 V
FK
NCP186BMX120TAG
1.2 V
HA
NCP186BMX150TAG (Note 6)
1.5 V
HN
XDFN8
(Pb−Free)
3000 or 5000 / Tape & Reel
(Note 6)
NCP186BMX175TAG
1.75 V
HC
NCP186BMX180TAG (Note 6)
1.8 V
HD
NCP186BMX185TAG (Note 6)
1.85 V
HL
NCP186BMX250TAG (Note 6)
2.5 V
HE
NCP186BMX280TAG
2.8 V
HF
NCP186BMX300TAG
3.0 V
HG
NCP186BMX330TAG (Note 6)
3.3 V
HH
NCP186BMX350TAG
3.5 V
HJ
NCP186BMX390TAG
3.9 V
HK
Part Number
Without active discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
6. Product processed after October 1, 2022 are shipped with quantity 5000 units / tape & reel.
www.onsemi.com
12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN12, 4x4, 0.65P
CASE 506CE
ISSUE O
1
DATE 23 FEB 2012
SCALE 2:1
A B
D
L
L
L1
PIN ONE
REFERENCE
2X
0.15 C
2X
ÇÇÇ
ÇÇÇ
ÇÇÇ
0.15 C
DETAIL A
E
ALTERNATE TERMINAL
CONSTRUCTIONS
ÉÉ
ÇÇ
ÇÇ
EXPOSED Cu
TOP VIEW
DETAIL B
0.10 C
DETAIL B
ALTERNATE
CONSTRUCTION
A
0.08 C
(A3)
NOTE 4
A1
SIDE VIEW
0.10
DETAIL A
K
SEATING
PLANE
C
C A B
M
D2
1
6
0.10
C A B
M
E2
12X
L
12
7
e
12X
0.05 C
NOTE 3
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.25
0.35
4.00 BSC
3.30
3.50
4.00 BSC
2.40
2.60
0.65 BSC
0.20
−−−
0.30
0.50
−−−
0.15
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
ALYWG
G
*This information is generic. Please refer to device
data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present.
SOLDERING FOOTPRINT*
12X
3.54
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
XXXXXX= Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(*Note: Microdot may be in either location)
b
0.10 C A B
BOTTOM VIEW
0.63
4.30
2.64
0.65
PITCH
MOLD CMPD
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMESNION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
12X
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON78622E
12 PIN DFN, 4X4, 0.65P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
XDFN8 1.6x1.2, 0.4P
CASE 711AS
ISSUE D
SCALE 4:1
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
A
B
8X
L1
DETAIL A
ÍÍÍ
ÍÍÍ
ÍÍÍ
OPTIONAL
CONSTRUCTION
E
PIN ONE
IDENTIFIER
DIM
A
A1
b
D
D2
E
E2
e
L
L1
ÉÉ
ÉÉ
ÇÇ
ÇÇ
EXPOSED Cu
TOP VIEW
0.10 C
DATE 08 DEC 2015
MOLD CMPD
DETAIL B
OPTIONAL
CONSTRUCTION
A
DETAIL B
GENERIC
MARKING DIAGRAM*
A1
8X
MILLIMETERS
MIN
NOM
MAX
0.300 0.375 0.450
0.000 0.025 0.050
0.130 0.180 0.230
1.500 1.600 1.700
1.200 1.300 1.400
1.100 1.200 1.300
0.200 0.300 0.400
0.40 BSC
0.150 0.200 0.250
0.000 0.050 0.100
0.08 C
NOTE 3
DETAIL A
8X
8X
C
SIDE VIEW
L
XXMG
G
SEATING
PLANE
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
D2
1
4
E2
L1
8
5
e
e/2
8X
b
0.10 C A
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT*
B
0.05 C
1.44
PACKAGE
OUTLINE
8X
0.35
1.40
0.44
8X
0.26
1
0.40
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON87768E
XDFN8, 1.6X1.2, 0.4P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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