NCP2815BFCCT2G

NCP2815 NOCAPt LongPlay Headphone Amplifier NCP2815 is a dual LongPlay true ground headphone amplifier designed for portable communication device applications such as mobile phones. This part is capable of delivering 26 mW of continuous average power into a 32 W load from a 1.8 V power supply with a THD+N of 1%. Based on the power supply delivered to the device, an internal power management block generates a symmetrical positive and negative voltage. Thus, the internal amplifiers provide outputs referenced to Ground and the losses are reduced which helps to increase the battery life. In this NOCAP configuration, the two external heavy coupling capacitors can be removed. This provides a significant space and cost savings compared to a typical stereo application. NCP2815 is available with an external adjustable gain (version A), or internal gain of −1.5 V/V (version B). It reaches a superior −100 dB PSRR and noise floor. Thus, it offers high fidelity audio sound, as well as a direct connection to the battery. It contains circuitry to prevent “Pop & Click” noise that would otherwise occur during turn−on and turn−off transitions. The device is available in 12 bump CSP package (1.2 x 1.6 mm) which helps to save space on the board. Features • NOCAP Output Eliminates DC−Blocking Capacitors: Saves Board Area Saves Component Cost ♦ No Low−Frequency Response Attenuation LongPlay Architecture: Increase the Battery Life High PSRR (−100 dB): Direct Connection to the Battery “Pop and Click” Noise Protection Circuitry Internal Gain (−1.5 V/V) or External Adjustable Gain Ultra Low Current Shutdown Mode High Impedance Mode 1.6 V – 3.6 V Operation Thermal Overload Protection Circuitry CSP 1.2 x 1.6 mm These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant ♦ ♦ • • • • • • • • • • http://onsemi.com MARKING DIAGRAM 12 PIN CSP FC SUFFIX CASE 499BJ 815xz AYWW G x = A for NCP2815A = B for NCP2815B z = C for Backside laminate A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package Pin Configuration A1 A2 A3 A4 CPM PVM INL INR B1 B2 B3 B4 PGND /SD HiZ SGND C1 C2 C3 C4 CPP VP OUTL OUTR (Top View) ORDERING INFORMATION See detailed ordering and shipping information on page 10 of this data sheet. Typical Applications • Headset Audio Amplifier for ♦ ♦ ♦ ♦ Cellular Phones MP3 player Personal Digital Assistant and Portable Media Player Portable Devices © Semiconductor Components Industries, LLC, 2012 January, 2012 − Rev. 1 1 Publication Order Number: NCP2815/D NCP2815 Figure 1. Typical Application Circuit http://onsemi.com 2 NCP2815 VP 1 mF 1mF VP CPP CPM VRP PVM POWER MANAGEMENT PGND VRM VRP Left Audio INL − OUTL + VRM SD BIASING HiZ CLICK / POP SUPPRESSION VRP + OUTR Right Audio INR − VRM SGND Figure 2. Typical Application Schematic Version A http://onsemi.com 3 1mF NCP2815 VP 1mF 1 mF VP CPP CPM VRP PVM POWER MANAGEMENT PGND 1mF VRM VRP INL Left Audio − OUTL + VRM SD BIASING HiZ CLICK / POP SUPPRESSION VRP + OUTR INR Right Audio − VRM SGND Figure 3. Typical Application Schematic Version B PIN FUNCTION DESCRIPTION Pin Pin Name A1 CPM Input / Output Charge pump flying capacitor negative terminal. A 1 mF ceramic filtering capacitor to CPP is required A2 PVM Output Charge pump output. A 1 mF ceramic filtering capacitor to ground is required A3 INL Input Left input of the audio source A4 INR Input Right input of the audio source B1 PGND Ground B2 /SD Input Type Description Power ground Enable activation. B4 SGND Ground Sense Ground. Connect to shield terminal of headphone jack or ground plane. C1 CPP Input / Output Charge pump flying capacitor positive terminal. A 1 mF ceramic filtering capacitor to CPM is required. C2 VP Power Positive supply voltage, connected to a Lithium/Ion battery or other power supply. C3 OUTL Output Left audio channel output signal C4 OUTR Output Right audio channel output signal B3 HiZ Input Output high impedance mode activation. http://onsemi.com 4 NCP2815 MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 to + 4.5 V INL, INR, /SD pins Vmr1 −0.3 to VP + 0.3 V HiZ, OUTL, OUTR pins Vmr2 −0.3 – VP to VP + 0.3 V Human Body Model (HBM) ESD Rating are (Note 2) ESD HBM 2000 V Machine Model (MM) ESD Rating are (Note 2) ESD MM 200 V RqJC (Note 7) °C/W TA −40 to + 85 °C Operating Junction Temperature Range TJ −40 to + 125 °C Maximum Junction Temperature (Note 6) TJMAX + 150 °C Storage Temperature Range TSTG −65 to + 150 °C Moisture Sensitivity (Note 5) MSL Level 1 VP Pin: Power Supply Voltage (Note 1) CSP 1.2 x 1.6 mm package (Notes 6 and 7) Thermal Resistance Junction to Case Operating Ambient Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25 °C. 2. According to JEDEC standard JESD22−A108B. 3. This device series contains ESD protection and passes the following tests: Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114 for all pins. Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115 for all pins. 4. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78 class II. 5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A. 6. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation. 7. The RqCA is dependent on the PCB heat dissipation. The maximum power dissipation (PD) is dependent on the min input voltage, the max output current and the selected external components. R qCA + 125 * T A PD * R qJC http://onsemi.com 5 NCP2815 ELECTRICAL CHARACTERISTICS Min & Max Limits apply for TA between −40°C to +85°C and TJ up to + 125°C for VIN between 1.6 V to 3.6 V (Unless otherwise noted). Typical values are referenced to TA = + 25°C and VP = 1.8 V. Symbol VBAT Parameter Conditions Supply voltage range ISD Shutdown current IQ Quiescent current Min Typ Max Unit 3.6 V 1 mA 1.6 2.2 mA 20 25 kW 1.6 VP = 1.8 V RIN Input resistance RSD /SD pull−down resistor 300 kW RHiZ HiZ pull−down resistor 150 kW Maximum input signal swing 2.8 VP−P VIH High−level input voltage SD and HiZ pin VIL Low−level input voltage SD and HiZ pin UVLO UVLO threshold UVLOHYS 15 1.2 V 0.4 1.4 V UVLO hysteresis 100 mV TSD Thermal shutdown temperature 160 °C VOS Output offset voltage ±0.5 mV TWU Turning On time VLP Max Output Swing (peak value) (Note 8) PO Max Output Power (Note 8) PO Falling edge V Input AC grounded 1 HSVBAT = 1.8 V, Headset = 32 W HSVBAT = 1.8 V, THD+N = 1% Headset = 16 W Headset = 32 W ms 1.13 20 Vpeak mW 35 32 Max Output Power HSVBAT = 3.6 V, THD+N = 1% Headset = 16 W Headset = 32 W 62 35 Crosstalk (Note 8) Headset ≥ 16 W −80 mW −60 dB PSRR Power Supply Rejection Ratio Inputs Shorted to Ground F = 217 Hz to 1 kHz −100 dB THD+N Total Harmonic Distortion + Noise Headset = 16 W POUT = 10 mW, F = 1 kHz 0.03 % THD+N Total Harmonic Distortion + Noise Headset = 32 W POUT = 10 mW, F = 1 kHz 0.01 % THD+N Total Harmonic Distortion + Noise Headset = 32 W VOUT = 400 mV, F = 1 kHz −78 dB SNR Signal to noise ratio 100 dB ZSD Output Impedance in Shutdown Mode 20 kW ZHiZ Output Impedance in High Impedance Mode 15 20 25 kW −2 ±0.3 +2 % Max channel to channel gain tolerance B Version only, TA = +25 °C FSW1 Headset charge pump switching frequency POUT > 500 mW 1 MHz FSW2 Headset charge pump switching frequency POUT < 500 mW 125 kHz Voltage Gain B version only AV 8. Guaranteed by design and characterized. 9. Typical application circuit as depicted http://onsemi.com 6 −1.54 −1.5 −1.46 V/V NCP2815 TYPICAL OPERATING CHARACTERISTICS 10.00 10.00 Vp = 1.8 V 1.00 THD+N (%) THD+N (%) 1.00 Vp = 1.8 V Right Channel 0.10 Right Channel 0.10 0.01 0.01 Left Channel Left Channel 0.001 10 100 1k FREQUENCY (Hz) 10k 100k 0.001 10 Figure 4. THD+N vs Frequency in Phase, 32 W Load, Pout = 10 mW 10.00 100 1k FREQUENCY (Hz) 10k 100k Figure 5. THD+N vs Frequency in Phase, 32 W Load, Pout = 10 mW 10.00 Vp = 1.8 V Vp = 1.8 V THD+N (%) THD+N (%) 1.00 Left Channel 0.10 Right Channel 1.00 Left Channel Right Channel 0.10 0.01 0.001 0.00 0.01 0.02 Pout (W) 0.03 0.010 0.00 0.04 Figure 6. THD+N vs Pout, 32 W Load 0.04 0.05 0.06 Vp = 1.8 V −10 −20 CROSSTALK (dB) CROSSTALK (dB) 0.03 Pout (W) 0 Vp = 1.8 V −20 −30 −40 −50 −60 −70 −80 −90 −30 −40 −50 Right Channel −60 −70 Left Channel −80 −100 −110 −120 10 0.02 Figure 7. THD+N vs Pout, 16 W Load 0 −10 0.01 −90 100 1k FREQUENCY (Hz) 10k −100 100k 10 100 1k FREQUENCY (Hz) 10k Figure 9. Crosstalk vs. Frequency, Rload = 32 W, Pout = 10 mW Figure 8. Power Supply Rejection Ratio vs. Frequency http://onsemi.com 7 100k NCP2815 TYPICAL OPERATING CHARACTERISTICS 400 3 2 25°C 1 Vp = 5.5 V 250 4.2 V 3.6 V 200 150 2.5 V 100 1.8 V 50 0 1.6 2.1 2.6 3.1 0 3.6 1.6 V 0 10 20 30 40 50 60 70 Vp (V) Pout (mW) Figure 10. Quiescent Current vs Power Supply Figure 11. Power Dissipation vs Pout Left and Right in Phase 40 70 35 60 30 80 50 (mW) 25 (mW) 5V 300 Pdis (mW) QUIESCENT CURRENT (mA) 350 20 15 40 30 20 10 THD+N < 1%, Rload = 32 W 5 0 1.6 2.1 2.6 3.1 THD+N < 1%, Rload = 16 W 10 0 1.5 3.6 Vp (V) 2.0 2.5 3.0 3.5 Vp (V) Figure 12. Max Output Power vs Vp, 32 W Load 4.0 4.5 5.0 5.5 Figure 13. Max Output Power vs Vp, 16 W Load http://onsemi.com 8 NCP2815 DETAIL OPERATING DESCRIPTION Detailed Description Input Capacitor Selection The NCP2815 is a stereo headphone amplifier with NOCAP architecture. This architecture eliminates the need to use two big external capacitors required by conventional headphone amplifier. The structure of the NCP2815 is composed of two true ground amplifiers, a UVLO, a short circuit protection and a thermal shutdown circuit. Additionally, a special circuit is embedded to eliminate any pop and click noise that occurs during turn on and turn off time. Version A has an external gain selectable by two resistors, Version B has a gain of 1.5 V/V. The input coupling capacitor blocks the DC voltage at the amplifier input terminal. This capacitor creates a high−pass filter with Rin (externally selectable for Version A, 20 kW for Version B). The size of the capacitor must be large enough to couple in the low frequencies without severe attenuation in the audio bandwith (20 Hz – 20 kHz). The cut off frequency for the input high−pass filter is : Fc + 1 2pR inC in A Fc < 20 Hz is recommended. NOCAP NOCAP is a patented architecture which requires only 2 small ceramic capacitors. It generates a symmetrical positive and negative voltage which it allows the output of the amplifiers to be biased to ground. Charge Pump Capacitor Selection Use a ceramic capacitor with low ESR for better performances. An X5R / X7R capacitor is recommended. The flying capacitor (C2) serves to transfer charge during the generation of the negative voltage. The PVM capacitor (C3) must be equal at least to the flying capacitor to allow maximum transfer charge. Table 1 suggests typical values and manufacturers: LongPlay Architecture NCP2815 includes a LongPlay architecture which helps to save battery life by reducing the quiescent current. The charge pump frequency is reduced to 125 kHz for an output load < 500 mW. Table 1. Current Limit Protection Circuit The NCP2815 contains protection circuitry against shorts to ground. The currrent is limited to 300 mA when an output is shorted to GND and a signal appears at the input. Thermal Overload Protection Reference Package Manufacturer 1 mF C1005X5R0J105K 0402 TDK 1 mF GRM155R60J105K19 0402 Murata Lower value capacitors can be used but the maximum output power is reduced and the device may not operate to specifications. Internal amplifiers are switched off when the temperature exceeds 160°C, and are switched back on when the temperature decreases below 140°C. Power Supply Decoupling Capacitor (C1) Under Voltage Lockout The NCP2815 is a True Ground amplifier which requires an adequate decoupling capacitor to reduce noise and THD + N. It is recommended to use an X5R / X7R ceramic capacitor with a value of 1 mF and place it as close as possible to the Vp pin. When the battery voltage decreases below 1.4 V, the amplifiers are turned off. The hysteresis required to turn back on the device is 100 mV. Pop and Click Suppression Circuitry The NCP2815 includes a special circuit to eliminate any pop and click noise during turn on and turn off time. The amplifier creates an offset during these transitions at the output which give a parasitic noise called “pop and click noise”. The NCP2815 eliminates this problem. Shutdown Function The device enters in shutdown mode when the shutdown signal is low. During the shutdown mode, the DC quiescent current of the circuit does not exceed 1 mA. In this configuration, the output impedance is 20 kW on each output. Gain Setting Resistor Selection (Rin and Rf, A Version Only) Layout Recommendation Rin and Rf set the closed loop gain of the amplifier. A low gain configuration (close to 1) minimizes the THD + noise values and maximizes the signal to noise ratio. A closed loop gain in the range of 1 to 10 is recommended to optimize overall system performance. The formula to calculate the gain is: Av + * Value Connect C1 as close as possible to the Vp pin. Connect C2 and C3 as close as possible to the NCP2815. Route the audio signal and SGND far away from Vp, CPP, CPM, PVM and PGND to avoid any perturbation due to the switching. Rf Rin http://onsemi.com 9 NCP2815 ORDERING INFORMATION Package Shipping† NCP2815AFCT2G CSP − 12 – 1.6 x 1.2 mm (Pb−Free) 3000 / Tape & Reel NCP2815BFCT2G CSP − 12 – 1.6 x 1.2 mm (Pb−Free) 3000 / Tape & Reel CSP − 12 – 1.6 x 1.2 mm (Backside laminate coating) (Pb−Free) 3000 / Tape & Reel Device NCP2815BFCCT2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. NOCAP is a trademark of Semiconductor Components Industries, LLC (SCILLC). http://onsemi.com 10 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WLCSP12 1.62x1.22x0.539 CASE 499BJ ISSUE D DATE 02 JUN 2022 GENERIC MARKING DIAGRAM* XXXXX ALYWW G XXXXX A L Y WW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON48124E WLCSP12 1.62x1.22x0.539 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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