NCP3064, NCP3064B,
NCV3064
Inverting Converter,
Switching Regulator - Buck
Boost, ON/OFF Function
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1.5 A
MARKING
DIAGRAMS
The NCP3064 Series is a higher frequency upgrade to the popular
MC33063A and MC34063A monolithic DC−DC converters. These
devices consist of an internal temperature compensated reference,
comparator, controlled duty cycle oscillator with an active current
limit circuit, driver and high current output switch. This series was
specifically designed to be incorporated in Step−Down and Step−Up
and Voltage−Inverting applications with a minimum number of
external components. The ON/OFF pin provides a low power
shutdown mode.
SOIC−8
D SUFFIX
CASE 751
8
1
3064x
ALYWG
G
1
V3064
ALYWG
G
Features
•
•
•
•
•
•
•
•
•
•
•
Input Voltage Range from 3.0 V to 40 V
Logic Level Shutdown Capability
Low Power Standby Mode, Typical 100 mA
Output Switch Current to 1.5 A
Adjustable Output Voltage Range
150 kHz Frequency Operation
Precision 1.5% Reference
Internal Thermal Shutdown Protection
Cycle−by−Cycle Current Limiting
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
These are Pb−Free Devices
1
NCP3064x
AWL
YYWWG
PDIP−8
P, P1 SUFFIX
CASE 626
8
1
NCV3064
AWL
YYWWG
Applications
• Step−Down, Step−Up and Inverting supply applications
• High Power LED Lighting
• Battery Chargers
ON/OFF
1
L1
Rsense
VCC
CIN
R2
Ç
Ç
Ç
Ç
Ç
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ON/OFF
SWC
Ipk
SWE
VCC
CT
FB
VOUT
NCP3064
x
A
L, WL
Y, YY
W, WW
G or G
R1
D1
GND
NCP3064
CT
GND
GND
August, 2019 − Rev. 8
=
=
=
=
=
=
=
NCV
3064
ALYWG
G
Specific Device Code
B
Assembly Location
Wafer Lot
Year
Work Week
Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Figure 1. Typical Buck Application Circuit
© Semiconductor Components Industries, LLC, 2009
DFN8
MN SUFFIX
CASE 488AF
NCP
3064x
ALYWG
G
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
1
Publication Order Number:
NCP3064/D
NCP3064, NCP3064B, NCV3064
SOIC−8/PDIP−8
1
Switch Collector
Switch Emitter
2
DFN8
8
ON/OFF
7
Ipk Sense
Timing Capacitor
3
6
GND
4
5
ÇÇ
ÇÇ
ÇÇ
ÇÇ
Switch Collector
Switch Emitter
Timing Capacitor
VCC
GND
Comparator
Inverting
Input
(Top View)
NOTE:
Figure 2. Pin Connections
(Top View)
ON/OFF
Ipk Sense
VCC
Comparator
Inverting
Input
EP Flag must be tied to GND Pin 4 on PCB
Figure 3. Pin Connections
8
TSD
ON/OFF
ON/OFF
EP Flag
Ç
Ç
Ç
Ç
1
Switch Collector
Bias
R
S
7
Ipk Sense
Q
Comparator
−
+
S
R
2
Q
Switch Emitter
0.2 V
Oscillator
6
CT
3
Timing Capacitor
VCC
Comparator
1.25 V
Reference
Regulator
+
−
5
4
GND
Comparator Inverting Input
Figure 4. Block Diagram
PIN DESCRIPTION
Pin No.
Pin Name
Description
1
Switch Collector
2
Switch Emitter
3
Timing Capacitor
4
GND
5
Comparator
Inverting Input
6
VCC
7
Ipk Sense
Peak Current Sense Input to monitor the voltage drop across an external resistor to limit the peak
current through the circuit
8
ON/OFF
ON/OFF Pin. Pulling this pin to High level turns the device in Operating. To switch into mode with
low current consumption this pin has to be in Low level or floating.
Internal Darlington switch collector
Internal Darlington switch emitter
Timing Capacitor Oscillator Input, Timing Capacitor
Ground pin for all internal circuits
Inverting input pin of internal comparator
Voltage supply
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2
NCP3064, NCP3064B, NCV3064
MAXIMUM RATINGS (measured vs. Pin 4, unless otherwise noted)
SYMBOL
VALUE
UNIT
VCC (Pin 6)
VCC
−0.3 to 42
V
Comparator Inverting Input (Pin 5)
VCII
−0.3 to VCC
V
Darlington Switch Emitter (Pin 2) (Transistor OFF)
VSWE
−0.6 to VCC
V
Darlington Switch Collector (Pin 1)
VSWC
−0.3 to 42
V
Darlington Switch Collector to Emitter (Pins 1 and 2)
VSWCE
−0.3 to 42
V
RATING
Darlington Switch Peak Current
ISW
1.5
A
Ipk Sense Voltage (Pin 7)
VIPK
−0.3 to (VCC + 0.3 V)
V
Timing Capacitor Pin Voltage (Pin 3)
VTC
−0.2 to +1.4
V
Moisture Sensitivity Level
MSL
1
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions
TSLD
ON/OFF Pin Voltage
VON/OFF
260
(−0.3 to 25) < VCC
°C
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
THERMAL CHARACTERISTIC
Rating
Symbol
Value
Unit
PDIP−8 (Note 5) Thermal Resistance Junction−to−Air
RqJA
100
°C/W
SOIC−8 (Note 5)
Thermal Resistance Junction−to−Air
Thermal Resistance Junction−to−Case
RqJA
RqJC
180
45
°C/W
DFN−8 (Note 5)
Thermal Resistance Junction−to−Air
Thermal Resistance Junction−to−Case
RqJA
RqJC
78
14
°C/W
TSTG
−65 to +150
°C
TJ MAX
+150
°C
TJ
0 to +70
−40 to +125
°C
Storage temperature range
Maximum junction temperature
Operation Junction Temperature Range (Note 3)
NCP3064
NCP3064B, NCV3064
1. This device series contains ESD protection and exceeds the following tests:
Pins 1 through 8:
Human Body Model 2000 V per AEC Q100−002; 003 or JESD22/A114; A115
Machine Model Method 200 V
2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
3. The relation between junction temperature, ambient temperature and Total Power dissipated in IC is TJ = TA + RQ @ PD.
4. The pins which are not defined may not be loaded by external signals.
5. 1 oz copper, 1 in2 copper area.
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3
NCP3064, NCP3064B, NCV3064
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, −40°C < TJ < +125°C for NCP3064B and NCV3064, 0°C < TJ < +70°C for
NCP3064 unless otherwise specified)
Characteristic
Conditions
Min
Typ
Max
Unit
Frequency
(VPin 5 = 0 V, CT = 2.2 nF,
TJ = 25°C)
110
150
190
kHz
Discharge to Charge Current Ratio
(Pin 7 to VCC, TJ = 25°C)
5.5
6.0
6.5
−
Capacitor Charging Current
(Pin 7 to VCC, TJ = 25°C)
275
mA
Capacitor Discharging Current
(Pin 7 to VCC, TJ = 25°C)
1.65
mA
Symbol
OSCILLATOR
fOSC
IDISCHG /
ICHG
IC
IDISCH
VIPK
Current Limit Sense Voltage
(TJ = 25°C)
165
200
235
mV
(ISW = 1.0 A, TJ = 25°C)
(Note 6)
1.0
1.3
V
(VCE = 40 V)
1.0
10
mA
TJ = 25°C
1.25
OUTPUT SWITCH (Note 6)
VSWCE
Darlington Switch Collector to
Emitter Voltage Drop
IC(OFF)
Collector Off−State Current
COMPARATOR
VTH
REGLiNE
ICII in
Threshold Voltage
Threshold Voltage Line Regulation
Input Bias Current
V
NCP3064
−1.5
+1.5
%
NCP3064B, NCV3064
−1.5
+1.5
%
(VCC = 3.0 V to 40 V)
−6.0
2.0
6.0
mV
(Vin = Vth)
−1000
−100
1000
nA
ON/OFF FEATURE
VIH
ON/OFF Pin Logic Input Level High
VOUT = Nominal Output Voltage
TJ = 25°C
TJ = −40°C to +125°C
2.2
2.4
−
−
−
−
V
VIL
ON/OFF Pin Logic Input Level Low
VOUT = 0 V
TJ = 25°C
TJ = −40°C to +125°C
−
−
−
−
1.0
0.8
V
IIH
ON/OFF Pin Input Current
ON/OFF Pin = 5 V (ON)
TJ = 25°C
15
mA
IIL
ON/OFF Pin Input Current
ON/OFF Pin = 0 V (OFF)
TJ = 25°C
1.0
mA
TOTAL DEVICE
Supply Current
(VCC = 5.0 V to 40 V,
CT = 2.2 nF, Pin 7 = VCC,
VPin 5 > Vth, Pin 2 = GND,
remaining pins open)
ISTBY
Standby Quiescent Current
ON/OFF Pin = 0 V (OFF)
TJ = 25°C
TJ = −40°C to +125°C
TSHD
Thermal Shutdown Threshold
160
°C
Hysteresis
10
°C
ICC
TSHDHYS
7.0
85
100
100
mA
mA
6. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
7. The VIPK (Sense) Current Limit Sense Voltage is specified at static conditions. In dynamic operation the sensed current turn−off value
depends on comparator response time and di/dt current slope. See the Operating Description section for details.
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4
NCP3064, NCP3064B, NCV3064
300
CT = 2.2 nF
TJ = 25°C
145
FREQUENCY (kHz)
250
200
150
100
140
135
130
125
50
0
VOLTAGE DROP (V)
150
120
0 1 2 3 4 5 6 7 8 9 1011 12131415161718192021
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
−40
0
5
10
30
35
Figure 6. Oscillator Frequency vs. Supply
Voltage
40
1.3
1.2
1A
0.75 A
0.5 A
1.25 A
ICE = 0.25 A
0.75 A
1.1
−20
0
20
40
60
80
100
120
1.25 A
0.9
0.5 A
0.8
ICE = 0.25 A
0.6
−40
140
−20
1.21
40
60
80
100
120
140
ON/OFF COMP. THRESHOLD VOLTAGE (V)
1.23
20
20
40
60
80
100
120
140
Figure 8. Common Emmitter Configuration Outp
Darlington Switch Voltage Drop vs. Temperatur
1.25
0
0
TJ, JUNCTION TEMPERATURE (°C)
1.27
−20
1A
1.0
0.7
1.29
COMP. THRESHOLD VOLTAGE (V)
25
Figure 5. Oscilator Frequency vs. Timing
Capacitor CT
Figure 7. Emitter Follower Configuration Output
Darlington Switch Voltage Drop vs. Temperature
−40
20
VCC, SUPPLY VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
1.19
15
CT, CAPACITANCE (nF)
VOLTAGE DROP (V)
OSCILATOR FREQUENCY (kHz)
350
1.6
1.5
1.4
1.3
1.2
1.1
1
−40
TJ, JUNCTION TEMPERATURE (°C)
−20
0
20
40
60
80
100
120
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Comparator Threshold Voltage vs.
Temperature
Figure 10. ON/OFF Comparator Threshold
Voltage vs. Temperature
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5
140
NCP3064, NCP3064B, NCV3064
450
STANDBY SUPPLY CURRENT (mA)
Vipk, CURRENT LIMIT SENSE VOLTAGE (V)
0.20
0.19
0.18
0.17
0.16
0.15
−40
−20
0
20
40
60
80
100
120
140
400
350
300
250
200
150
100
50
0
0
5
10
15
20
25
30
35
40
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 11. Current Limit Sense Voltage vs.
Temperature
Figure 12. Standby Current vs. Supply Voltage
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6
NCP3064, NCP3064B, NCV3064
INTRODUCTION
capacitor. When the output voltage level reaches nominal,
the output switch next cycle turning on is inhibited. The
feedback comparator will enable the switching immediately
when the load current causes the output voltage to fall below
nominal. Under these conditions, output switch conduction
can be enabled for a partial oscillator cycle, a partial cycle
plus a complete cycle, multiple cycles, or a partial cycle plus
multiple cycles.
The NCP3064 is a monolithic power switching regulator
optimized for dc to dc converter applications. The
combination of its features enables the system designer to
directly
implement
step−up,
step−down,
and
voltage−inverting converters with a minimum number of
external components. Potential applications include cost
sensitive consumer products as well as equipment for
industrial markets. A representative block diagram is shown
in Figure 4.
Oscillator
The oscillator frequency and off−time of the output switch
are programmed by the value selected for the timing
capacitor CT. Capacitor CT is charged and discharged by a
1 to 6 ratio internal current source and sink, generating a
positive going sawtooth waveform at Pin 3. This ratio sets
the maximum tON/(tON + tOFF) of the switching converter as
6/(6 + 1) or 0.857 (typical).
The oscillator peak and valley voltage difference is
500 mV typically. To calculate the CT capacitor value for the
required oscillator frequency, use the equation found in
Figure 15. An Excel® based design tool can be found at
www.onsemi.com on the NCP3064 product page.
Operating Description
The NCP3064 is a hysteric, dc−dc converter that uses a
gated oscillator to regulate output voltage. In general, this
mode of operation is some what analogous to a capacitor
charge pump and does not require dominant pole loop
compensation for converter stability. The Typical Operating
Waveforms are shown in Figure 13. The output voltage
waveform shown is for a step−down converter with the
ripple and phasing exaggerated for clarity. During initial
converter startup, the feedback comparator senses that the
output voltage level is below nominal. This causes the
output switch to turn on and off at a frequency and duty cycle
controlled by the oscillator, thus pumping up the output filter
Figure 13. Typical Operating Waveform
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7
NCP3064, NCP3064B, NCV3064
Peak Current Sense Comparator
inductor pins and with decreasing inductor value. It is
recommended to check the real max peak current in the
application at worst conditions to be sure that the maximum
peak current will never get over the 1.5 A Darlington Switch
Current maximum rating.
With a voltage ripple gated converter operating under
normal conditions, output switch conduction is initiated by
the Voltage Feedback comparator and terminated by the
oscillator. Abnormal operating conditions occur when the
converter output is overloaded or when feedback voltage
sensing is lost. Under these conditions, the Ipk Current
Sense comparator will protect the Darlington output Switch.
The switch current is converted to a voltage by inserting a
fractional W resistor, RSC, in series with VCC and the
Darlington output switch. The voltage drop across RSC is
monitored by the Current Sense comparator. If the voltage
drop exceeds 200 mV with respect to VCC, the comparator
will set the latch and terminate output switch conduction on
a cycle−by−cycle basis. This Comparator/Latch
configuration ensures that the Output Switch has only a
single on−time during a given oscillator cycle.
Thermal Shutdown
Internal thermal shutdown circuitry is provided to protect
the IC in the event that the maximum junction temperature
is exceeded. When activated, typically at 160°C, the Output
Switch is disabled. The temperature sensing circuit is
designed with 10°C hysteresis. The Switch is enabled again
when the chip temperature decreases to at least 150°C
threshold. This feature is provided to prevent catastrophic
failures from accidental device overheating. It is not
intended to be used as a replacement for proper
heat−sinking.
Output Switch
Real
Vturn−off on
Rs Resistor
Vipk(sense)
The output switch is designed in a Darlington
configuration. This allows the application designer to
operate at all conditions at high switching speed and low
voltage drop. The Darlington Output Switch is designed to
switch a maximum of 40 V collector to emitter voltage and
current up to 1.5 A
I1
di/dt slope
Io
I through the
Darlington
Switch
t_delay
ON/OFF Function
The ON/OFF function disables switching and puts the part
into a low power consumption mode. A PWM signal up to
1 kHz can be used to pulse the ON/OFF and control the
output. Pulling this pin below the threshold voltage (~1.4 V)
or leaving it open turns the regulator off and has a standby
current