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NCP3337MNADJR2G

NCP3337MNADJR2G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    VFDFN10

  • 描述:

    IC REG LIN POS ADJ 500MA 10DFN

  • 数据手册
  • 价格&库存
NCP3337MNADJR2G 数据手册
Low Dropout Regulator, Ultra High Accuracy, Low Iq, 500 mA with Power Good NCP3337 www.onsemi.com The NCP3337 is a high performance, low dropout regulator. With accuracy of ±0.9% over line and load and ultra−low quiescent current and noise it encompasses all of the necessary features required by today’s consumer electronics. This unique device is guaranteed to be stable without a minimum load current requirement and stable with any type of capacitor as small as 1.0 mF. The NCP3337 also comes equipped with sense and noise reduction pins to increase the overall utility of the device. The NCP3337 offers reverse bias protection. DFN10 MN SUFFIX CASE 485C MARKING DIAGRAM Features • • • • • • • • • • • • • • High Accuracy Over Line and Load (±0.9% at 25°C) Ultra−Low Dropout Voltage at Full Load (260 mV typ) No Minimum Output Current Required for Stability Low Noise (33 mVrms w/10 nF Cnr and 52 mVrms w/out Cnr) Low Shutdown Current (< 1 mA) Reverse Bias Protected 2.9 V to 12 V Supply Range Thermal Shutdown Protection Current Limitation Requires Only 1.0 mF Output Capacitance for Stability Stable with Any Type of Capacitor (including MLCC) Available in 1.8 V, 2.5 V, 3.3 V, 5.0 V and Adjustable Output Voltages Power Good Output These are Pb−Free Devices 1 P3337 xxx ALYWG G Pin 1, 2. Vout 3. Sense / ADJ 4. GND 5. PWRG 6. NC 7. NR 8. SD 9, 10. Vin EP, GND xxx = Specific Device Marking A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 15 of this data sheet. Applications • • • • • • • • PCMCIA Card Cellular Phones Camcorders and Cameras Networking Systems, DSL/Cable Modems Cable Set−Top Box MP3/CD Players DSP Supply Displays and Monitors © Semiconductor Components Industries, LLC, 2011 September, 2020 − Rev. 2 1 Publication Order Number: NCP3337/D NCP3337 ON 7 6 OFF 8 9 10 Vin Cnr (Optional) NR NC SD SENSE IN OUT IN OUT + Cin 1.0 mF 3 2 Cout 1.0 mF GND R1 PWRG EP 100k 5 EP Vout 1 4 + PWRG Figure 1. Typical Fixed Version Application Schematic ON 7 6 OFF 8 9 10 Vin Cnr (Optional) NR NC SD ADJ IN OUT IN OUT + Cin 1.0 mF R1 PWRG EP 100k 5 EP GND 4 R2 3 2 R3 1 Vout Cout 1.0 mF + PWRG Figure 2. Typical Adjustable Version Application Schematic www.onsemi.com 2 NCP3337 Comp. PWRG Vin SD Enable Block Voltage Reference Current and Thermal Protection Circuit NR Error Amplifier Series Pass Element with Reverse Bias Protection Vout ADJ NCP3337 Adjustable GND Figure 3. Block Diagram, Adjustable Output Version Comp. PWRG Vin SD Enable Block Voltage Reference Current and Thermal Protection Circuit NR Error Amplifier Series Pass Element with Reverse Bias Protection Vout SENSE NCP3337 Fix GND Figure 4. Block Diagram, Fixed Output Version www.onsemi.com 3 NCP3337 PIN FUNCTION DESCRIPTION Pin No. Pin Name 1, 2 Vout Description 3 SENSE/ADJ 4 GND 5 PWRG 6 NC Not Connected 7 NR Noise Reduction Pin. This is an optional pin used to further reduce noise. 8 SD Shutdown pin. When not in use, this pin should be connected to the input pin. 9, 10 Vin Power Supply Input Voltage EPAD EPAD Regulated output voltage. Bypass to ground with Cout w 1.0 mF For output voltage sensing, connect to Pins 1 and 2.at Fixed output Voltage version Adjustable pin at Adjustable output version Power Supply Ground Power Good Exposed thermal pad should be connected to ground. MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage Vin −0.3 to +16 V Output Voltage Vout −0.3 to Vin +0.3 or 10 V* V PWRG Pin Voltage VPWRG −0.3 to +16 V Shutdown Pin Voltage Vsh −0.3 to +16 V Junction Temperature Range TJ −40 to +150 °C Storage Temperature Range Tstg −50 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) JESD 22−A114−B Machine Model (MM) JESD 22−A115−A *Which ever is less. Reverse bias protection feature valid only if (Vout − Vin) ≤ 7 V. THERMAL CHARACTERISTICS Test Conditions (Typical Value) Min Pad Board (Note 1) 1, Pad Board (Note 1) Unit Junction−to−Air, qJA 215 66 °C/W Junction−to−Pin, J−L4 58 18 °C/W Characteristic 1. As mounted on a 35 x 35 x 1.5 mm FR4 Substrate, with a single layer of a specified copper area of 2 oz (0.07 mm thick) copper traces and heat spreading area. JEDEC 51 specifications for a low and high conductivity test board recommend a 2 oz copper thickness. Test conditions are under natural convection or zero air flow. www.onsemi.com 4 NCP3337 ELECTRICAL CHARACTERISTICS − 5 V (Vout = 5.0 V typical, Vin = 5.4 V, TA = −40°C to +85°C, unless otherwise noted, Note 2) Characteristic Symbol Min Typ Max Unit Output Voltage (Accuracy) Vin = 5.4 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 25°C Vout −0.90% 4.955 5 0.90% 5.045 V Output Voltage (Accuracy) Vin = 5.4 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C Vout −1.40% 4.930 5 1.40% 5.070 V Output Voltage (Accuracy) Vin = 5.4 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C Vout −1.50% 4.925 5 1.50% 5.075 V Line Regulation Vin = 5.4 V to 12 V, Iload = 0.1 mA LineReg 0.04 mV/V Load Regulation Vin = 5.4 V, Iload = 0.1 mA to 500 mA LoadReg 0.04 mV/mA Dropout Voltage (See Application Note) Iload = 500 mA Iload = 300 mA Iload = 50 mA Iload = 0.1 mA VDO Peak Output Current (See Figure 14) Ipk Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C Isc Thermal Shutdown / Hysteresis TJ Ground Current In Regulation Iload = 500 mA (Note 4) Iload = 300 mA (Note 4) Iload = 50 mA Iload = 0.1 mA In Dropout Vin = 3.2 V, Iload = 0.1 mA In Shutdown VSD = 0 V IGND 340 230 110 10 500 700 IGNDsh Output Noise Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF 830 mA 930 mA 160/10 9 4.6 0.8 − Vnoise mV °C 14 7.5 2.5 220 mA 500 mA 1 mA mA mVrms 93 58 Power Good Voltage Low Threshold Hysteresis High Threshold Velft Power Good Pin Voltage Saturation (Ief = 1.0 mA) Vefdo 200 mV Power Good Pin Leakage Iefleak 1 mA tef 50 ms Power Good Blanking Time (Note 3) 93 95 2 97 % of Vout 99 Shutdown Threshold Voltage ON Threshold Voltage OFF VSD V SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin ISD 0.07 1 mA Output Current In Shutdown Mode, Vout = 0 V IOSD 0.07 1 mA Reverse Bias Protection, Current Flowing from the Output Pin to GND (Vin = 0 V, Vout_forced = 5 V) IOUTR 10 2 0.4 mA 2. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3. Can be disabled per customer request. 4. TA must be greater than 0°C. www.onsemi.com 5 NCP3337 ELECTRICAL CHARACTERISTICS − 3.3 V (Vout = 3.3 V typical, Vin = 3.7 V, TA = −40°C to +85°C, unless otherwise noted, Note 5) Characteristic Symbol Min Typ Max Unit Output Voltage (Accuracy) Vin = 3.7 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 25°C Vout −0.90% 3.270 3.3 0.90% 3.330 V Output Voltage (Accuracy) Vin = 3.7 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C Vout −1.40% 3.254 3.3 1.40% 3.346 V Output Voltage (Accuracy) Vin = 3.7 V to 7.3 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C Vout −1.50% 3.250 3.3 1.50% 3.350 V Line Regulation Vin = 3.7 V to 12 V, Iload = 0.1 mA LineReg 0.04 mV/V Load Regulation Vin = 3.7 V, Iload = 0.1 mA to 500 mA LoadReg 0.04 mV/mA Dropout Voltage (See Application Note) Iload = 500 mA Iload = 300 mA Iload = 50 mA Iload = 0.1 mA VDO Peak Output Current (See Figure 14) Ipk Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C Isc Thermal Shutdown / Hysteresis TJ Ground Current In Regulation Iload = 500 mA (Note 7) Iload = 300 mA Iload = 50 mA Iload = 0.1 mA In Dropout Vin = 3.7 V, Iload = 0.1 mA In Shutdown VSD = 0 V IGND 500 700 IGNDsh Vnoise Power Good Voltage Low Threshold Hysteresis High Threshold Velft Power Good Pin Voltage Saturation (Ief = 1.0 mA) Vefdo Power Good Pin Leakage Power Good Blanking Time (Note 6) 800 mA 900 mA 160/10 9 4.6 0.8 − Output Noise Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF mV 340 230 110 10 °C 14 7.5 2.5 220 mA 500 mA 1 mA mVrms 69 46 93 95 2 97 mA % of Vout 99 200 mV Iefleak 1 mA tef 50 ms Shutdown Threshold Voltage ON Threshold Voltage OFF VSD V SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin ISD 0.07 1 mA Output Current In Shutdown Mode, Vout = 0 V IOSD 0.07 1 mA Reverse Bias Protection, Current Flowing from the Output Pin to GND (Vin = 0 V, Vout_forced = 3.3 V) IOUTR 10 2 0.4 mA 5. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. Can be disabled per customer request. 7. TA must be greater than 0°C. www.onsemi.com 6 NCP3337 ELECTRICAL CHARACTERISTICS − 2.5 V (Vout = 2.5 V typical, Vin = 2.9 V, TA = −40°C to +85°C, unless otherwise noted, Note 8) Characteristic Symbol Min Typ Max Unit Output Voltage (Accuracy) Vin = 2.9 V to 6.5 V, Iload = 0.1 mA to 500 mA, TA = 25°C Vout −0.9% 2.477 2.5 +0.9% 2.523 V Output Voltage (Accuracy) Vin = 2.9 V to 6.5 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C Vout −1.4% 2.465 2.5 +1.4% 2.535 V Output Voltage (Accuracy) Vin = 2.9 V to 6.5 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C Vout −1.5% 2.462 2.5 +1.5% 2.538 V Minimum Input Voltage Vinmin 2.9 V Line Regulation Vin = 2.9 V to 12 V, Iload = 0.1 mA LineReg 0.04 mV/V Load Regulation Vin = 2.9 V, Iload = 0.1 mA to 500 mA LoadReg 0.04 mV/mA Dropout Voltage (See Figure 10) Iload = 500 mA (Note 9) Iload = 300 mA (Note 9) Iload = 50 mA Iload = 0.1mA VDO Peak Output Current (See Figures 14 and 18) Ipk Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C Isc Thermal Shutdown / Hysteresis TJ Ground Current In Regulation Iload = 500 mA (Note 9) Iload = 300 mA (Note 9) Iload = 50 mA Iload = 0.1 mA mV 340 230 110 10 500 700 800 mA 900 mA 160/10 °C IGND 9.0 4.6 0.8 − In Dropout Vin = 2.4 V, Iload = 0.1 mA In Shutdown VSD = 0 V IGNDsh Output Noise Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF Vnoise 14 7.5 2.5 220 mA 500 mA 1.0 mA 56 35 mA mVrms mVrms Power Good Voltage Low Threshold Hysteresis High Threshold Velft Power Good Pin Voltage Saturation (Ief − 1.0 mA) Vefdo 200 mV Power Good Pin Leakage Iefleak 1.0 mA tef 50 ms Power Good Blanking Time (Note 10) Shutdown Threshold Voltage ON Threshold Voltage OFF VSD SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin ISD Output Current In Shutdown Mode, Vout = 0 V Reverse Bias Protection, Current Flowing from the Output Pin to GND (Vin = 0 V, Vout_forced = 2.5 V) 93 95 2 97 2.0 % of Vout 99 0.4 V V 0.07 1.0 mA IOSD 0.07 1.0 mA IOUTR 10 mA 8. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. TA must be greater than 0°C. 10. Can be disabled per customer request. www.onsemi.com 7 NCP3337 ELECTRICAL CHARACTERISTICS − 1.8 V (Vout = 1.8 V typical, Vin = 2.9 V, TA = −40°C to +85°C, unless otherwise noted, Note 11) Characteristic Symbol Min Typ Max Unit Output Voltage (Accuracy) Vin = 2.9 V to 5.8 V, Iload = 0.1 mA to 500 mA, TA = 25°C Vout −0.9% 1.783 1.8 +0.9% 1.817 V Output Voltage (Accuracy) Vin = 2.9 V to 5.8 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C Vout −1.4% 1.774 1.8 +1.4% 1.826 V Output Voltage (Accuracy) Vin = 2.9 V to 5.8 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C Vout −1.5% 1.773 1.8 +1.5% 1.827 V Minimum Input Voltage Vinmin 2.9 V Line Regulation Vin = 2.9 V to 12 V, Iload = 0.1 mA LineReg 0.04 mV/V Load Regulation Vin = 2.9 V, Iload = 0.1 mA to 500 mA LoadReg 0.04 mV/mA Dropout Voltage (See Figure 9) Iload = 500 mA (Notes 12, 13) Iload = 300 mA (Notes 12, 13) Iload = 50 mA (Notes 12, 13) VDO Peak Output Current (See Figures 14 and 17) Ipk Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C Isc Thermal Shutdown / Hysteresis TJ Ground Current In Regulation Iload = 500 mA (Note 12) Iload = 300 mA (Note 12) Iload = 50 mA Iload = 0.1 mA IGND 500 700 In Dropout Vin = 2.2 V, Iload = 0.1 mA IGNDsh Output Noise Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF 830 mA 900 mA 160/10 9.0 4.6 0.8 − In Shutdown VSD = 0 V mV 620 230 95 Vnoise °C 14 7.5 2.5 220 mA 500 mA 1.0 mA 52 33 mA mVrms mVrms Power Good Voltage Low Threshold Hysteresis High Threshold Velft Power Good Pin Voltage Saturation (Ief − 1.0 mA) Vefdo 200 mV Power Good Pin Leakage Iefleak 1.0 mA tef 50 ms Power Good Blanking Time (Note 10) Shutdown Threshold Voltage ON Threshold Voltage OFF VSD SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin 93 95 2 97 2.0 % of Vout 99 0.4 V V ISD 0.07 1.0 mA Output Current In Shutdown Mode, Vout = 0 V IOSD 0.07 1.0 mA Reverse Bias Protection, Current Flowing from the Output Pin to GND (Vin = 0 V, Vout_forced = 1.8 V) IOUTR 10 mA 11. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 12. TA must be greater than 0°C. 13. Maximum dropout voltage is limited by minimum input voltage Vin = 2.9 V recommended for guaranteed operation. www.onsemi.com 8 NCP3337 ELECTRICAL CHARACTERISTICS − ADJUSTABLE (Vout = 1.25 V typical, Vin = 2.9 V, TA = −40°C to +85°C, unless otherwise noted, Note 14) Characteristic Symbol Min Typ Max Unit Reference Voltage (Accuracy) Vin = 2.9 V to Vout +4.0 V, Iload = 0.1 mA to 500 mA, TA = 25°C Vref −0.90% 1.239 1.25 0.90% 1.261 V Reference Voltage (Accuracy) Vin = 2.9 V to Vout + 4.0 V, Iload = 0.1 mA to 500 mA, TA = 0°C to +85°C Vref −1.40% 1.233 1.25 1.40% 1.268 V Reference Voltage (Accuracy) (Note 18) Vin = 2.9 V to Vout + 4.0 V, Iload = 0.1 mA to 500 mA, TA = −40°C to +125°C Vref −1.50% 1.231 1.25 1.50% 1.269 V Line Regulation Vin = 2.9 V to 12 V, Iload = 0.1 mA LineReg 0.04 mV/V Load Regulation Vin = 2.9 V to 12 V, Iload = 0.1 mA to 500 mA LoadReg 0.04 mV/mA Dropout Voltage (See Application Note) (Vout = 2.5 V − 10 V) Iload = 500 mA (Note 16) Iload = 300 mA Iload = 50 mA Iload = 0.1 mA VDO Peak Output Current (See Figure 14) Ipk Short Output Current (See Figure 14) Vin < 7 V, TA = 25°C Vout v 3.3 V Vout > 3.3 V Isc Thermal Shutdown / Hysteresis TJ Ground Current In Regulation Iload = 500 mA (Note 16) Iload = 300 mA (Note 16) Iload = 50 mA Iload = 0.1 mA In Dropout Vin = Vout + 0.1 V or 2.9 V (whichever is higher), Iload = 0.1 mA In Shutdown VSD = 0 V Output Noise Cnr = 0 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF Cnr = 10 nF, Iload = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF 500 700 830 900 930 160/ 10 mA mA °C IGND 9 4.6 0.8 IGNDsh Vnoise Power Good Voltage Low Threshold Hysteresis High Threshold Velft Power Good Pin Voltage Saturation (Ief = 1.0 mA) Vefdo Power Good Pin Leakage Power Good Pin Blanking Time (Note 15) mV 340 230 110 10 14 7.5 2.5 220 mA 500 mA 1 mA mVrms 69 46 93 95 2 97 mA % of Vout 99 200 mV Iefleak 1 mA tef 50 ms Shutdown Threshold Voltage ON Threshold Voltage OFF VSD SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin Vin v 5.4 V Vin > 5.4 V ISD V 2 0.4 0.07 1 5 1 Output Current In Shutdown Mode, Vout = 0 V IOSD 0.07 Reverse Bias Protection, Current Flowing from the Output Pin to GND (Vin = 0 V, Vout_forced = Vout (nom) v 7 V) (Note 17) IOUTR 1 mA mA mA 14. Performance guaranteed over the operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 15. Can be disabled per customer request. 16. TA must be greater than 0°C. 17. Reverse bias protection feature valid only if Vout − Vin ≤ 7 V. 18. For output current capability for TA < 0°C, please refer to Figures 17 and 18. www.onsemi.com 9 NCP3337 2.52 VIN = 2.9 V IOUT = 0 1.84 1.83 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) 1.85 1.82 1.81 1.8 VOUT = 1.8 V 1.79 1.78 1.77 2.51 2.505 2.5 1.75 −40 2.49 2.485 2.48 −20 0 20 40 60 80 100 120 2.47 −40 140 0 20 40 60 80 100 120 140 TA, TEMPERATURE (°C) Figure 5. Output Voltage vs. Temperature 1.8 V Version Figure 6. Output Voltage vs. Temperature 2.5 V Version 5.1 3.310 VOUT, OUTPUT VOLTAGE (V) VIN = 3.7 V IOUT = 0 3.315 VOUT, OUTPUT VOLTAGE (V) −20 TA, TEMPERATURE (°C) 3.320 3.305 3.300 VOUT = 3.3 V 3.295 3.290 3.285 3.280 3.275 3.270 −40 −20 0 20 40 60 80 100 120 VIN = 5.4 V IOUT = 0 5.05 5 VOUT = 5.0 V 4.95 4.9 4.85 −40 140 −20 0 20 40 60 80 100 120 140 TA, TEMPERATURE (°C) TA, TEMPERATURE (°C) Figure 7. Output Voltage vs. Temperature 3.3 V Version Figure 8. Output Voltage vs. Temperature 5.0 V Version 900 400 800 VDO, DROPOUT VOLTAGE (mV) VDO, DROPOUT VOLTAGE (mV) VOUT = 2.5 V 2.495 2.475 1.76 700 600 500 mA 500 400 300 mA 300 200 50 mA 100 0 VIN = 2.9 V IOUT = 0 2.515 0 20 40 60 80 100 120 350 300 300 mA 200 150 50 mA 100 50 0 140 500 mA 250 0 20 40 60 80 100 120 140 TA, TEMPERATURE (°C) TA, TEMPERATURE (°C) Figure 9. Dropout Voltage vs. Temperature 1.8 V Version Figure 10. Dropout Voltage vs. Temperature 2.5 V Version www.onsemi.com 10 NCP3337 350 VDO, DROPOUT VOLTAGE (mV) VDO, DROPOUT VOLTAGE (mV) 400 350 300 500 mA 250 300 mA 200 150 50 mA 100 50 0 0 20 40 60 80 100 120 300 500 mA 250 300 mA 200 150 50 mA 100 50 0 140 0 20 40 60 80 100 120 140 TA, TEMPERATURE (°C) TA, TEMPERATURE (°C) Figure 11. Dropout Voltage vs. Temperature 3.3 V Version Figure 12. Dropout Voltage vs. Temperature 5.0 V Version 1000 900 700 Ipk 600 Vout (V) Ipk (mA), Isc (mA) 0.97 Vout Isc 800 500 400 300 200 VIN = 2.9 V VOUT = 1.8 V 100 0 0 20 40 60 80 100 120 Ipk Isc Iout (mA) (For specific values of Ipk and Isc, please refer to Figure 13) 140 TA, TEMPERATURE (°C) Figure 13. Peak and Short Current vs. Temperature Figure 14. Output Voltage vs. Output Current 12 VIN = 2.9 V VOUT = 1.8 V 10 IGND, GROUND CURRENT (mA) IGND, GROUND CURRENT (mA) 12 500 mA 8 6 300 mA 4 2 0 0 50 mA 20 40 60 80 100 TA, TEMPERATURE (°C) 120 8 6 4 2 0 140 VIN = 2.9 V VOUT = 1.8 V TA = 25°C 10 0 0.1 0.2 0.3 0.4 IOUT, OUTPUT CURRENT (A) Figure 15. Ground Current vs. Temperature Figure 16. Ground Current vs. Output Current www.onsemi.com 11 0.5 NCP3337 0.8 25°C 0.7 0°C IOUT, OUTPUT CURRENT (A) IOUT, OUTPUT CURRENT (A) 0.8 0.6 0.5 −20°C −40°C 0.4 0.3 0.2 VIN = 2.9 V VOUT = 1.8 V 0.1 0.0 3.6 3.4 3.2 3 2.8 2.6 2.4 0.3 0.2 0.1 3.4 3.3 3.2 Iout = 50 mA 70 60 Iout = 0.5 A 50 40 Iout = 0.25 A 30 VIN = 2.9 V +0.5 VPP Modulation VOUT = 1.25 V TA = 25°C 100 2.9 2.8 1k 10k 100k F, FREQUENCY (Hz) 70 VIN = 3.4 V +0.5 VPP Modulation VOUT = 2.5 V TA = 25°C 60 Iout = 50 mA 80 40 20 NOISE DENSITY (nV/√HZ) 500 Cnr = 0 nF 300 Cnr = 10 nF VIN = 2.9 V VOUT = 1.25 V TA = 25°C 100 1k 10k 100k 1k 10k 100k F, FREQUENCY (Hz) 1M Figure 21. PSRR vs. Frequency 2.5 V Version 500 200 Iout = 0.25 A 10 600 400 Iout = 0.5 A 30 0 100 1M 2.7 50 600 0 10 3 Figure 18. Output Current Capability for the 2.5 V Version 80 100 3.1 Figure 17. Output Current Capability for the 1.8 V Version Figure 20. PSRR vs. Frequency Adjustable Version NOISE DENSITY (nV/√HZ) VIN = 2.9 V VOUT = 2.5 V VIN, INPUT VOLTAGE (V) 90 10 −40°C −20°C 0.4 VIN, INPUT VOLTAGE (V) PSRR, RIPPLE REJECTION (dB) PSRR, RIPPLE REJECTION (dB) 0.5 90 20 0°C 0.6 0.0 3.5 2.2 100 0 25°C 0.7 400 Cnr = 0 nF 300 200 100 0 10 1M Cnr = 10 nF VIN = 2.9 V VOUT = 2.5 V TA = 25°C 100 1k 10k 100k 1M F, FREQUENCY (Hz) F, FREQUENCY (Hz) Figure 22. Output Noise Density Adjustable Version Figure 23. Output Noise Density 2.5 V Version www.onsemi.com 12 NCP3337 Figure 24. Power Good Activation Figure 25. Power Good Inactivation 300 15 250 10 qJA (°C/W) MAXIMUM ESR (W) Vin at Data Sheet Test Conditions, 25°C, 1 mF Capacitance Unstable Area 5.0 200 150 1 oz CF 100 2 oz CF 50 Stable Area 0 0 100 200 300 400 0 500 0 100 200 300 400 500 600 700 OUTPUT CURRENT (mA) COPPER HEAT SPREADING AREA (mm2) Figure 26. Stability with ESR vs. Output Current Figure 27. DFN10 Self−Heating Thermal Characterstics as a Function of Copper Area on the PCB NOTE: Typical characteristics were measured with the same conditions as electrical characteristics. www.onsemi.com 13 NCP3337 APPLICATIONS INFORMATION Reverse Bias Protection temperature is exceeded. This feature provides protection from a catastrophic device failure due to accidental overheating. This protection feature is not intended to be used as a substitute to heat sinking. The maximum power that can be dissipated, can be calculated with the equation below: Reverse bias is a condition caused when the input voltage goes to zero, but the output voltage is kept high either by a large output capacitor or another source in the application which feeds the output pin. Normally in a bipolar LDO all the current will flow from the output pin to input pin through the PN junction with limited current capability and with the potential to destroy the IC. Due to an improved architecture, the NCP3337 can withstand up to 7.0 V on the output pin with virtually no current flowing from output pin to input pin, and only negligible amount of current (tens of mA) flowing from the output pin to ground for infinite duration. PD + TJ(max) * TA RqJA (eq. 1) For improved thermal performance, contact the factory for the DFN package option. The DFN package includes an exposed metal pad that is specifically designed to reduce the junction to air thermal resistance, RqJA. Adjustable Operation The output voltage can be set by using a resistor divider as shown in Figure 2 with a range of 1.25 to 10 V. The appropriate resistor divider can be found by solving the equation below. The recommended current through the resistor divider is from 10 mA to 100 mA. This can be accomplished by selecting resistors in the kW range. As result, the Iadj * R2 becomes negligible in the equation and can be ignored. Input Capacitor An input capacitor of at least 1.0 mF, any type, is recommended to improve the transient response of the regulator and/or if the regulator is located more than a few inches from the power source. It will also reduce the circuit’s sensitivity to the input line impedance at high frequencies. The capacitor should be mounted with the shortest possible track length directly across the regular’s input terminals. V out + 1.25 * (1 ) R3ńR2) ) I adj * R2 Output Capacitor (eq. 2) Power Good Operation The NCP3337 remains stable with any type of capacitor as long as it fulfills its 1.0 mF requirement. There are no constraints on the minimum ESR and it will remain stable up to an ESR of 5.0 W. Larger capacitor values will improve the noise rejection and load transient response. The Power Good pin on the NCP3337 will produce a logic Low when it drops below the nominal output voltage. Refer to the electrical characteristics for the threshold values at which point the Power Good goes Low. When the NCP3337 is above the nominal output voltage, the Power Good will remain at logic High. The external pullup resistor needs to be connected between Vin and the Power Good pin. A resistor of approximately 100 kW is recommended to minimize the current consumption. No pullup resistor is required if the Power Good output is not being used. The Power Good does not function during thermal shutdown and when the part is disabled. Noise Reduction Pin Output noise can be greatly reduced by connecting a 10 nF capacitor (Cnr) between the noise reduction pin and ground (see Figure 1). In applications where very low noise is not required, the noise reduction pin can be left unconnected. Dropout Voltage The voltage dropout is measured at 97% of the nominal output voltage. Thermal Considerations Internal thermal limiting circuitry is provided to protect the integrated circuit in the event that the maximum junction www.onsemi.com 14 NCP3337 ORDERING INFORMATION Nominal Output Voltage Marking Package Shipping† NCP3337MN180R2G 1.8 V P3337 180 DFN10 (Pb−Free) 3000 / Tape & Reel NCP3337MN250R2G 2.5 V P3337 250 DFN10 (Pb−Free) 3000 / Tape & Reel NCP3337MN330R2G 3.3 V P3337 330 DFN10 (Pb−Free) 3000 / Tape & Reel NCP3337MN500R2G 5.0 V P3337 500 DFN10 (Pb−Free) 3000 / Tape & Reel NCP3337MNADJR2G Adj P3337 ADJ DFN10 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *Please contact factory for other voltage options. www.onsemi.com 15 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN10, 3x3, 0.5P CASE 485C ISSUE F SCALE 2:1 DATE 16 DEC 2021 GENERIC MARKING DIAGRAM* XXXXX XXXXX ALYWG G XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot *This information is generic. Please refer to Y = Year device data sheet for actual part marking. W = Work Week Pb−Free indicator, “G” or microdot “G”, may G = Pb−Free Package or may not be present. Some products may (Note: Microdot may be in either location) not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON03161D Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. DFN10, 3X3 MM, 0.5 MM PITCH PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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