NCP398
USB Type-C VCONN
Overvoltage Protection IC
The NCP398 is an overvoltage protection device. It protects
VCONN against overvoltages in applications where VCONN is
directly derived from the VBUS supply.
At power up, the integrated power MOSFET is automatically
controlled to reduce inrush current. The IC continuously monitors
undervoltage, overvoltage and thermal events. In case of
overvoltage, a very high speed comparator opens the power
MOSFET instantaneously.
The part is enabled through the EN pin. A high level on this pin
allows forcing off the internal switch and drastically decreases the
current consumption of the NCP398 core.
Features
•
•
•
•
•
•
•
•
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MARKING
DIAGRAMS
AV MG
G
UDFN6
CASE 517AB
AV
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
Over−voltage Protection up to + 28 V
On−chip Low Rdson NMOS Transistors: Typical 200 mW
Over−voltage Lockout (OVLO)
Shutdown EN Input
Output Discharge Path
WLCSP4 Package 0.84 x 0.84 mm, 0.4p
UDFN6 Package 2 x 2 mm, 0.65p
These Parts are ROHS Devices
AA
AYW
WLCSP4
CASE 567MN
AA
A
Y
W
Typical Applications
• Type−C USB
• Smartphones
• Tablets
= Specific Device Code
= Assembly Location
= Year
= Work Week
PIN CONNECTIONS
IN 1
6 OUT
IN 2
5 OUT
GND 3
4 EN
UDFN
OUT
IN
EN
GND
WLCSP
(Top Views)
Figure 1. Typical Application Circuit
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 1
1
Publication Order Number:
NCP398/D
NCP398
Figure 2. Simplified Block Diagram, WLCSP and UDFN Packages
Table 1. CSP PINOUT DESCRIPTION
Pin
Pin Name
Type
A1
OUT
OUTPUT
Description
B1
EN
I/O
A2
IN
POWER
Input voltage pin.
The IN pin must be connected to the input power supply (VBUS).
B2
GND
POWER
Ground.
Must be connected to the system GND plane.
Output voltage pin.
The OUT pin must be connected to the circuitry that is to be protected (VCONN rail).
Enable pin bar.
The device enters in shutdown mode when this pin is tied high in which case the output is disconnected
from the input.
Table 2. DFN PINOUT DESCRIPTION
Pin
Pin Name
Type
Description
1,2
IN
POWER
Input voltage pins.
The two IN pins must be hardwired together and are connected to the input power supply (VBUS).
3
GND
POWER
Ground.
Must be connected to the system GND plane.
5,6
OUT
POWER
Output voltage pins.
The two OUT pins must be hardwired together and are connected to the circuitry that is to be protected
(VCONN rail).
4
EN
I/O
Enable pin bar.
The device enters in shutdown mode when this pin is tied high in which case the output is disconnected
from the input.
7
PAD
POWER
DFN package back side pad. Must be connected to ground plane for thermal dissipation optimization.
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NCP398
Table 3. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Minimum Voltage (All to GND)
VMIN
−0.3
V
Maximum Voltage (Ins to GND)
VINMAX
29
V
Maximum Voltage (All others to GND)
VMAX
7
V
Maximum DC current
IMAX
0.8
A
RqJA
170
145
°C/W
TA
−40 to +85
°C
TSTG
−65 to +150
°C
TJ
+125
°C
Human Body Model (HBM) ESD Rating are (Note 2)
ESD HBM
2
kV
Charged Device Model (CDM) ESD Rating are (Note 2)
ESD CDM
1
kV
ILU
100
mA
MSL
Level 1
Thermal Resistance, Junction to Air
WLCSP (Note 1)
DFN (Note 1)
Operating Ambient Temperature Range
Storage Temperature Range
Junction Operating temperature
Latch Up Current (Note 3)
Moisture Sensitivity
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The RqJA is highly dependent on the PCB heat sink area. As example UDFN6 RqJA is 220°C/W with 50 mm2 (copper 35 mm, 1 oz) and 145°C/W
with 200 mm2 (copper 35 mm, 2 oz).
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114, Charged Device Model (CDM) per
JEDEC standard: JESD22−C101 Class IV.
3. Latch Up Current per JEDEC standard: JESD78 class II.
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NCP398
Table 4. ELECTRICAL CHARACTERISTICS
Min / Max limits values (−40°C < TA < +85°C) and VIN = +5 V (Unless otherwise noted). Typical values are TA = +25°C.
Characteristics
Input Voltage Range
Under Voltage Lockout
Symbols
Conditions
VIN
Min
Typ
Max
Unit
−
−
28
V
UVLO
Vin rising
2.4
−
2.8
V
UVLOHYST
Vin falling
−
50
−
mV
Over voltage Lockout Threshold
OVLO
(Note 4)
Vin rising
5.50
5.65
5.80
V
Over voltage Lockout Threshold
hysteresis
OVLOHYST
Vin falling
−
115
−
mV
RDSON
Vin = 5 V, EN = low, 25°C, WLCSP
−
190
220
mW
–40°C < TJ < 85°C, WLCSP
−
230
260
Vin = 5 V, EN = low, 25°C, UDFN
−
230
260
–40°C < TJ < 85°C, UDFN
−
270
300
No load. EN = low
−
40
60
mA
Under Voltage Lockout Hysteresis
Vin versus Vout Resistance
Supply Quiescent Current
IDD
OFF current
IOFF
EN = high
−
−
1.5
mA
Standby current
ISTB
Vin = 2.4 V
−
−
2.5
mA
Output Discharge path
RPD
From EN = low to high or
Vin < UVLO – hysteresis to Vout = VPD
8
10
12
kW
Output Discharge path level
VPD
Vout falling
−
0.63
−
V
1.2
−
−
V
EN
EN Voltage High
VIH
EN Voltage Low
VIL
−
−
0.4
V
EN Input Leakage Current
IEN
0 < VEN < 5.5 V
−1
0
+1
mA
Ton Time
TON
Vin valid, From EN high to low, 90% Vout
−
0.3
1
ms
Disable Time
TOFF
From EN low to high, to 90% Vout.
RLOAD 100 W
−
10
−
ms
TOVLO
Vin exceeding VOVLO at 2 V/ms to Vout
starts decreasing. RLOAD 100 W
−
100
−
ns
TSD
−
150
−
°C
TSD rearm
−
125
−
°C
TIMINGS
OVLO Turn Off Time
TSD
Thermal shutdown
Thermal shutdown rearming
4. Please contact your ON representative for additional OVLO thresholds.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
NCP398
Operation
UVLO) of the device. When Vin is below the undervoltage
comparator (UVLO) or EN is tied high, NCP398 will be in
this state.
Phase 2 corresponds to the defined time for the gate
driver soft start. Referring to the electrical parameter, this
phase is aligned to Ton time.
Phase 3 is the normal operation, with Vin valid, the part
enabled and there is no fault.
The behavior during an overvoltage condition is detailed
in the phase number 4.
The NCP398 device provides overvoltage protection
when a wrong input supply is connected or voltage ringing
appears on the input line. The internal NMOS Fet is soft
start controlled to limit inrush current into the load
(capacitors, IC wake up).
The device integrates an enable control pin, undervoltage
and overvoltage comparators, and output discharge path to
eliminate residual voltage after the turn off.
Timings Chronogram and States Description
The phase 1 sections described below are respectively
the OFF state (EN high) and the standby state (VIN <
Figure 3. Timings Diagram
Enable Bar Pin (EN)
Auto Discharge − RPD
The part is enabled through the EN pin. In some diagrams
and figures, ENB refers to EN. A high level on this pin allows
forcing off the internal switch and drastically decreases the
current consumption of the NCP398 core. To exit the OFF
state, the EN pin must be tied low.
When disabling the NCP398 the output gets
automatically discharged by means of the internal pull
down resistor Rpd. Once reaching the Vpd level the
discharge path is disabled. The auto−discharge is also
engaged when Vin drops below the UVLO threshold. The
auto−discharge ensures a proper power cycling of
peripherals connected to the output of the NCP398.
Under−voltage Lockout (UVLO)
To ensure proper operation under any conditions, the
device integrates an under−voltage lock out (UVLO)
comparator. This block has a built−in hysteresis to provide
noise immunity to transient conditions.
Thermal Shutdown Protection
In case of internal overheating, the integrated thermal
shutdown (TSD) protection will open the internal NMOS
FET in order to instantaneously decrease the device
temperature.
Embedded hysteresis allows reengaging the NMOS FET
when the junction temperature decreases.
This OFF−ON cycle is repeated until the fault event
disappears.
Over−voltage Lockout (OVLO)
To protect connected systems on VOUT pin from
over−voltage, a second comparator, over−voltage lock out
(OVLO), is embedded. During over−voltage condition, the
output remains disabled until the input voltage drops below
the OVLO – comparator hysteresis.
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NCP398
TYPICAL CHARACTERISTICS
400
400
Temp = 125°C
350
105°C
85°C
50°C
350
VIN = 2.8 V
300
RDSON (mW)
RDSON (mW)
300
250
200
−40°C
150
100
−25°C
0°C
250
VIN = 5.0 V
200
150
100
25°C
50
50
0
2.5
3.0
3.5
4.0
4.5
5.0
0
−40
5.5
−20
0
20
40
60
80
100
120
VIN (V)
TEMPERATURE (°C)
Figure 4. Ron vs. Vin, Overtemperature
Figure 5. Ron vs. Temperature, at Fixed Vin
Voltage
45
3
40
Temp = 85°C
35
Temp = 25°C
30
2
ISTB (mA)
ISTB (mA)
Temp = 85°C
Temp = 25°C
1
25
Temp = −40°C
20
15
10
5
Temp = −40°C
0
−5
0
0
1
2
3
4
5
0
6
5
10
15
20
25
VIN (V)
VIN (V)
Figure 6. Standby Current vs. Vin, Over
Temperature
Figure 7. Standby Current vs. Vin, Over
Temperature
120
120
100
100
30
Temp = 85°C
Temp = 25°C
80
Temp = 85°C
IDD (mA)
IDD (mA)
80
Temp = 125°C
60
40
60
Temp = −40°C
40
Temp = −40°C
20
20
Temp = 25°C
0
0
1
2
3
4
0
5
6
0
5
10
15
20
25
30
VIN (V)
VIN (V)
Figure 8. Quiescent Current vs. Vin, Over
Temperature
Figure 9. Quiescent Current vs. Vin, Over
Temperature
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35
NCP398
Figure 10. Soft Start Up On Load, Vin: yellow, Vout: blue, EN: pink, IOUT: green
Figure 11. Hot Plug On Load, Vin: yellow, Vout: blue, EN: pink, IOUT: green
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NCP398
Figure 12. Soft Start On Cout 10 mF, 500 mA, Vin: yellow, Vout: blue, EN: pink, IOUT: green
Figure 13. NCP398 Enable (ENB forced low) Vin: yellow, Vout: blue, EN: pink, IOUT: green
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NCP398
Figure 14. NCP398 Disable (ENB forced high) Vin: yellow, Vout: blue, EN: pink, IOUT: green
Figure 15. NCP398 Overvoltage Time Response, Vin: yellow, Vout: blue
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NCP398
Figure 16. NCP398 Pull Down Level (following disable) Vin: yellow, Vout: blue, EN: pink
Figure 17. NCP398 Pull Down Level (following UVLO) Vin: yellow, Vout: blue, EN: pink
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NCP398
ORDERING INFORMATION
Marking
Package
Shipping†
NCP398FCCT1G
AA
WLCSP4 0.84x0.84 mm
3000 Tape / Reel
NCP398MUTBG
AV
UDFN6 2x2 mm
3000 Tape / Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517AB
ISSUE C
DATE 10 APR 2013
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.25MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE
TERMINALS.
5. TIE BARS MAY BE VISIBLE IN THIS VIEW AND ARE CONNECTED TO
THE THERMAL PAD.
A B
D
NOTE 5
PIN ONE
REFERENCE
0.10 C
0.10 C
ÍÍ
ÍÍ
ÍÍ
E
END VIEW
TOP VIEW
ÉÉÉ
ÉÉÉ
ÇÇÇ
A3
DETAIL B
0.10 C
EXPOSED Cu
A
6X
0.08 C
A1
NOTE 4
C
SIDE VIEW
DETAIL A
D2
1
SEATING
PLANE
L
3
4
6X
L
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
b
e
BOTTOM VIEW
0.10
M
C A B
0.05
M
C
A1
GENERIC
MARKING DIAGRAM*
ALTERNATE
CONSTRUCTIONS
L1
6
A3
DETAIL B
L
E2
ÉÉ
ÉÉ
ÇÇ
MOLD CMPD
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.25
0.35
2.00 BSC
1.50
1.70
2.00 BSC
0.80
1.00
0.65 BSC
0.25
0.35
--0.15
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
XXMG
G
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
1.70
6X
0.47
2.30
0.95
1
0.65
PITCH
6X
0.40
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON22162D
UDFN6 2X2, 0.65P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP4, 0.84x0.84
CASE 567MN
ISSUE A
SCALE 4:1
A
E
PIN A1
REFERENCE
2X
0.05 C
2X
0.05 C
ÈÈ
ÈÈ
DATE 01 SEP 2016
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DATUM C, THE SEATING PLANE, IS DEFINED BY THE
SPHERICAL CROWNS OF THE CONTACT BALLS.
4. COPLANARITY APPLIES TO SPHERICAL CROWNS OF
CONTACT BALLS.
5. DIMENSION b IS MEASURED AT THE MAXIMUM CONTACT BALL DIAMETER PARALLEL TO DATUM C.
B
D
TOP VIEW
BACKSIDE
COATING
DETAIL A
A3
DIM
A
A1
A2
A3
b
D
E
e
A2
A2
0.10 C
A
0.05 C
NOTE 4
4X
A1
SIDE VIEW
SEATING
PLANE
NOTE 3
e
b
0.15 C A B
C
DETAIL A
GENERIC
MARKING DIAGRAM*
e
XXX
AYW
B
0.05 C
MILLIMETERS
MIN
MAX
−−−
0.60
0.18
0.22
0.34 REF
0.02 REF
0.24
0.30
0.84 BSC
0.84 BSC
0.40 BSC
A
NOTE 5
1
2
A
Y
W
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
A1
0.40
PITCH
4X
= Assembly Location
= Year
= Work Week
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.40
PITCH
0.24
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON05454G
WLCSP4, 0.84X0.84
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
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