NCP4328
Secondary Side CV/CC
Controller
The NCP4328 is a secondary side SMPS controller designed for use
in applications which requires constant current and/or constant current
regulation.
The NCP4328x consists of two OTA amplifiers for voltage and
current loop regulation with precise internal voltage references.
Outputs of OTAs are open drain type (OTAs sink current only).
The NCP4328B includes a LED driver pin implemented with an
open drain MOSFET driven by a 1 kHz square wave with a 12.5%
duty cycle working when VCC is above UVLO for indication purpose.
The NCP4328A is available in TSOP−5 package while the
NCP4328B is available in TSOP−6 package.
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MARKING
DIAGRAMS
5
5
1
TSOP−5
SN SUFFIX
CASE 483
Features
•
•
•
•
•
•
XXXAYWG
G
1
Operating Input Voltage Range: 2.5 V to 36.0 V
Supply current < 100 mA
±0.5% Reference Voltage Accuracy (TJ = 25°C)
Constant Voltage and Constant Current (A versions) Control Loop
Indication LED PWM Modulated Driver (NCP4328B)
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Offline Adapters for Notebooks, Game Stations and Printers
• LED Lightening
• High Power AC−DC Converters for TVs, Set−Top Boxes, Monitors
1
TSOP−6
SN SUFFIX
CASE 318G
XXXAYWG
G
1
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
etc.
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
July, 2015 − Rev. 2
1
Publication Order Number:
NCP4328/D
NCP4328
Sink only
VCC
VCC
management
GND
ISNS
OTA
VREFC
Current
Regulation
FBC
VSNS
OTA
Sink only
V REF
Voltage
Regulation
NCP4328A
VCC
Sink only
VCC
management
Power
RESET
ISNS
OTA
Current
Regulation
VREFC
GND
VREF
FBC
Sink only
Power
RESET
LED
SW
VSNS
OTA
Voltage
Regulation
VREF
1 kHz, 12% D.C.
Oscillator
NCP4328B
Figure 1. Simplified Block Diagrams NCP4328A and NCP4328B
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2
NCP4328
PIN FUNCTION DESCRIPTION
NCP4328A
TSOP−5
NCP4328B
TSOP−6
Pin Name
1
1
VCC
Supply voltage pin
2
2
GND
Ground
5
6
VSNS
Output voltage sensing pin, connected to output voltage divider
4
4
ISNS
Current sensing input for output current regulation, connect it to shunt resistor
in ground branch.
−
5
LED
PWM LED driver output. Connected to LED cathode with current define by
external serial resistance
3
3
FBC
Output of current sinking OTA amplifiers driving feedback optocoupler’s LED.
Connect here compensation networks as well.
Description
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
−0.3 to 40.0
V
FBC, LED Voltage
VFBC, VLED
−0.3 to VCC + 0.3
V
VSNS, ISNS Voltage
VSNS,VISNS
−0.3 to 10.0
V
LED Current
ILED
10
mA
Thermal Resistance − Junction−to−Air (Note 1)
RqJA
315
°C/W
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
250
V
Input Voltage
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. 50 mm2, 1.0 oz. Copper spreader.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JESD22−A114F
ESD Machine Model tested per JESD22−A115C
Latchup Current Maximum Rating tested per JEDEC standard: JESD78D.
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3
NCP4328
ELECTRICAL CHARACTERISTICS
−40°C ≤ TJ ≤ 125°C; VCC = 15 V; unless otherwise noted. Typical values are at TJ = +25°C.
Parameter
Test Conditions
Min
VCC rising
VCCUVLO
VCC falling
VCC UVLO Hysteresis
VCCUVLOHYS
Unit
36.0
V
3.5
3.7
2.3
2.5
2.7
0.8
1.0
ICC
NCP4328B
Max
3.3
NCP4328A
Quiescent Current
Typ
VCC
Maximum Operating Input Voltage
VCC UVLO
Symbol
V
V
105
130
115
140
mA
VOLTAGE CONTROL LOOP OTA
Transconductance
Sink current only
gmV
2.8 V ≤ VCC ≤ 36.0 V, TJ = 25°C
Reference Voltage
2.8 V ≤ VCC ≤ 36.0 V, TJ = 0 − 85°C
2.8 V ≤ VCC ≤ 36.0 V,
TJ = −40 − 125°C
VREF
1
S
1.244
1.250
1.256
1.240
1.250
1.264
1.230
1.250
1.270
Sink Current Capability
VFBC > 1.5 V
ISINKV
2.5
Inverting Input Bias Current
VSNS = VREF
IBIASV
−100
V
mA
100
nA
CURRENT CONTROL LOOP OTA
Transconductance
Sink current only
gmC
TJ = 25°C
Reference Voltage
TJ = −20 – 85°C
VREFC
TJ = −40 – 125°C
3
S
61.2
62.5
63.8
60.5
62.5
64.5
60.0
62.5
65.0
Sink Current Capability
VFBC > 1.5 V
ISINKC
2.5
Inverting Input Bias Current
ISNS = VREFC
IBIASC
−100
mV
mA
100
nA
LED DRIVER (NCP4328B Only)
fSWLED
Switching Frequency
Duty Cycle
(Note 3)
DLED
Switch Resistance
ILED = 5 mA
RSW
1
10.0
12.5
50
kHz
15.0
%
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Guaranteed by design.
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4
NCP4328
TYPICAL CHARACTERISTICS
1.28
1.28
1.27
1.27
VREF (V)
1.29
VREF (V)
1.29
1.26
1.26
1.25
1.25
1.24
1.24
1.23
1.23
1.22
−40
−20
0
20
40
60
TJ (°C)
80
100
1.22
0
120
6
Figure 2. VREF at VCC = 15 V
64.5
64.5
64
64
63.5
63.5
VREFC (mV)
65
VREFC (mV)
18
VCC (V)
24
30
36
30
36
Figure 3. VREF at TJ = 255C
65
63
62.5
63
62.5
62
62
61.5
61.5
61
61
60.5
60.5
−20
0
20
40
60
TJ (°C)
80
100
60
0
120
6
Figure 4. VREFC at VCC = 15 V
12
3.6
VCCUVLO_R
3.4
3.2
3.0
2.8
2.6
2.4
−40
VCCUVLO_F
−20
18
VCC (V)
24
Figure 5. VREFC at TJ = 255C
3.8
VCC (V)
60
−40
12
0
20
40
60
TJ (°C)
Figure 6. VCCUVLO
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5
80
100
120
NCP4328
130
130
120
120
110
110
ICC (mA)
ICC (mA)
TYPICAL CHARACTERISTICS
100
100
80
80
80
80
70
−40
−20
0
20
40
60
TJ (°C)
80
100
70
0
120
6
150
150
140
140
130
130
120
110
100
100
0
20
40
60
80
100
90
0
120
6
12
18
24
30
VCC (V)
Figure 9. ICC at VCC = 15 V for NCP4328B
Figure 10. ICC at TJ = 255C for NCP4328B
3.5
3.5
3.4
3.4
3.3
3.3
3.2
3.2
3.1
3.0
2.9
2.9
2.7
2.7
2.6
2.6
0
20
40
60
80
100
2.5
−40
120
36
3.0
2.8
−20
36
3.1
2.8
2.5
−40
30
TJ (°C)
ISINKC (mA)
ISINKV (mA)
−20
24
120
110
90
−40
18
VCC (V)
Figure 8. ICC at TJ = 255C for NCP4328A
ICC (mA)
ICC (mA)
Figure 7. ICC at VCC = 15 V for NCP4328A
12
−20
0
20
40
60
80
100
120
TJ (°C)
TJ (°C)
Figure 11. Voltage OTA Current Sink Capability
Figure 12. Current OTA Current Sink Capability
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6
NCP4328
1.40
100
1.30
90
80
1.20
RSW2 (W)
fSWLED (kHz)
TYPICAL CHARACTERISTICS
1.10
70
60
1.00
50
0.90
0.80
−40
40
−20
0
20
40
60
80
100
30
−40
120
−20
0
20
40
60
80
TJ (°C)
TJ (°C)
Figure 13. LED Switching Frequency at
VCC = 15 V
Figure 14. RSW at VCC = 15 V
100
120
APPLICATION INFORMATION
Typical application circuit for NCP4328A is shown in
Figures 15 and 16 shows typical application circuit for
NCP4328B that includes internal LED driver for indication
purpose.
V OUT + V REF
R3 ) R4
R4
(eq. 1)
Current Regulation
The output current is sensed by the shunt resistor R5 in
series with the load. Voltage drop on R5 is compared with
internal precise voltage reference VREFC at ISNS
transconductance amplifier input.
Voltage difference is amplified by gmC to output current
of amplifier, connected to FBC pin. Compensation network
is connected between this pin and ISNS input to provide
frequency compensation for current regulation path.
Resistor R6 separates compensation network from sense
resistor. Compensation network works into low impedance
without this resistor that significantly decreases
compensation network impact.
Current regulation point is set to current given by
Equation 2.
Power Supply
The NCP4328 is designed to operate from a single supply
up to 36 V. It starts to operate when VCC voltage reaches
3.5 V and stops when VCC voltage drops below 2.5 V. VCC
can be supplied by direct connection to the VOUT voltage
of the power supply. It is highly recommended to add a RC
filter (R1 and C2) in series from VOUT to VCC pin to reduce
voltage spikes and drops that are produced at the converter’s
output capacitors. Recommended values for this filter are
220 W and 1 mF.
Voltage Regulation Path
The output voltage is detected on the VSNS pin by the R3
and R4 voltage divider. This voltage is compared with the
internal precise voltage reference. The voltage difference is
amplified by gmV of the transconductance amplifier. The
amplifier output current is connected to the FBC pin. The
compensation network is also connected to this pin to
provide frequency compensation for the voltage regulation
path. This FBC pin drives regulation optocoupler that
provides regulation of primary side. The optocoupler is
supplied via direct connection to VOUT line through
resistor R2.
Regulation information is transferred through the
optocoupler to the primary side controller where its FB pin
is usually pulled down to reduce energy transferred to
secondary output.
The output voltage can be computed by Equation 1.
I OUTLIM +
V REFC
(eq. 2)
R5
LED Driver (NCP4328B only)
LED driver is active when VCC is higher than VCCMIN.
LED driver consists of an internal power switch controlled
by a PWM modulated logic signal and an external current
limiting resistor R9. LED current can be computed by
Equation 3
I LED +
V OUT * V F_LED
(eq. 3)
R9
PWM modulation is used to increase efficiency of LED.
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7
NCP4328
D1
VOUT
R1
C1
R6
ISNS
OTA
VCC
GND
C2
Feedback
opto
C4
C3
R8
R7
Sink only
VCC
management
Current VREFC
Regulation
R3
R5
VSNS
FBC
OTA
Sink only
R2
Voltage
Regulation
R4
VREF
Figure 15. Typical Application Schematic for NCP4328A
D1
C1
VOUT
R1
R6
ISNS
VCC
C2
VCC
C4
C3
Power
RESET
management
GND
Sink
only
OTA
Current V REFC
Regulation
R3
Feedback
opto
R8
FBC
Power
RESET
T
R2
Sink
only
R9
OTA
Voltage
Regulation
LED
Indication
LED
R5
V REF
R7
VSNS
V REF
R4
1 kHz, 12%
D.C.
Oscillator
SW
Figure 16. Typical Application Schematic for NCP4328B
ORDERING INFORMATION
Device
Marking
LED Driver
Package
Shipping†
NCP4328ASNT1G
A32
No
TSOP−5
(Pb−Free)
3000 / Tape & Reel
NCP4328BSNT1G
U32
Yes
TSOP−6
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
1
SCALE 2:1
D
H
ÉÉ
ÉÉ
6
E1
1
NOTE 5
5
2
L2
4
GAUGE
PLANE
E
3
L
b
SEATING
PLANE
C
DETAIL Z
e
DIM
A
A1
b
c
D
E
E1
e
L
L2
M
c
A
0.05
M
DATE 12 JUN 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
A1
DETAIL Z
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
2.75
3.00
1.50
1.70
0.95
1.05
0.40
0.60
0.25 BSC
10°
−
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 2:
PIN 1. EMITTER 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. BASE 2
6. COLLECTOR 2
STYLE 3:
PIN 1. ENABLE
2. N/C
3. R BOOST
4. Vz
5. V in
6. V out
STYLE 4:
PIN 1. N/C
2. V in
3. NOT USED
4. GROUND
5. ENABLE
6. LOAD
STYLE 5:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 6:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 7:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. N/C
5. COLLECTOR
6. EMITTER
STYLE 8:
PIN 1. Vbus
2. D(in)
3. D(in)+
4. D(out)+
5. D(out)
6. GND
STYLE 9:
PIN 1. LOW VOLTAGE GATE
2. DRAIN
3. SOURCE
4. DRAIN
5. DRAIN
6. HIGH VOLTAGE GATE
STYLE 10:
PIN 1. D(OUT)+
2. GND
3. D(OUT)−
4. D(IN)−
5. VBUS
6. D(IN)+
STYLE 11:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1/GATE 2
STYLE 12:
PIN 1. I/O
2. GROUND
3. I/O
4. I/O
5. VCC
6. I/O
STYLE 13:
PIN 1. GATE 1
2. SOURCE 2
3. GATE 2
4. DRAIN 2
5. SOURCE 1
6. DRAIN 1
STYLE 14:
PIN 1. ANODE
2. SOURCE
3. GATE
4. CATHODE/DRAIN
5. CATHODE/DRAIN
6. CATHODE/DRAIN
STYLE 15:
PIN 1. ANODE
2. SOURCE
3. GATE
4. DRAIN
5. N/C
6. CATHODE
STYLE 16:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 17:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
XXXAYWG
G
1
6X
3.20
XXX
A
Y
W
G
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB14888C
TSOP−6
1
IC
0.95
XXX MG
G
= Specific Device Code
=Assembly Location
= Year
= Work Week
= Pb−Free Package
STANDARD
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
*This information is generic. Please refer to device data sheet
for actual part marking. Pb−Free indicator, “G” or microdot “
G”, may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE N
5
1
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
D 5X
NOTE 5
2X
DATE 12 AUG 2020
0.20 C A B
0.10 T
M
2X
0.20 T
5
B
1
4
2
B
S
3
K
DETAIL Z
G
A
A
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
0.05
H
C
SIDE VIEW
SEATING
PLANE
END VIEW
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
2.85
3.15
1.35
1.65
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
1.9
0.074
5
5
XXXAYWG
G
1
1
Analog
2.4
0.094
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
1.0
0.039
XXX MG
G
Discrete/Logic
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ARB18753C
TSOP−5
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
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