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NCP45560IMNTWG-H

NCP45560IMNTWG-H

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    VFDFN12

  • 描述:

    IC PWR SWITCH N-CHAN 1:1 12DFN

  • 数据手册
  • 价格&库存
NCP45560IMNTWG-H 数据手册
ecoSWITCHt Advanced Load Management Controlled Load Switch with Low RON NCP45560 The NCP45560 load switch provides a component and area-reducing solution for efficient power domain switching with inrush current limit via soft−start. In addition to integrated control functionality with ultra low on−resistance, this device offers system safeguards and monitoring via fault protection and power good signaling. This cost effective solution is ideal for power management and hot-swap applications requiring low power consumption in a small footprint. Features • • • • • • • • • • • • www.onsemi.com RON TYP VCC VIN 4.1 mW 3.3 V 1.8 V 4.3 mW 3.3 V 5.0 V 4.9 mW 3.3 V 12 V 1 DFN12, 3x3 CASE 506CD MARKING DIAGRAM NCP45 560−x ALYWG G x = H for NCP45560−H = L for NCP45560−L A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) Portable Electronics and Systems Notebook and Tablet Computers Telecom, Networking, Medical, and Industrial Equipment Set−Top Boxes, Servers, and Gateways Hot−Swap Devices and Peripheral Ports VCC EN 17 A *IMAX_DC is defined as the maximum steady state current the load switch can pass at room ambient temperature without entering thermal lockout. Advanced Controller with Charge Pump Integrated N-Channel MOSFET with Ultra Low RON Input Voltage Range 0.5 V to 13.5 V Soft-Start via Controlled Slew Rate Adjustable Slew Rate Control Power Good Signal Thermal Shutdown Undervoltage Lockout Short-Circuit Protection Extremely Low Standby Current Load Bleed (Quick Discharge) This is a Pb−Free Device Typical Applications • • • • • IMAX_DC* VIN PG PIN CONFIGURATION Bandgap & Biases Charge Pump Thermal, Undervoltage & Short−Circuit Protection Control Logic Delay and Slew Rate Control VIN 1 12 VOUT EN 2 11 VOUT VCC 3 10 VOUT GND 4 9 VOUT SR 5 8 VOUT PG 6 7 BLEED 13: VIN (Top View) SR GND BLEED VOUT © Semiconductor Components Industries, LLC, 2015 May, 2020 − Rev. 7 ORDERING INFORMATION See detailed ordering and shipping information on page 13 of this data sheet. Figure 1. Block Diagram 1 Publication Order Number: NCP45560/D NCP45560 Table 1. PIN DESCRIPTION Pin Name Function 1, 13 VIN Drain of MOSFET (0.5 V – 13.5 V), Pin 1 must be connected to Pin 13 2 EN NCP45560−H − Active−high digital input used to turn on the MOSFET, pin has an internal pull down resistor to GND NCP45560−L − Active−low digital input used to turn on the MOSFET, pin has an internal pull up resistor to VCC 3 VCC Supply voltage to controller (3.0 V − 5.5 V) 4 GND Controller ground 5 SR Slew rate adjustment; float if not used 6 PG Active−high, open−drain output that indicates when the gate of the MOSFET is fully charged, external pull up resistor ≥ 1 kW to an external voltage source required; tie to GND if not used. 7 BLEED 8−12 VOUT Load bleed connection, must be tied to VOUT either directly or through a resistor ≤ 1 kW Source of MOSFET connected to load Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage Range VCC −0.3 to 6 V Input Voltage Range VIN −0.3 to 18 V VOUT −0.3 to 18 V EN Digital Input Range VEN −0.3 to (VCC + 0.3) V PG Output Voltage Range (Note 1) VPG −0.3 to 6 V Thermal Resistance, Junction−to−Ambient, Steady State (Note 2) RθJA 28.6 °C/W Thermal Resistance, Junction−to−Ambient, Steady State (Note 3) RθJA 49.7 °C/W Thermal Resistance, Junction−to−Case (VIN Paddle) RθJC 1.7 °C/W Continuous MOSFET Current @ TA = 25°C (Notes 3 and 4) IMAX 17 A Output Voltage Range Continuous MOSFET Current @ TA = 25°C (Notes 2 and 4) IMAX 18.3 A Transient MOSFET Current (for up to 500 ms) IMAX_TRANS 40 A Total Power Dissipation @ TA = 25°C (Note 2) Derate above TA = 25°C PD 3.49 34.9 W mW/°C Total Power Dissipation @ TA = 25°C (Note 3) Derate above TA = 25°C PD 2.01 20.1 W mW/°C TSTG −40 to 150 °C Storage Temperature Range Lead Temperature, Soldering (10 sec.) TSLD 260 °C ESD Capability, Human Body Model (Notes 5 and 6) ESDHBM 3.0 kV ESD Capability, Machine Model (Note 5) ESDMM 200 V ESD Capability, Charged Device Model (Note 5) ESDCDM 1.0 kV LU 100 mA Latch−up Current Immunity (Notes 5 and 6) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. PG is an open−drain output that requires an external pull up resistor ≥ 1 kW to an external voltage source. 2. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 3. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu. 4. Ensure that the expected operating MOSFET current will not cause the Short−Circuit Protection to turn the MOSFET off undesirably. 5. Tested by the following methods @ TA = 25°C: ESD Human Body Model tested per JESD22−A114 ESD Machine Model tested per JESD22−A115 ESD Charged Device Model per ESD STM5.3.1 Latch−up Current tested per JESD78 6. Rating is for all pins except for VIN and VOUT which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance for VIN and VOUT should be expected and these devices should be treated as ESD sensitive. www.onsemi.com 2 NCP45560 Table 3. OPERATING RANGES Rating Symbol Min Max Unit Supply Voltage VCC 3 5.5 V Input Voltage VIN 0.5 13.5 V Ground 0 V Ambient Temperature GND TA −40 85 °C Junction Temperature TJ −40 125 °C ETRANS 0 210 mJ OFF to ON Transition Energy Dissipation Limit (See application section) Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Conditions (Note 7) Parameter Symbol Min Typ Max Unit 4.1 5.0 mW 4.3 5.3 MOSFET On−Resistance VCC = 3.3 V; VIN = 1.8 V RON VCC = 3.3 V; VIN = 5 V VCC = 3.3 V; VIN = 12 V Leakage Current (Note 8) 4.9 6.8 VEN = 0 V; VIN = 13.5 V ILEAK 0.1 1.0 mA VEN = 0 V; VCC = 3 V ISTBY 0.65 2.0 mA 3.2 4.5 280 400 530 750 115 144 CONTROLLER Supply Standby Current (Note 9) VEN = 0 V; VCC = 5.5 V Supply Dynamic Current (Note 10) VEN = VCC = 3 V; VIN = 12 V IDYN VEN = VCC = 5.5 V; VIN = 1.8 V Bleed Resistance RBLEED VEN = 0 V; VCC = 3 V VEN = 0 V; VCC = 5.5 V Bleed Pin Leakage Current VEN = VCC = 3 V, VIN = 1.8 V 86 72 IBLEED VEN = VCC = 3 V, VIN = 12 V EN Input High Voltage VCC = 3 V − 5.5 V VIH EN Input Low Voltage VCC = 3 V − 5.5 V VIL EN Input Leakage Current NCP45560−H; VEN = 0 V IIL NCP45560−L; VEN = VCC IIH 97 121 6.0 10 60 70 2.0 mA W mA V 0.8 V 90 500 nA 90 500 EN Pull Down Resistance NCP45560−H RPD 76 100 124 kW EN Pull Up Resistance NCP45560−L RPU 76 100 124 kW PG Output Low Voltage (Note 11) VCC = 3 V; ISINK = 5 mA VOL 0.2 V PG Output Leakage Current (Note 12) VCC = 3 V; VTERM = 3.3 V IOH 5.0 100 nA Slew Rate Control Constant (Note 13) VCC = 3 V KSR 33 40 mA Thermal Shutdown Threshold (Note 14) VCC = 3 V − 5.5 V TSDT Thermal Shutdown Hysteresis (Note 14) VCC = 3 V − 5.5 V THYS VIN Undervoltage Lockout Threshold VCC = 3 V VUVLO VIN Undervoltage Lockout Hysteresis VCC = 3 V VHYS 25 Short−Circuit Protection Threshold VCC = 3 V; VIN = 0.5 V VSC 200 100 285 500 26 FAULT PROTECTIONS VCC = 3 V; VIN = 13.5 V 145 °C 20 0.25 0.35 °C 0.45 V 40 60 mV 265 350 mV 7. VEN shown only for NCP45560−H, (EN Active−High) unless otherwise specified. 8. Average current from VIN to VOUT with MOSFET turned off. 9. Average current from VCC to GND with MOSFET turned off. 10. Average current from VCC to GND after charge up time of MOSFET. 11. PG is an open-drain output that is pulled low when the MOSFET is disabled. 12. PG is an open-drain output that is not driven when the gate of the MOSFET is fully charged, requires an external pull up resistor ≥ 1 kW to an external voltage source, VTERM. 13. See Applications Information section for details on how to adjust the slew rate. 14. Operation above TJ = 125°C is not guaranteed. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 3 NCP45560 Table 5. SWITCHING CHARACTERISTICS (TJ = 25°C unless otherwise specified) (Notes 15 and 16) Parameter Conditions Output Slew Rate Symbol SR VCC = 3.3 V; VIN = 1.8 V Output Turn−on Delay Min 12.4 VCC = 5.0 V; VIN = 1.8 V 12.6 VCC = 3.3 V; VIN = 12 V 13.7 VCC = 5.0 V; VIN = 12 V 14.0 TON VCC = 3.3 V; VIN = 1.8 V 195 VCC = 5.0 V; VIN = 1.8 V 180 VCC = 3.3 V; VIN = 12 V 280 VCC = 5.0 V; VIN = 12 V Output Turn−off Delay 4.1 VCC = 5.0 V; VIN = 1.8 V 3.5 VCC = 3.3 V; VIN = 12 V 1.4 VCC = 5.0 V; VIN = 12 V 0.8 TPG,ON VCC = 3.3 V; VIN = 1.8 V Power Good Turn−off Time 1.71 VCC = 5.0 V; VIN = 1.8 V 1.08 VCC = 3.3 V; VIN = 12 V 2.15 VCC = 5.0 V; VIN = 12 V 1.35 TPG,OFF VCC = 3.3 V; VIN = 1.8 V 28 VCC = 5.0 V; VIN = 1.8 V 21 VCC = 3.3 V; VIN = 12 V 28 VCC = 5.0 V; VIN = 12 V 21 15. See below figure for Test Circuit and Timing Diagram. 16. Tested with the following conditions: VTERM = VCC; RPG = 100 kW; RL = 10 W; CL = 0.1 mF. OFF ON RPG EN VIN VCC NCP45560−H BLEED Dt CL TOFF 10% DV SR = TPG,ON VPG RL SR 50% 90% VOUT VOUT 50% TON VTERM PG GND VEN Max Unit kV/s ms 265 TOFF VCC = 3.3 V; VIN = 1.8 V Power Good Turn−on Time Typ DV 90% Dt TPG,OFF 50% 50% Figure 2. Switching Characteristics Test Circuit and Timing Diagrams www.onsemi.com 4 ms ms ns NCP45560 TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) 7.5 5.3 5.1 4.9 4.7 4.5 4.3 4.1 3.9 0.5 2.5 4.5 6.5 8.5 10.5 5.0 VIN = 1.8 V 4.5 4.0 3.5 0 15 30 45 60 75 90 105 120 VIN, INPUT VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 3. On−Resistance vs. Input Voltage Figure 4. On−Resistance vs. Temperature 2.5 2.0 1.5 1.0 3.5 4.0 4.5 5.0 5.5 7 6 5 4 VCC = 5.5 V 3 2 1 VCC = 3 V 0 −45 −30 −15 0 15 30 45 60 75 90 105 120 VCC, SUPPLY VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 5. Supply Standby Current vs. Supply Voltage Figure 6. Supply Standby Current vs. Temperature 550 500 450 400 350 300 VCC = 5.5 V 250 VCC = 3 V 200 150 VIN = 5.0 V 5.5 3.0 −45 −30 −15 3.0 3.0 6.0 12.5 3.5 0.5 VIN = 12 V VCC = 3.3 V 6.5 ISTBY, SUPPLY STANDBY CURRENT (mA) 3.7 3.5 7.0 RON, ON−RESISTANCE (mW) VCC = 3 V VCC = 5.5 V IDYN, SUPPLY DYNAMIC CURRENT (mA) IDYN, SUPPLY DYNAMIC CURRENT (mA) ISTBY, SUPPLY STANDBY CURRENT (mA) RON, ON−RESISTANCE (mW) 5.5 0.5 2.5 4.5 6.5 8.5 10.5 12.5 600 550 500 VIN = 1.8 V 450 400 350 300 VIN = 12 V 250 200 150 3.0 3.5 4.0 4.5 5.0 5.5 VIN, INPUT VOLTAGE (V) VCC, SUPPLY VOLTAGE (V) Figure 7. Supply Dynamic Current vs. Input Voltage Figure 8. Supply Dynamic Current vs. Supply Voltage www.onsemi.com 5 NCP45560 TYPICAL CHARACTERISTICS 115 700 600 550 500 450 400 350 300 250 200 −45 VCC = 3.0 V, VIN = 12 V −15 15 45 75 110 105 100 95 105 3.0 3.5 4.0 4.5 5.0 5.5 TJ, JUNCTION TEMPERATURE (°C) VCC, SUPPLY VOLTAGE (V) Figure 9. Supply Dynamic Current vs. Temperature Figure 10. Bleed Resistance vs. Supply Voltage 70 135 60 IBLEED, BLEED PIN LEAKAGE CURRENT (mA) 145 VCC = 3 V 125 115 VCC = 5.5 V 105 95 85 −45 IBLEED, BLEED PIN LEAKAGE CURRENT (mA) RBLEED, BLEED RESISTANCE (W) VCC = 5.5 V, VIN = 1.8 V 650 −15 15 45 75 VCC = 3 V 50 VCC = 5.5 V 40 30 20 10 0 105 0.5 2.5 4.5 6.5 8.5 10.5 12.5 TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V) Figure 11. Bleed Resistance vs. Temperature Figure 12. Bleed Pin Leakage Current vs. Input Voltage IPD/PU, EN PULL DOWN/UP RESISTANCE (kW) RBLEED, BLEED RESISTANCE (W) IDYN, SUPPLY DYNAMIC CURRENT (mA) (TJ = 25°C unless otherwise specified) 80 70 VCC = 3 V, VIN = 12 V 60 50 40 30 20 VCC = 3 V, VIN = 1.8 V 10 0 −45 −15 15 45 75 105 120 115 110 105 100 95 90 85 −45 −15 15 45 75 105 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 13. Bleed Pin Leakage Current vs. Temperature Figure 14. EN Pull Down/Up Resistance vs. Temperature www.onsemi.com 6 NCP45560 TYPICAL CHARACTERISTICS VOL, PG OUTPUT LOW VOLTAGE (V) 0.140 ISINK = 5 mA 0.135 0.130 0.125 0.120 0.115 3.5 4.0 4.5 5.0 5.5 VCC = 3 V 0.16 0.14 VCC = 5.5 V 0.12 0.10 0.08 −45 −15 15 45 75 105 Figure 15. PG Output Low Voltage vs. Supply Voltage Figure 16. PG Output Low Voltage vs. Temperature 36 VCC = 5.5 V 35 34 VCC = 3 V 33 32 31 30 29 0.5 2.5 4.5 6.5 8.5 10.5 12.5 35.5 35.0 VCC = 5.5 V 34.5 34.0 33.5 VCC = 3 V 33.0 32.5 32.0 −45 −15 15 45 75 105 VIN, INPUT VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 17. Slew Rate Control Constant vs. Input Voltage Figure 18. Slew Rate Control Constant vs. Temperature 14.5 320 310 VCC = 5.5 V 300 290 VCC = 3 V 280 270 260 250 ISINK = 5 mA 0.18 TJ, JUNCTION TEMPERATURE (°C) 37 28 0.20 VCC, SUPPLY VOLTAGE (V) SR, OUTPUT SLEW RATE (kV/s) VSC, SHORT−CIRCUIT PROTECTION THRESHOLD (mV) 3.0 KSR, SLEW RATE CONTROL CONSTANT (mA) 0.110 KSR, SLEW RATE CONTROL CONSTANT (mA) VOL, PG OUTPUT LOW VOLTAGE (V) (TJ = 25°C unless otherwise specified) 0.5 2.5 4.5 6.5 8.5 10.5 12.5 VCC = 5.5 V 14.0 13.5 VCC = 3 V 13.0 12.5 12.0 11.5 11.0 10.5 10.0 9.5 0.5 2.5 4.5 6.5 8.5 10.5 12.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 19. Short−Circuit Protection Threshold vs. Input Voltage Figure 20. Output Slew Rate vs. Input Voltage www.onsemi.com 7 NCP45560 TYPICAL CHARACTERISTICS VCC = 3.3 V, VIN = 12 V 13.5 13.0 12.5 VCC = 5 V, VIN = 1.8 V 12.0 TOFF, OUTPUT TURN−OFF DELAY (ms) −20 0 20 40 60 80 100 120 310 290 VCC = 3 V 270 250 VCC = 5.5 V 230 210 190 170 150 0.5 2.5 4.5 6.5 8.5 10.5 12.5 TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V) Figure 21. Output Slew Rate vs. Temperature Figure 22. Output Turn−on Delay vs. Input Voltage 300 TOFF, OUTPUT TURN−OFF DELAY (ms) TON, OUTPUT TURN−ON DELAY (ms) 11.5 −40 VCC = 3.3 V, VIN = 12 V 275 250 225 200 VCC = 5 V, VIN = 1.8 V 175 150 −40 −20 0 20 40 60 80 100 120 6 5 4 VCC = 3 V 3 2 VCC = 5.5 V 1 0 0.5 2.5 4.5 6.5 8.5 10.5 12.5 VIN, INPUT VOLTAGE (V) Figure 23. Output Turn−on Delay vs. Temperature Figure 24. Output Turn−off Delay vs. Input Voltage 4.5 4.0 4.0 VCC = 5 V, VIN = 1.8 V 3.5 3.0 2.5 2.0 VCC = 3.3 V, VIN = 12 V 1.5 1.0 −40 7 TJ, JUNCTION TEMPERATURE (°C) TPG,ON, PG TURN−ON TIME (ms) SR, OUTPUT SLEW RATE (kV/s) 14.0 TON, OUTPUT TURN−ON DELAY (ms) (TJ = 25°C unless otherwise specified) −20 0 20 40 60 80 100 3.5 3.0 2.5 2.0 1.5 VCC = 5.5 V 1.0 0.5 120 VCC = 3 V 0.5 2.5 4.5 6.5 8.5 10.5 12.5 TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V) Figure 25. Output Turn−off Delay vs. Temperature Figure 26. Power Good Turn−on Time vs. Input Voltage www.onsemi.com 8 NCP45560 TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) TPG,OFF, PG TURN−OFF TIME (ns) 32 2.6 2.4 VCC = 3.3 V, VIN = 12 V 2.2 2.0 1.8 1.6 1.4 1.2 VCC = 5 V, VIN = 1.8 V 1.0 0.8 −40 −20 0 20 40 60 80 VIN = 13.5 V 28 26 VIN = 0.5 V 24 22 20 18 120 100 30 3.0 3.5 4.0 4.5 5.0 TJ, JUNCTION TEMPERATURE (°C) VCC, SUPPLY VOLTAGE (V) Figure 27. Power Good Turn−on Time vs. Temperature Figure 28. Power Good Turn−off Time vs. Supply Voltage 35.0 TPG,OFF, PG TURN−OFF TIME (ns) TPG,ON, PG TURN−ON TIME (ms) 2.8 32.5 VCC = 3.3 V, VIN = 12 V 30.0 27.5 25.0 VCC = 5 V, VIN = 1.8 V 22.5 20.0 17.5 −40 −20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) Figure 29. Power Good Turn−off Time vs. Temperature www.onsemi.com 9 120 5.5 NCP45560 APPLICATIONS INFORMATION Enable Control than or equal to 1 kW to an external voltage source, VTERM, compatible with input levels of other devices connected to this pin (as shown in Figures 30 and 31). The power good output can be used as the enable signal for other active−high devices in the system (as shown in Figure 32). This allows for guaranteed by design power sequencing and reduces the number of enable signals needed from the system controller. If the power good feature is not used in the application, the PG pin should be tied to GND. The NCP45560 has two part numbers, NCP45560−H and NCP45560−L, that only differ in the polarity of the enable control. The NCP45560−H device allows for enabling the MOSFET in an active−high configuration. When the VCC supply pin has an adequate voltage applied and the EN pin is at a logic high level, the MOSFET will be enabled. Similarly, when the EN pin is at a logic low level, the MOSFET will be disabled. An internal pull down resistor to ground on the EN pin ensures that the MOSFET will be disabled when not being driven. The NCP45560−L device allows for enabling the MOSFET in an active−low configuration. When the VCC supply pin has an adequate voltage applied and the EN pin is at a logic low level, the MOSFET will be enabled. Similarly, when the EN pin is at a logic high level, the MOSFET will be disabled. An internal pull up resistor to VCC on the EN pin ensures that the MOSFET will be disabled when not being driven. Slew Rate Control The NCP45560 devices are equipped with controlled output slew rate which provides soft start functionality. This limits the inrush current caused by capacitor charging and enables these devices to be used in hot swap applications. The slew rate can be decreased with an external capacitor added between the SR pin and ground (as shown in Figures 30 and 31). With an external capacitor present, the slew rate can be determined by the following equation: Slew Rate + Power Sequencing K SR [Vńs] C SR (eq. 1) The NCP45560 devices will function with any power sequence, but the output turn−on delay performance may vary from what is specified. To achieve the specified performance, there are two recommended power sequences: 1. VCC → VIN → VEN 2. VIN → VCC → VEN VCC must be at 2 V or higher when EN is asserted to ensure that the enable is latched properly for correct operation. If EN comes up before VCC reaches 2 V, then the EN may not take effect. where KSR is the specified slew rate control constant, found in Table 4, and CSR is the slew rate control capacitor added between the SR pin and ground. The slew rate of the device will always be the lower of the default slew rate and the adjusted slew rate. Therefore, if the CSR is not large enough to decrease the slew rate more than the specified default value, the slew rate of the device will be the default value. The SR pin can be left floating if the slew rate does not need to be decreased. Load Bleed (Quick Discharge) The NCP45560 devices are equipped with short−circuit protection that is used to help protect the part and the system from a sudden high−current event, such as the output, VOUT, being shorted to ground. This circuitry is only active when the gate of the MOSFET is fully charged. Once active, the circuitry monitors the difference in the voltage on the VIN pin and the voltage on the BLEED pin. In order for the VOUT voltage to be monitored through the BLEED pin, it is required that the BLEED pin be connected to VOUT either directly (as shown in Figure 31) or through a resistor, REXT (as shown in Figure 30), which should not exceed 1 kW. With the BLEED pin connected to VOUT, the short−circuit protection is able to monitor the voltage drop across the MOSFET. If the voltage drop across the MOSFET is greater than or equal to the short−circuit protection threshold voltage, the MOSFET is immediately turned off and the load bleed is activated. The part remains latched in this off state until EN is toggled or VCC supply voltage is cycled, at which point the MOSFET will be turned on in a controlled fashion with the normal output turn−on delay and slew rate. The current through the MOSFET that will cause a short−circuit event Short−Circuit Protection The NCP45560 devices have an internal bleed resistor, RBLEED, which is used to bleed the charge off of the load to ground after the MOSFET has been disabled. In series with the bleed resistor is a bleed switch that is enabled whenever the MOSFET is disabled. The MOSFET and the bleed switch are never concurrently active. It is required that the BLEED pin be connected to VOUT either directly (as shown in Figure 31) or through an external resistor, REXT (as shown in Figure 30). REXT should not exceed 1 kW and can be used to increase the total bleed resistance. Care must be taken to ensure that the power dissipated across RBLEED is kept at a safe level. The maximum continuous power that can be dissipated across RBLEED is 0.4 W. REXT can be used to decrease the amount of power dissipated across RBLEED. Power Good The NCP45560 devices have a power good output (PG) that can be used to indicate when the gate of the MOSFET is fully charged. The PG pin is an active−high, open−drain output that requires an external pull up resistor, RPG, greater www.onsemi.com 10 NCP45560 to the low RON. When the EN signal is asserted high, the load switch transitions from an OFF state to an ON state. During this time, the resistance from VIN to VOUT transitions from high impedance to RON, and additional energy is dissipated in the device for a short period of time. The worst case energy dissipated during the OFF to ON transition can be approximated by the following equation: can be calculated by dividing the short−circuit protection threshold by the expected on−resistance of the MOSFET. Thermal Shutdown The thermal shutdown of the NCP45560 devices protects the part from internally or externally generated excessive temperatures. This circuitry is disabled when EN is not active to reduce standby current. When an over−temperature condition is detected, the MOSFET is immediately turned off and the load bleed is activated. The part comes out of thermal shutdown when the junction temperature decreases to a safe operating temperature as dictated by the thermal hysteresis. Upon exiting a thermal shutdown state, and if EN remains active, the MOSFET will be turned on in a controlled fashion with the normal output turn−on delay and slew rate. E + 0.5 @ V IN @ ǒI INRUSH ) 0.8 @ I LOADǓ @ dt Where VIN is the voltage on the VIN pin, IINRUSH is the inrush current caused by capacitive loading on VOUT, and dt is the time it takes VOUT to rise from 0 V to VIN. IINRUSH can be calculated using the following equation: I INRUSH + dv @ C L dt The undervoltage lockout of the NCP45560 devices turns the MOSFET off and activates the load bleed when the input voltage, VIN, is less than or equal to the undervoltage lockout threshold. This circuitry is disabled when EN is not active to reduce standby current. If the VIN voltage rises above the undervoltage lockout threshold, and EN remains active, the MOSFET will be turned on in a controlled fashion with the normal output turn−on delay and slew rate. ecoSWITCH LAYOUT GUIDELINES Electrical Layout Considerations Correct physical PCB layout is important for proper low noise accurate operation of all ecoSWITCH products. Power Planes: The ecoSWITCH is optimized for extremely low Ron resistance, however, improper PCB layout can substantially increase source to load series resistance by adding PCB board parasitic resistance. Solid connections to the VIN and VOUT pins of the ecoSWITCH to copper planes should be used to achieve low series resistance and good thermal dissipation. The ecoSWITCH requires ample heat dissipation for correct thermal lockout operation. The internal FET dissipates load condition dependent amounts of power in the milliseconds following the rising edge of enable, and providing good thermal conduction from the packaging to the board is critical. Direct coupling of VIN to VOUT should be avoided, as this will adversely affect slew rates. Capacitive Load The peak in−rush current associated with the initial charging of the application load capacitance needs to stay below the specified IMAX. CL (capacitive load) should be less than Cmax as defined by the following equation: I max SR typ (eq. 4) Where dv/dt is the programmed slew rate, and CL is the capacitive loading on VOUT. To prevent thermal lockout or damage to the device, the energy dissipated during the OFF to ON transition should be limited to ETRANS listed in operating ranges table. Undervoltage Lockout C max + (eq. 3) (eq. 2) Where IMAX is the maximum load current, and SRtyp is the typical default slew rate when no external load capacitor is added to the SR pin. OFF to ON Transition Energy Dissipation The energy dissipation due to load current traveling from VIN to VOUT is very low during steady state operation due www.onsemi.com 11 NCP45560 VTERM = 3.3 V Power Supply or Battery RPG 100 kW 3.0 V − 5.5 V 0.5 V − 13.5 V VIN PG EN Thermal, Undervoltage & Short−Circuit Protection Charge Pump Delay and Slew Rate Control SR CSR VOUT Control Logic GND Bandgap & Biases BLEED VCC Controller REXT Load Figure 30. Typical Application Diagram − Load Switch www.onsemi.com 12 NCP45560 VCC 3.0 V − 5.5 V EN VTERM PG GND VIN 0.5 V − 13.5 V RPG BACKPLANE VIN PG EN Delay and Slew Rate Control CSR VOUT Charge Pump SR Control Logic GND Thermal, Undervoltage & Short−Circuit Protection Bandgap & Biases BLEED VCC REMOVABLE CARD Load Figure 31. Typical Application Diagram − Hot Swap VTERM = 3.3 V EN PG EN PG RPG 10 kW Controller RPD 100 kW PG RPD 100 kW PG NCP45560−H NCP45560−H Figure 32. Simplified Application Diagram − Power Sequencing with PG Output ORDERING INFORMATION Device EN Polarity Package Shipping† NCP45560IMNTWG−H Active−High NCP45560IMNTWG−L Active−Low DFN12 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ecoSWITCH is a trademark of Semiconductor Components Industries, LLC (SCILLC). www.onsemi.com 13 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN12 3x3, 0.5P CASE 506CD ISSUE A DATE 18 FEB 2014 1 SCALE 4:1 PIN ONE INDICATOR 0.10 C 2X 2X 0.10 C L1 ÇÇÇ ÇÇÇ ÇÇÇ DETAIL A ALTERNATE CONSTRUCTIONS E MOLD CMPD A3 DETAIL B A1 A 0.05 C NOTE 4 SIDE VIEW D2 6 1 DETAIL B A3 ALTERNATE CONSTRUCTION A1 SEATING PLANE C 0.10 DETAIL A ÇÇÇ ÇÇÇ ÉÉÉ DIM A A1 A3 b D D2 E E2 e L L1 L2 K EXPOSED Cu TOP VIEW 0.05 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L A B D M GENERIC MARKING DIAGRAM* C A B L 12X 0.10 M XXXXX XXXXX ALYWG G C A B L2 E2 K 7 12 e e/2 BOTTOM VIEW 12X b 0.10 M C A-B B 0.05 M C NOTE 3 A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. RECOMMENDED SOLDERING FOOTPRINT* 2.86 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 3.00 BSC 2.60 2.80 3.00 BSC 1.90 2.10 0.50 BSC 0.20 0.40 −−− 0.15 0.10 REF 0.15 MIN 11X 0.32 12X 0.48 2.10 PACKAGE OUTLINE 3.30 1 0.50 PITCH 0.45 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON67174E DFN12 3X3, 0.5P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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NCP45560IMNTWG-H 价格&库存

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NCP45560IMNTWG-H
  •  国内价格
  • 1+18.64500
  • 1000+18.64500
  • 3000+18.64500

库存:3000